Disappearance of Fiske steps in Josephson fluxonic diode and Josephson fluxonic bipolar junction transistor

Fiske steps which are normally present in the I-V curve of Josephson junctions disappear if the junction is subjected to a magnetic field which reverses its direction at the center of the device as in Josephson fluxonic diode. Experimental results for small and long Josephson junctions are provided. It is proposed that the reversing magnetic field sets extra conditions at the center of the junction which makes the creation of standing electromagnetic waves impossible.     

A note on dc crowding effects in the small-signal distributed transistor model

A distributed transistor model including linear dc crowding is analyzed. An expression for the short-circuit input impedance is derived for the cases of "very small" crowding and "large" crowding. It is found that in both cases the impedance is approximately equal to that of a transistor with no dc crowding and a shorter active base region. The effective length of the base region depends on the degree of crowding.     

P型对称LDMOS的静电泄放响应曲线研究与优化

The ESD response characteristic in a p-type symmetric lateral DMOS （ps-LDMOS） has been investigated. The experimental results show that the ps-LDMOS has weak ESD robustness due to an absence of the ＂snapback＂ characteristic. In addition, the location of the hot spot changes little for the special device. The method for reducing the lattice temperature of the hot spot can be used to enhance the ESD capacity of the ps-LDMOS, thereby, a novel and easily-achievable ps-LDMOS structure with a p-type lightly doped drain （p-LDD） has been proposed. The special region p-LDD lowers the electric field at the edge of the poly gate, making the whole dis- tribution of the surface electric field more uniform. Therefore, the ESD robustness is improved two times and no obvious change of other electric parameters is introduced.     

Electric measurement and modelling of the emitter base junction behaviour of VLSI silicon transistor

A knowledge of the gain of the emitter base junction center is of great interest to evaluate several phenomena which occur in VLSI technology. These effects are mainly: —the edge effects of the emitter base junction, —the heavily doped emitter effects (bandgap narrowing)… We develop in this paper a method to measure the internal gain of the VLSI bipolar transistors using a weak avalanche multiplication in the collector. To verify our results we proposed a model which is convenient to use with our devices and consistent by comparison with some previous works. For the tested devices the ratio of the overall gain with the internal gain is about 0.5. Furthermore, the model allows a knowledge of the average intrinsic concentration of the degenerate emitter.     

The influence of emitter-base junction design on collectorsaturation current, ideality factor, Early voltage, and device switchingspeed of Si/SiGe HBT's

In advanced Si/SiGe HBT's the base is doped much higher than emitter and collector. Base outdiffusion becomes a problem because of the formation of parasitic barriers that degrade device performance. The simulations and experiments of this paper show that a strong correlation exists between (a) the drop of the collector saturation current, (b) an increase of its ideality factor and (c) a rise of the switching time due to an additional emitter delay which can no longer be neglected. Curves of these three parameters as a function of Si/SiGe heterointerface position and outdiffusion at the base-emitter interface have been calculated and indicate that only a few nm shift may cause severe device degradation. An important result is that the collector current ideality factor or the inverse Early voltage is a very sensitive indicator for the quality of the emitter-base interface. Application of these results have yielded experimental SiGe HBT's with transit frequencies above 60 GHz     

Effect of temperature on the base resistance and the noise factor of a bipolar junction transistor

Noise measurements are used to determine the base resistance of a high-gain diffused silicon bipolar junction transistor over a temperature range 203?443 K. The noise factor F is degraded as the ambient device temperature is increased.     

Neural-network-based fuzzy model and its application to transientstability prediction in power systems

We present a general approach to deriving a new type of neural network-based fuzzy model for a complex system from numerical and/or linguistic information. To efficiently identify the structure and the parameters of the new fuzzy model, we first partition the output space instead of the input space. As a result, the input space itself induces corresponding partitions within each of which inputs would have similar outputs. Then we use a set of hyperrectangles to fit the partitions of the input space. Consequently, the premise of an implication in the new type of fuzzy rule is represented by a hyperrectangle and the consequence is represented by a fuzzy singleton. A novel two-layer fuzzy hyperrectangular composite neural network (FHRCNN) can be shown to be computationally equivalent to such a special fuzzy model. The process of presenting input data to each hidden node in a FHRCNN is equivalent to firing a fuzzy rule. An efficient learning algorithm was developed to adjust the weights of an FHRCNN. Finally, we apply FHRCNNs to provide real-time transient stability prediction for use with high-speed control in power systems. From simulation tests on the IEEE 39-bus system, it reveals that the proposed novel FHRCNN can yield a much better performance than that of conventional multilayer perceptrons (MLP's) in terms of computational burden and classification rate     

Optimization of characteristics related to the emitter-base junction in self-aligned SEG SiGe HBTs and their application in 72-GHz-static/92-GHz-dynamic frequency dividers

Characteristics related to the emitter-base junction of self-aligned selective-epitaxial-growth SiGe heterojunction bipolar transistors (HBTs) were optimized for use with a highly-doped base. The thickness of the Si-cap layer affected both the emitter-base junction concentration and space-charge width, so the dc and ac characteristics of the SiGe HBTs were in turn dependent on this thickness. With a 4/spl times/10/sup 19/-cm/sup -3/ boron-doped base, a 131-GHz cutoff frequency and ECL gate-delay time of 5.4 ps were achieved for the optimized SiGe HBTs. A static frequency divider with a maximum operating frequency of 72.2 GHz and a dynamic frequency divider with a maximum operating frequency of 92.4 GHz were developed for optical-fiber link and millimeter-wave communication systems of the future.     

基于uClinux的字符驱动程序设计及应用

介绍了uCLinux操作系统下设备驱动程序的内部结构和功能、驱动程序的设计流程及静态加载驱动程序的方法。通过在基于SamsungS3C44BOX微处理器的嵌入式平台上开发字符型设备驱动程序（LED驱动）的实例,详细介绍了字符设备驱动程序的编写方法及如何添加到内核进行应用的具体实施过程。     

A new optoelectronic device based on modulation-dopedheterostructure: demonstration of functions as both lateral currentinjection laser and junction field effect transistor

A new type of optoelectronic semiconductor device which utilizes the modulation-doped (MOD) heterostructure is demonstrated. The device operates not only as a lateral current injection (LCI) laser but also as a junction field-effect transistor (JFET) based on the MOD heterostructure. This first demonstration of the structural compatibility of the LCI laser with the MODFET is one step toward optoelectronic integration utilizing a common two-dimensional electron gas     

无平面结敏感区及其栅控光探测器

研制了在平面结内无敏感区的光探测器,测量结果表明其光电流是显著的。在这种器件的基础上,研制了受栅极控制的无平面结敏感区光探测器,实验测量说明这种器件的光电流输出不仅依赖于受光信号,还受到栅极电压信号的控制。这种输出信号受到光与电信号双重控制的特性,扩大了光探测器件的应用领域。     

钟控神经MOS管的改进及其在多值电路中的应用

首先对钟控神经MOS管进行研究,提出了相应的改进方法.然后采用此改进的钟控神经MOS管设计了一种新型多值触发器.与传统的触发器相比较,此多值触发器具有结构简单、速度快、功耗低等特点;而且无需改变电路结构就可实现不同基的多值触发器.PSPICE模拟证明了所设计的电路具有正确的逻辑功能.     

A hydrodynamic transport model and its applications in semiconductor device simulation

In this paper, a generalized hydrodynamic model that includes four conservation equations for a general, position-dependent energy band structure and effective mass is presented. An analytical mobility model is extended to simulate two-valley semiconductor devices. A semiconductor device simulation package, DYNA, is introduced. Simulation results for both bulk materials and submicron-gate GaAs MESFETs show good agreement with experimental data and Monte Carlo device simulation results.     

Noise in high-gain transistors and its application to the measurement of certain transistor parameters

Noise performance of a high-gain transistor is presented. It is shown that both burst noise and flicker noise in high-gain transistors are not as important as those in low-gain units. At very small biases, less than 10 µA for the given transistor, the limiting noise of the transistor is dominated by the shot noise. In the higher bias region the thermal noise of the base resistance is the dominant noise of the transistor. It is also demonstrated that from noise measurement the base resistance rb'b, the transconductance gm, and the small signal common emitter-current gain β can be accurately determined.     

An open-resonator model for the analysis of a short external-cavitylaser diode and its application to the optical disk head

Based on the open resonator theory, a model of a complex coupling coefficient suitable for the analysis of an ultrashort external-cavity laser diode is presented. It is shown that the effective reflectivity of the short external-cavity laser diode calculated by using this model is a function of the size of the laser-emitting area and is significantly influenced by the phase-modification factor as well as by the amplitude-reduction factor of the complex coupling coefficient. The calculated output power characteristics show good qualitative agreement with experimental observation. The necessary condition that the optical disk head using an external-cavity laser diode does not fail to detect the recorded signal for a broad range of flying height is also derived     

Low-frequency noise figure and its application to the measurement of certain transistor parameters

Low-frequency noise measurements are shown to provide a convenient and reasonably accurate (±10 per cent) means of measuring r'_{b}. Their application to the measurement of the factornin the junction lawp_{e} = p_{n} (e_^{qV/nkT} - 1)is also described, though the values ofnobtained from noise measurements do not check accurately with the values ofndetermined by other methods. Experimental determinations of the variation of low-frequency noise figure with emitter-bias current are also presented for several transistor types. The observed behavior suggests that the principal source of1/fnoise in low-noise transistors may be in the emitter-base transition region instead of on the base surfaces where it is placed in presently accepted noise models.     

Charge storage in injection lasers and its effect on high-speed pulse modulation of laser diode

Charge storage injection lasers under transient forward bias has been found to be responsible for the difference in the observed threshold for a driving current pulse with and without another pulse preceding it. Estimated relative threshold currents of two successive pulses as a function of pulse spacing based on the charge storage model agreed reasonably well with the experiment.     

探讨半导体发光二极管及其照明的应用

现阶段,随着我国社会主义市场经济飞速发展,人们生活水平和生活质量不断提高,因此对照明事业提出了更高的要求,半导体发光二极管具备了良好的节能、环保性能,使用时间较长,具有良好的高效性,因此而被大量使用于室内外的照明当中,本文通过对发光二极管原理进行分析,探讨其照明的应用。     

A structure-oriented model for determining the substrate spreading resistance in bulk CMOS latch-up paths and its application in holding current prediction

A structure-oriented model has been developed to simulate the actual distribution of majority-carrier current flow paths in the substrate when the parasitic p-n-p-n structure with long-stripe geometry in a CMOS (complementary metal—oxide-semiconductor) circuit is at the latch-up state. Based on this structure-oriented model, the voltage drop across the latch-up path in the substrate can be calculated directly from the structure data. Therefore, the equivalent emitter-base shunting resistance in the substrate can be easily obtained and used to accurately predict the holding current. The two-dimensional numerical simulations have been carried out, based on this structure-oriented model, to obtain the emitter-base shunting resistance associated with the parasitic lateral bipolar transistor in the substrate. The computed substrate shunting resistance and the well emitter-base shunting resistance have been used to calculate the holding current with the help of the measured peak parasitic transistor gains. The predicted holding currents have been found to be in good agreement with the experimental data measured from several p-n-p-n structures, including normal and reversed layouts which are all designed by using the long-stripe geometries. Furthermore, the numerical simulations have been extended to predict the effects of the layout changes of the p-n-p-n structures on the latch-up susceptibility.