Fault Detection in Switched Current Circuits Using Built-in Transient Current Sensors

Switched current (SI) circuits use analogue memory cells as building blocks. In these cells, like in most analogue circuits, there are hard-to-detect faults with conventional test methods. A test approach based on a built-in dynamic current sensor (BIDCS), whose detection method weights the highest frequency components of the dynamic supply current of the circuit under test, makes possible the detection of these faults, taking into account the changes in the slope of the dynamic supply current induced by the fault. A study of the influence of these faults in neighbouring cells helps to minimize the number of BICS needed in SI circuits as is shown in two algorithmic analogue-to-digital converters. Yolanda Lechuga received a degree in Industrial Engineering from the University of Cantabria (Spain) in April 2000. Since then, she has been collaborating with the Microelectronics Engineering Group at the University of Cantabria, in the Electronics Technology, Systems and Automation Engineering Department. Since October 2000 she has been a post-graduate student, to be appointed as lecturer at this university, where she is working in her Ph.D. She is interested in supply current test methods, fault simulation, BIST and design for test of mixed signal integrated circuits. Román Mozuelos received a degree in Physics with electronics from the University of Cantabria, Spain. From 1991 to 1995 he was working on the development of quartz crystal oscillators. Currently, he is a Ph.D. student and an assistant teacher at the University of Cantabria in the Department of Electronics Technology. His interests include mixed-signal design and test, fault simulation, and supply current monitoring. Miguel A. Allende received his graduate degree in 1985 and Ph.D. degree in 1994, both from the University of Cantabria, Santander, Spain. In 1996, he became an Assistant Professor of Electronics Technology at the same Institution, where he is a member of the Microelectronics Engineering Group at the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. His research interests include design of VLSI circuits for industrial applications, test and DfT in digital VLSI communication circuits, and power supply current test of mixed, analogue and digital circuits. Mar Martínez received her graduate degree and Ph.D. from the University of Cantabria (Spain) in 1986 and 1990. She has been Assistant Professor of Electronic Technology at the University of Cantabria (Spain) since 1991. At present, she is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. She has participated in several EU and Spanish National Research Projects. Her main research interest is mixed, analogue and digital circuit testing, using techniques based on supply current monitoring. She is also interested in test and design for test in digital VLSI circuits. Salvador Bracho obtained his graduate degree and Ph.D. from the University of Seville (Spain) in 1967 and 1970. He was appointed Professor of Electronic Technology at the University of Cantabria (Spain) in 1973, where, at present, he is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. He has participated, as leader of the Microelectronics Engineering Group at the University of Cantabria, in more than twenty EU and Spanish National Research Projects. His primary research interest is in the area of test and design for test, such as full scan, partial scan or self-test techniques in digital VLSI communication circuits. He is also interested in mixed-signal, analogue and digital test, using methods based on power supply current monitoring. Another research interest is the design of analogue and digital VLSI circuits for industrial applications. Prof. Bracho is a member of the Institute of Electrical and Electronic Engineers.     

Single DDCC Biquads with High Input Impedance and Minimum Number of Passive Elements

Two new configurations for the design of biquad filters with high input impedance are presented. The first configuration can synthesize low-pass and high-pass filter functions according to the passive components used. The second one can synthesize a band-pass filter function. The proposed configurations employ only one differential difference current conveyor (DDCC) as active elements and minimum number of passive elements, namely two resistors and two capacitors. Another filter topology based on DDCC is presented that allows modifying the quality factor without changing its natural frequency. All the filters enjoy low sensitivities. SPICE simulation results are given to confirm the validity of the analysis and to point out the high performance of the filters.Muhammed A. Ibrahim was born in Erbil, Iraq in 1969. He obtained his B.Sc. and M.Sc. degrees from Salahaddin University, Erbil, Iraq and Istanbul Technical University, Istanbul, Turkey in 1990 and 1999, respectively, all in electronics and communication engineering. Between 1992 and 1996 he worked as Research Assistant at Salahaddin University where he was later appointed as Assistant Lecturer in 1999. Since 2000 he has been studying for his Ph.D. degree in Electronics and Communication Engineering Program at Istanbul Technical University. His main research interests are CMOS circuit design, current-mode circuits and analog signal processing applications. He has more than 20 international journal and conference papers in scientific review.H. Hakan Kuntman received his B.Sc., M.Sc. and Ph.D. degrees from Istanbul Technical University in 1974, 1977 and 1982, respectively. In 1974 he joined the Electronics and Communication Engineering Department of Istanbul Technical University. Since 1993 he is a professor of electronics in the same department. His research interest include design of electronic circuits, modeling of electron devices and electronic systems, active filters, design of analog IC topologies. Dr. Kuntman has authored many publications on modelling and simulation of electron devices and electronic circuits for computer-aided design, analog VLSI design and active circuit design. He is the author or the coauthor of 76 journal papers published or accepted for publishing in international journals, 91 conference papers presented or accepted for presentation in international conferences, 99 turkish conference papers presented in national conferences and 10 books related to the above mentioned areas. Furthermore he advised and completed the work of 7 Ph.D. students and 31 M.Sc. students. Currently, he acts as the head of the Electronics and Communication Engineering Department in Istanbul Technical University. Dr. Kuntman is a member of the Chamber of Turkish Electrical Engineers (EMO).Oguzhan Cicekoglu received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999. He served also as part time lecturer at various institutions. He was with the Biomedical Engineering Institute of the Bogazici University between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of the same University.His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. Oguzhan Cicekoglu is the author or co-author of 62 journal papers and about 90 international or local conference papers published or accepted for publishing in journals or conference proceedings.He served as the committee member in various scientific conferences and as reviewer in numerous journals including Analog Integrated Circuits and Signal Processing, IEEE CAS-I, IEEE CAS-II, International Journal of Electronics, Microelectronics Journal, Solid State Electronics and IEE Proceedings Pt.G.Oguzhan Cicekoglu is a member of the IEEE.     

On the Performance Analysis of a Class of Neuron Circuits

A new performance metric, Peak-Error Ratio (PER) has been presented to benchmark the performance of a class of neuron circuits to realize neuron activation function (NAF) and its derivative (DNAF). Neuron circuits, biased in subthreshold region, based on the asymmetric cross-coupled differential pair configuration and conventional configuration of applying small external offset voltage at the input have been compared on the basis of PER. It is shown that the technique of using transistor asymmetry in a cross-coupled differential pair performs on-par with that of applying external offset voltage. The neuron circuits have been experimentally prototyped and characterized as a proof of concept on the 1.5 μm AMI technology. Amit K. Gupta received his B.Tech. in Electrical Engineering from the Indian Institute of Technology Kanpur, India, in 2000 and the M.Sc. (Engg.) in Microelectronics from the Indian Institute of Science, Bangalore, India in 2004. He joined the Semiconductor Products Sector, Motorola (currently Freescale Semiconductor), India, in 2000, where he is currently working as a Design Engineer. His research interest includes low power analog circuit design and neuromorphic engineering. Navakanta Bhat received his B.E. in Electronics and Communication from University of Mysore in 1989, M.Tech. in Microelectronics from I.I.T. Bombay in 1992 and Ph.D. in Electrical Engineering from Stanford University, Stanford, CA in 1996. Then he worked at Motorola's Networking and Computing Systems Group in Austin, TX until 1999. At Motorola he worked on logic technology development and he was responsible for developing high performance transistor design and dual gate oxide technology. He joined Indian Institute of Science, Bangalore in 1999 where he is currently Assistant Professor in the Electrical Communication Engineering department. His current research is focused on Analog and RF Microsystems using CMOS and MEMS technology. The work includes process development, device design and modeling, circuit design. He has several research publications in international journals and conferences and 2 US patents to his credit. He is the recipient of the Young Engineer Award (2003) from the Indian National Academy of Engineering. He is currently the chair of the IEEE Electron Devices and Solid-State Circuits society, Bangalore chapter which has been recognized as the Outstanding Chapter of the Year (2003) by the IEEE SSC society.     

Capacity and Error Probability for Maximal Ratio Combining Reception over Correlated Nakagami Fading Channels

In this paper, the capacity and error probability of maximal ratio combining (MRC) reception are considered for different modulation schemes over correlated Nakagami fading channels. Based on an equivalent scalar additive white Gaussian noise (AWGN) channel, we derive the characteristic function (CF) and the probability density function (PDF) of the signal to noise ratio for MRC reception over Nakagami fading channels. Using these CF and PDF results, closed form error probability and capacity expressions are obtained for PSK, PAM and QAM modulation. Wei Li received his Ph.D. degree in Electrical and Computer Engineering from the University of Victoria in 2004. He is now a Post-doctoral Research Fellow in the Department of Electrical and Computer Engineering at the University of Victoria. He is a Member of the IEEE. His research interests include ultra-wideband system, spread spectrum communications, diversity for wireless communications, and cellular communication systems. Hao Zhang was born in Jiangsu, China, in 1975. He received his Bachelor Degree in Telecom Engineering and Industrial Management from Shanghai Jiaotong University, China in 1994, his MBA from New York Institute of Technology, USA in 2001, and his Ph.D. in Electrical and Computer Engineering from the University of Victoria, Canada in 2004. His research interests include ultra-wideband radio systems, MIMO wireless systems, and spectrum communications. From 1994 to 1997, he was the Assistant President of ICO(China) Global Communication Company. He was the Founder and CEO of Beijing Parco Co., Ltd. from 1998 to 2000. In 2000, he joined Microsoft Canada as a Software Engineer, and was Chief Engineer at Dream Access Information Technology, Canada from 2001 to 2002. He is currently an Adjunct Assistant Professor in the Department of Electrical and Computer Engineering at the University of Victoria. T. Aaron Gulliver received the Ph.D. degree in Electrical and Computer Engineering from the University of Victoria, Victoria, BC, Canada in 1989. From 1989 to 1991 he was employed as a Defence Scientist at Defence Research Establishment Ottawa, Ottawa, ON, Canada. He has held academic positions at Carleton University, Ottawa, and the University of Canterbury, Christchurch, New Zealand. He joined the University of Victoria in 1999 and is a Professor in the Department of Electrical and Computer Engineering. He is a Senior Member of the IEEE and a member of the Association of Professional Engineers of Ontario, Canada. In 2002, he became a Fellow of the Engineering Institute of Canada. His research interests include information theory and communication theory, algebraic coding theory, cryptography, construction of optimal codes, turbo codes, spread spectrum communications, space-time coding and ultra wideband communications.     

Optimization of lithographic masks using genetic algorithms

Due to its cost effectiveness and reliability, wet-chemical etching of silicon is still one of the key technologies for producing bulk-silicon microstructures. In this paper we present an approach for the design of advanced mask sets for anisotropic, wet-chemical etching of silicon. The optimization method of genetic algorithms is used to derive suitable masks for cases where geometrically calculated compensation structures fail. The underlying etch simulation is described as well as the optimization algorithm itself. Design tasks of current research projects are used as examples to illustrate the advantage of using the presented tool. Udo Triltsch was born in Bergisch Gladbach, Germany, in 1976. He received the Dipl.-Ing. degree for Mechanical Engineering from the Technical University of Braunschweig, Germany, in 2002. He is currently working towards his Ph.D. at the Institute for Microtechnology, Braunschweig, Germany. His research interests include: design methodology for MEMS, process simulation and knowledge management. Anurak Phataralaoha was born in Bangkok, Thailand, in 1973. He received the B. Eng. degree for Production Engineering from KMUTT, Thailand in 1995 and Dipl.-Ing. degree for Mechanical Engineering from Technical University of Clausthal, Germany in 2002. He is currently working towards his Ph.D. at the Institute for Microtechnology, Braunschweig, Germany. His research interests include: 3D-tactile sensors, micro machining for silicon, Tribological micro guide. Stephanus Büttgenbach obtained the Diploma and Ph.D. degrees in physics from the University of Bonn, Germany, in 1970 and 1973, respectively. From 1974 to 1985, he was with the Institute of Applied Physics of the University of Bonn, working on atomic and laser spectroscopy. In 1983, he was promoted to Professor of Physics. From 1977 to 1985, he was also a Scientific Associate at CERN in Geneva, Switzerland. In 1985, Dr. Büttgenbach joined the Hahn-Schickard-Society of Applied Research at Stuttgart as Head of the Department of Microtechnology, where he worked on micromechanics, laser microfabrication, and resonant sensors. From 1988 to 1991, he was the Founding Director of the Institute of Micro and Information Technology of the Hahn-Schickard-Society. In 1991, Dr. Büttgenbach became Professor of Microtechnology at the Technical University of Braunschweig. His current research centers on the development and application of micro sensors, micro actuators, and micro systems. Currently, he is Vice President of the Technical University of Braunschweig, where his areas of responsibility are research and technology transfer. Dima Straube was born in Berlin, Germany, in 1977. He received the Dipl.-Ing. degree for Civil Engineering from Technical University of Berlin, Germany, in 2002. He is currently working towards his Ph.D. at the Institute for Engineering Design, Braunschweig. His research interests include: design methodology for MEMS, computer aided design and tolerance management. Hans-Joachim Franke was born in Helmstedt, Germany, on February 14, 1944. He received his diploma in mechanical engineering (Dipl.-Ing.) from the Technical University of Braunschweig, Germany, in 1969. From 1969 to 1976 he was research assistant of Prof. Roth at the Institute for Engineering Design. In 1976 he received his Ph.D. degree in mechanical engineering. From 1976 to 1988 he had diverse executive positions at the KSB-AG in Frankenthal, Germany, a company, which produces pumps and valves. Since 1988 he has been the director of the Institute for Engineering Design of the Technical University of Braunschweig. His research interests are in the areas of design methodology, computer aided design and machine elements.     

Modeling and characterization of three kinds of MEMS resonators fabricated with a thick polysilicon technology

Three different kinds of two-port flexural resonators, with both clamped and free ends, and with nominal resonance frequencies between 5 MHz and 50 MHz, were designed and fabricated. Among them, a novel free-free third-mode resonator, as well as a tunable free-free resonator, designed to maintain a high quality factor despite its tunability, are presented. Because of reduced energy loss in the clamps, higher quality factors are expected from free-free devices. To estimate the resonators performance, the effect of temperature and axial stresses on the resonators is investigated: for the clamped-clamped resonator, a theoretical model is also presented. FEM simulations are performed for the three geometries and the results are discussed. Dario Paci studied electronic engineering at University of Pisa and at “Scuola Superiore Sant’Anna”. He received his Master Degree in 2003, with a dissertation on MEMS resonators for RF applications. In 2003 he worked at PEL-ETHZ for three months, modelling chemical sensors. In 2005 he was visiting scholar at the Katholieke Universiteit Leuven (Belgium), working at IMEC on MEMS resonators anchor losses modeling. His research interests include MEMS modelling and design and development of circuits for MEMS conditioning. Now he is pursuing the Ph.D. in Information Engineering at University of Pisa, and he is working as a research assistant for the IEIIT of the Italian National Council for the Research (CNR). Massimo Mastrangeli got the MS degree in Electronic Engineering at the University of Pisa (Italy) on July, 2005; his thesis concerned project and measurements of MEMS flexural resonators. During summer 2005 he was visiting scholar at the Katholieke Universiteit Leuven (Belgium), working at IMEC on the mechanical characterization of PolySiGe layers for MEMS applications. He is currently a PhD student at KULeuven, developing a techniques for self-assembly of IC/MEMS for highly integrated microsystems. Andrea Nannini received his laurea degree in Electronic Engineering from the University of Pisa, Italy, in 1982; He received his Ph.D degree in 1987 at the end of the first Italian Ph.D course held by the University of Padova, Italy. From 1988 to 1992 he was a Researcher at the "Scuola Superiore di Studi Universitari e Perfezionamento S. Anna" – Pisa- Italy. Since 1992 he joined the Department of Information Engineering of the University of Pisa as an Associate Professor. Since November 2000 he is a full professor of “Sensor and Microsystem Design”. He is currently chairman of the postgraduate school of Electronic Engineering and vice-chairman of the PhD school of Information Engineering of the University of Pisa. His main research interests concern solid state sensors, microelectronic devices and technologies, MEMS. Francesco Pieri received the laurea and the Ph.D. degree in Electrical Engineering, both from the University of Pisa, Italy, in 1996 and 2000 respectively. He joined the Department of Information Engineering of the same University as an assistant professor in 2001. His current research interests include applications of porous silicon to sensors and microtechnologies, and development of microelectromechanical systems.     

Electronic Implementation of Multirate Sigma-Delta Modulators Using CMOS Technologies

Multirating has been recently proposed to reduce the frequency rate of the first integrator(s) of a single-loop, or the first stage(s) of a cascade, Sigma-Delta modulator (SDM). This is a promising technique for the design of high speed, low-power modulators, as the first integrator (or stage) in the chain primarily determines the performances of the modulator, as well as its power consumption. This paper presents the first implementation of a 2nd-order multirate SDM, showing different circuit solutions. The experimental results obtained with a prototype in a standard 0.6 μm CMOS technology shows that different clock rates can be selected for each integrator of a SDM. Alfredo Pérez Vega-Leal was born in Seville, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2003, respectively. Since 1995, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an Associate Professor in 1999. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion. Francisco Colodro was born in Peal de Becerro (Jaén), Spain, in 1968. He received the Ingeniero de Telecomunicación degree from the University of Vigo, Vigo, Spain, in 1992, and the Ph.D. degree from the University of Sevilla, Sevilla, Spain, in 1997. In 1992 he joined the Department of Electronics Engineering, University of Sevilla, where he is currently and Associate Professor. His research interests are in the architectural study of Σ Δ modulators, the implementation of ADCs based on Σ Δ modulators, and application of electronic circuits and systems to communication. Marta Laguna was born in Seville, Spain. She received the Telecommunications Engineering degree from the University of Seville in 2002. She is currently working toward the Ph.D. degree. Her doctoral work focuses on the design of continuous-time sigma-delta modulators. Since 2001, she has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an assistant teacher in 2004. Her research interests are high-speed analog-to-digital converters and sigma-delta modulators. Antonio Torralba (M'89–SM'02) was born in Sevilla, Spain, in 1960. He received the electrical engineering and Ph.D. degrees from the University of Sevilla in 1983, and 1985, respectively. Since 1983 he has been with the Department of Electronics Engineering, School of Engineering, University of Sevilla, where he has been Associate Professor in 1987, and Full Professor since 1996, leading a research group on mixed signal design. In 1999 he made a short stay at the Department of Electrical Engineering, NMSU, and he is presently in the Department of Electrical Engineering, TAMU for a Sabbatical stay. His interests include low-voltage analog circuits and systems, analog to digital conversion, Σ Δ modulators, and electronic circuits and systems with application to control and communication. In these fields he has published around 40 journal papers and more than 100 conference papers, and he holds 2 international patents.     

On-Chip Pseudorandom MEMS Testing

This paper presents a Built-In-Self-Test (BIST) implementation of pseudo-random testing for MEMS. The technique is based on Impulse Response (IR) evaluation using pseudo-random Maximum–Length Sequences (MLS). The MLS approach is capable of providing vastly superior dynamic range in comparison to the straightforward technique using an impulse excitation and is thus an optimal solution for measurements in noisy environments and for low-power test signals. The use of a pseudo-random sequence makes the practical on-chip implementation very efficient in terms of the extra hardware required for on-chip testing. We will demonstrate the use of this technique for an on-chip fast and accurate broadband determination of MEMS behaviour, in particular for the characterisation of cantilever MEMS structures, determining their mechanical and thermal behaviour using just electrical tests.Libor Rufer has received Engineering and PhD degrees from the Czech Technical University, Prague, Czech Republic. Until 1993 he was with the Faculty of Electrical Engineering of the Czech Technical University, Prague and since 1994, he is Associate Professor at the Joseph Fourier University, Grenoble, France. In 1998, he joined the Microsystems research team of the TIMA Laboratory. Currently he is a member of the Reliable Mixed-signal Systems Group of the same Laboratory. His expertise and research interests pertain MEMS-based sensors and actuators, electro-acoustic and electro-mechanical transducers, their modelling, applications, associated measurement techniques, and analogue and mixed-signal system test.Salvador Mir has an Industrial Engineering (Electrical, 1987) degree from the Polytechnic University of Catalonia, Barcelona, Spain, and M.Sc. (1989) and Ph.D. (1993) degrees in Computer Science from the University of Manchester, UK. He is a researcher of Centre National de la Recherche Scientifique, France, and he is leading the RMS (Reliable Mixed-signal Systems) Group at TIMA Laboratory in Grenoble, France. He is the author of many research papers and editor of two books on silicon microsystems. His research interests include analogue, mixed-signal, RF and microsystem design and test, and applications of Artificial Intelligence to Computer-Aided Design.Emmanuel Simeu received Electrical Engineering degree, DEA and Ph.D. in Automatic Control from National Polytechnic Institute of Grenoble in 1987, 1988 and 1992, respectively. He is Associate Professor of Automatic Control and Electrical engineering in Joseph Fourier University of Grenoble. He is also a researcher in the RMS Group at TIMA Laboratory. His research interests include system modelling, reliability of integrated systems, online testing of analogue, digital and mixed signal systems.Christian Domingues was born in Lyon, France, in 1978. He received a Master degree in Microelectronics from the Institut National Polytechnique de Grenoble, France, in 2001. He is currently pursuing a Ph.D. degree at TIMA Laboratory in Grenoble, France. His research interests include mixed-signal integrated circuit design, and micromachined sensors and actuators.     

Sparse Approximations of the LMMSE Channel Estimation in OFDM with Transmitter Diversity

The linear minimum mean-squared error (LMMSE) channel estimation for orthogonal frequency-division multiplexing (OFDM) systems requires a large number of complex multiplications. We evaluate a simplified LMMSE channel estimation algorithm in a transmit diversity environment by applying a significant weight catching (SWC) technique to the LMMSE fixed weighting matrix. The SWC technique itself is based on modifying the smoothing matrix by leaving the Γ largest values in each row and turning the rest to zeros. This allows the computational complexity of the full LMMSE processor to be reduced by more than 50%. In the well known LMMSE by singular value decomposition (SVD) technique the sparse approximation is accomplished by zeroing out all but the r largest singular values. LMMSE by SVD is the preferred approximation technique for low delay spread channels. However, in channels with large delay spreads, LMMSE by SWC is a better choice in terms of computational complexity and estimation accuracy Igor Tolochkoreceived his Dipl.-Eng. Degree in Electrical Engineering from Polytechnic Institute, Riga, Latvia in 1987 and PhD from Victoria University, Melbourne, Australia in 2005. He was a senior and later principal design engineer in mobile communications at the Riga Semiconductor Institute Alpha (1988 – 1993). During 1993 – 1998, he was involved in research and development activities in communications with different companies in Riga and Melbourne, Australia. From 1998 to 2002, he was with Ericsson Australia as a senior design engineer. Currently, he works for NEC Australia Pty. Ltd. as a senior design engineer in 3G Mobile Department. His current research interests include digital signal processing, indoor and outdoor wireless communications and error control coding. Michael Faulkner(M'84) received the B.Sc. (Eng) from Queen Mary College, London University, UK, in 1970, the M.E. degree from the University of New South Wales, Australia in 1978, and the PhD from University of Technology Sydney in 1993. From 1972 to 1975 he was with STC (now Alcatel) Australia. From 1975 to 1977 he as with the University of New South Wales, and since then as a lecturer and now professor at Victoria University of Technology, Melbourne, Australia where he is director of the Telecommunications and Micro-electronics research centre. Between 1988 and 2000 he spent four periods at Lund University, Sweden. He was co-recipient of the IEE's 1997 IERE prize for a paper on amplifier linearisation. His current interests are, signal processing, radio technology, radio systems and MIMO/OFDM.     

A Prototype Bandpass Sigma-Delta Modulator Employing Crystal Resonator

This paper describes an initial work on a second-order bandpass Sigma-delta modulator employing crystal resonator. The aim of this work is to explore the possibilities of realizing bandpass sigma-delta modulator using non-electronic resonators, such as micro-mechanical resonators. The initial study is based on crystal resonators as they have similar characteristics as the other types of resonator and are readily available. In order to obtain the desired loop transfer function, a compensation circuit is proposed to cancel the anti-resonance in the crystal resonator. The modulator chip is fabricated in a 0.6-μ m CMOS process. The bandpass noise shaping is demonstrated in the experiment with a 1- and 8-MHz crystal resonator, respectively. Yong Ping Xu graduated from Nanjing University, P.R. China in 1977. He received his Ph.D. from University of New South Wales (UNSW) Australia, in 1994. From 1978 to 1987, he was with Qingdao Semiconductor Research Institute, P.R.China, initially as an IC design engineer, and later the deputy R&D manager and the Director. From 1993 to 1995, he worked on an industry collaboration project with GEC Marconi, Sydney, Australia, at the same university, involved in design of sigma-delta ADCs. He was a lecturer at University of South Australia, Adelaide, Australia from 1996 to 1998. He has been with the Department of Electrical and Computer Engineering, National University of Singapore since June 1998 and is now an Associate Professor. His general research interests are in the areas of mixed-signal and RF integrated circuits, and integrated MEMS and sensing systems. He is a Senior Member of IEEE. Xiaofeng Wang was born in Shangqiu, China, in 1980. He received B.Eng. degree from Northwestern Polytechnical University, Xi'an, China, in 2000 and M. Eng. degree from National University of Singapore, Singapore, in 2003, both in electrical engineering. He is currently working toward the Ph.D. degree at Tufts University, Medford, USA. His research is on high speed ADC design. Wai Hoong Sun was born in Taiping, Malaysia in 1976. He received the B. App. Sc. (Honours) degree in electrical engineering from the University of Toronto, Canada in 1999. After graduating, he joined Sharp Electronics Singapore as an R&D Engineer where he was involved in FPGA and digital IC design of display related circuits. In 2001 and 2002, he did full time research in the National University of Singapore on bandpass sigma-delta modulators. During that period, he was also a Graduate Tutor in electronics for second year electrical and computer engineering students. He then joined Philips Electronics Singapore in 2002 as a Lead Engineer. He did board-level designs for LCD and plasma televisions. He was also development project leader for a project that was successful in bringing to the market a range of LCD and plasma televisions. Currently, he is a Hardware Architect where he is responsible for the system-level electrical design of the television board.     

Mean Waiting Time Analysis in Finite Storage Queues for Wireless Cellular Networks

In this paper priority is assigned to the handover calls over new call attempts and blocked handover calls are placed in a finite storage queue. Total handover forced termination probability is evaluated and a suitable function for the mean service time at each position in the queue is theoretically estimated. Quality of service is obtained by introducing a threshold in the maximum waiting time of a handover call in the queue. In case the handover call mean service time at each queue position is found to be greater than this threshold, this call will be blocked. Simulation results show that this scheme provides satisfactory results for both types of calls. Spiros Louvros was born in Corfu Island, Hellas in 1971. He received his Bachelor in Physics from the University of Crete, Hellas and his Master of Science in telecommunications from the University of Cranfield, U.K. with a graduate scholarship from the Alexandros Onassis Institution. In 2004 he received his PhD from the University of Patras, Hellas, in mobile communications. He has worked for Siemens as a microwave engineer, for Vodafon-Hellas as a switching engineer and for Cosmote S.A. as section manager in the Operations, Maintenance & Optimization Department. His current occupation is in the Telecommunication Systems & Networks Department, Technical University of Messologi, Hellas, as an Assistant Professor. He holds several papers in international journals and conferences and he has participated in several research projects regarding mobile communications. His area of interest is in mobile networks, telecommunication traffic engineering, wireless ATM and optical communications and is documented by over 30 papers in international literature and conference proceedings. He is member of FITCE and Hellenic Physics Union. Gerasimos Pylarinos – Stamatelatos was born in Kefalonia, Greece in 1966. He receieved the B.E. in Electrical and Computer Systems Engineering from Monash University, Melbourne, Australia in 1992 and the B.E. in Electrical and Computer Systems Engineering from the University of Patras, Greece in 1994. He received the M.Sc. in Data Communications Systems from Brunel University, United Kingdom. He is currently pursuing the PhD degree at the University of Patras Greece. He has worked at Philips Radio Communication Systems, Melbourne, Australia developing hardware for mobile radio communication systems for 2 years. He subsequently worked as project manager in the Research and Development department at Intracom Radio Communication Systems, Greece for 7 years. He is now manager of the Biomedical Engineering department of Kefalonia Hospital, Greece. His research interests lie in the areas of 3G and 4G wireless communications. S. Kotsopoulos was born in Argos-Argolidos (Greece) in the year 1952. He received his B.Sc. in Physics in the year 1975 from the University of Thessaloniki, and in the year 1984 got his Diploma in Electrical and Computer Engineering from the University of Patras. He did his postgraduate studies in the University of Bradford in United Kingdom. And he is an M.Phil and Ph.D. holder since 1978 and 1985 correspondingly. Currently he is member of the academic staff of the Department of Electrical and Computer Engineering of the University of Patras and holds the position of Associate Professor. Since 2004, is the Director of the Wireless Telecommunications Laboratory and develops his professional life teaching and doing research in the scientific area of Telecommunications, with interest in mobile communications, interference, satellite communications, telematics applications, communication services and antennae design. Moreover he is the (co)author of the book titled “mobile telephony”. The research activity is documented by more than 160 publications in scientific journals and proceedings of International Conferences. Associate Professor Kotsopoulos has been the leader of several international and many national research projects. Finally, he is member of the Greek Physicists Society and member of the Technical Chamber of Greece.     

CCII-Based Grounded to Floating Immittance Converter and a Floating Inductance Simulator

A new circuit employing second-generation current conveyors (CCIIs), and unmatched resistors for converting a grounded immittance to the corresponding floating immittance with either positive or negative adjustable multiplier, is presented. Moreover, the proposed circuit can also realize a synthetic floating inductance employing a grounded capacitor depending on the passive element selection. Simulation results using 0.35 μ m TSMC CMOS technology parameters are given. Erkan Yuce was born in 1969 in Nigde, Turkey. He received the B.Sc. from Middle East Technical University and M.Sc. degrees from Pamukkale University in 1994 and 1998 respectively. He is a Ph.D. student at Bogazici University all in Electrical and Electronics Engineering. He is currently Research Assistant at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, synthetic inductors, and current-mode circuits. He is the author or co-author of about 10 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu was born in 1963 in Istanbul, Turkey. He received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999, and as part time lecturer at various institutions. He was with Biomedical Engineering Institute between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. He is the author or co-author of about 150 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu is a member of the IEEE. Shahram Minaei received his B.Sc. degree in Electrical and Electronics Engineering from Iran University of Science and Technology in 1993. He received his M.Sc. and Ph.D. degrees in Electronics and Communication Engineering from Istanbul Technical University in 1997 and 2001, respectively. He is currently an Associate Professor at the Electronics and Communication Engineering Department of Dogus University in Istanbul, Turkey. He has more than 50 journal or conference papers in scientific review. He served as reviewer for a number of international journals and conferences. His current field of research concerns current-mode circuits and analog signal processing. Shahram Minaei is a member of the IEEE.     

Cascode Monolithic DC-DC Converter for Reliable Operation at High Input Voltages

A CMOS OTA-C low-pass notch filter for EEG application is described. The pass-band covers four bands of brain wave and provides more than 65 dB attenuation for the 50 Hz power line interference. The OTA works in the weak inversion region and a low transconductance of 3 nA/V is achieved. The low transconductance enables using small capacitors in the OTA-C filter so that the filter is suitable for the multi-channel EEG integrated circuits. The measured results show the good performance of the filter for filtering the noise in acquired EEG signals. Xinbo Qian received the B.Sc. degree from Beijing Institute of Technology, P.R. China, in 1991 and M.Sc. degree from Institute of Physics, Chinese Academy of Sciences, in 1996. From 1996 to 1999, she was a research engineer in the Institute of Acoustics, Chinese Academy of Sciences, worked on the sonar signal receiving and processing systems. Since 1999, she has been pursuing the Ph.D. degree in Electrical and Computer Engineering department, National University of Singapore, with research direction on on-chip readout circuits for microbolometer focal plane arrays. Now she is employed by Department of Mechanical Engineering and Division of Bioengineering, National University of Singapore as a research fellow. Her research interest is low-noise integrated circuits design and bio-medical sensor electronics, including electroencephalography IC, magnetocardiography IC, low-noise amplifier, filter and data converters etc. Yong Ping Xu graduated from Nanjing University, P.R. China in 1977. He received his Ph.D. from University of New South Wales (UNSW) Australia, in 1994. From 1978 to 1987, he was with Qingdao Semiconductor Research Institute, P.R. China, initially as an IC design engineer, and later the deputy R&D manager and the Director. From 1989 to 1992, he was working on silicon diode based infrared detectors towards his Ph.D. at School of Electrical Engineering, UNSW Australia. From 1993 to 1995, he worked on an industry collaboration project with GEC Marconi, Sydney, Australia, at the same university, involved in design of sigma-delta ADCs. He was a lecturer at University of South Australia, Adelaide, Australia from 1996 to 1998. He has been with the Department of Electrical and Computer Engineering, National University of Singapore since June 1998 and is now an Associate Professor. His general research interests are in the areas of mixed-signal and RF integrated circuits, and integrated MEMS and sensing systems. His current focuses are high-speed wideband ADC, UWB front-end circuits and low-power low-voltage integrated circuits for biomedical applications. He is a Senior Member of IEEE. Xiaoping Li received his Ph.D. degree from Department of Mechanical and Manufacturing Engineering, University of New South Wales, Australia in 1991, and joined the National University of Singapore in 1992, where he is currently an Associate Professor with the Department of Mechanical Engineering and Division of Bioengineering. He was a visiting professor of Tokyo Institute of Technology, Japan in 2000, and visiting professor of Georgia Institute of Technology, USA in 2001. He is a member of American Society of Mechanical Engineers (ASME), a senior member of Society of Manufacturing Engineering (SME) and a senior member of North American Manufacturing Research Institute/SME, and is currently the Chairman of SME Singapore Chapter. His current research interests include neurosensors and nanomachining. He is a guest editor of International Journal of Computer Applications in Technology, USA. He is a regular reviewer of the ASME Journal of Manufacturing Engineering, USA, Transactions of NAMRI/SME, USA, Journal of materials processing technology, UK, International Journal of Machine Tools and Manufacture, UK, and IMechE Journal of Engineering Manufacture, UK.     

A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices

This paper extends the timing test model in [5] to be more realistic by including the effects of the test fixtures between a device under test and a tester. The paper enables analyzing the trade-offs that arise between the predicted yield and the required overall test environment timing accuracy (OTETA) which involves the tester overall timing accuracy (OTA) and the test fixtures' impacts. We specifically focus on the application of the extended model to predict the test yield of standard high-speed interconnects, such as PCI Express, Parallel/Serial RapidIO, and HyperTransport. The extended model reveals that achieving an actual yield of 80% with a test escape of 300 DPM (Defects Per Million) requires an equivalent OTETA that is about half the acceptable absolute limit of the tested parameter. Baosheng Wang received his B.S. degree from Beijing University of Aeronautics and Astronautics (BUAA), Beijing, P.R. China, in 1997 and M.S. degree from Precision Instrument & Mechanical Engineering from the Tsinghua University, Beijing, P. R. China in 2000. In 2005, he received his Ph.D. degree in Electrical Engineering from the University of British Columbia (UBC), Vancouver, BC, Canada. During his Master study, he was doing MEMS, Micro Sensors and Digital Signal processing. From 2000 to 2001, he worked in Beijing Gaohong Telecommunications Company as a hardware engineer in ATM technology. Currently, he is a Design-for-Test (DFT) engineer at ATI Technologies Inc., Markham, Ontario, Canada. He publishes widely at international conferences and journals. His primary research interests are time-driven or timing-oriented testing methodologies for System on-a-Chip (SoC). These fields include test time reduction for SRAMs, accelerated reliability test for non-volatile memories, yield analysis for SoC timing tests, SoC path delay timing characterization and embedded timing measurements. Andy Kuo is currently a Ph.D student of System on a Chip (SoC) Research Lab at the Department of Electrical and Computer Engineering, University of British Columbia. He received his M.A.Sc. and B.A.Sc in electrical and computer engineering from University of British Columbia and University of Toronto in 2004 and 2002 respectively. His research interests include high-speed signal integrity issues, jitter measurement, serial communications. Touraj Farahmand received the B.Sc. degree in Electrical Engineering from Esfahan University of Technology, Esfahan, Iran in 1989 and the M.Sc. in Control Engineering from Sharif university of Technology, Tehran, Iran in 1992. After graduation, he joined the Electrical and Computer Research center of Esfahan University of Technology where he was involved in the DSP algorithm development and design and implementation of the control and automation systems. Since October 2001, he has been working in the area of high-speed signal timing measurement at SoC (System-on-a-Chip) lab of UBC (University of British Columbia) as a research engineer. His research interests are signal processing, jitter measurement, serial communication and control. André Ivanov is Professor in the Department of Electrical and Computer Engineering, at the University of British Columbia. Prior to joining UBC in 1989, he received his B.Eng. (Hon.), M. Eng., and Ph.D. degrees in Electrical Engineering from McGill University. In 1995–96, he spent a sabbatical leave at PMC-Sierra, Vancouver, BC. He has held invited Professor positions at the University of Montpellier II, the University of Bordeaux I, and Edith Cowan University, in Perth, Australia. His primary research interests lie in the area of integrated circuit testing, design for testability and built-in self-test, for digital, analog and mixed-signal circuits, and systems on a chip (SoCs). He has published widely in these areas and holds several patents in IC design and test. Besides testing, Ivanov has interests in the design and design methodologies of large and complex integrated circuits and SoCs. Dr. Ivanov has served and continues to serve on numerous national and international steering, program, and/or organization committees in various capacities. Recently, he was the Program Chair of the 2002 VLSI Test Symposium (VTS'02) and the General Chair for VTS'03 and VTS'04. In 2001, Ivanov co-founded Vector 12, a semiconductor IP company. He has published over 100 papers in conference and journals and holds 4 US patents. Ivanov serves on the Editorial Board of the IEEE Design and Test Magazine, and Kluwer's Journal of Electronic Testing: Theory and Applications. Ivanov is currently the Chair of the IEEE Computer Society's Test Technology Technical Council (TTTC). He is a Golden Core Member of the IEEE Computer Society, a Senior Member of the IEEE, a Fellow of the British Columbia Advanced Systems Institute and a Professional Engineer of British Columbia. Yong Cho received the B.S. degree from Kyung Pook National Unviersity, Korea, in 1981 and the M.S. degree from in electrical and computer engineering from the University of South Carolina, Columbia, S.C., in 1988 and the Ph.D. degree in electrical engineering and applied physics from Case Western Reserve University, Cleveland, OH, in 1992. He is currently a Professor with the Department of Electronics Engineering, Konkuk University, Seoul, Korea. His recent research interests include SoC Design and Verification, H/W and S/W co-design, and embedded programming on SoC. Sassan Tabatabaei received his PHD in Electrical Engineering from the University of British Columbia, Vancouver, Canada in 2000. Since then, he has held several senior technical positions at Vector12 Corp, Guide Technology, and Virage Logic. His professional and research interests include mixed-signal design and test, and signal integrity and jitter test methodologies for high-speed circuits and multi-Gbps serial interfaces. He has published several papers and holds a US patent in the area of timing and jitter measurement. Currently, he holds the position of the director for embedded test at Virage Logic Corporation.     

1.1 V Low-Power ΣΔ Modulator for 14-bit, 16 KHz A/D Conversion Using a New Low-Voltage Class-AB Op-amp

This paper presents the implementation of a second order modulator for a 1.1 V supply voltage. A new class-AB CMOS operational amplifier has been designed in order to achieve high-resolution under very-low-voltage operation. The modulator has been implemented using a 0.35 m CMOS technology with 0.65 V transistor threshold voltage. Experimental results show 14 bits of resolution over 16 kHz nyquist rate with an oversampling ratio of 160.Fernando Muñoz Chavero was born in El Saucejo, Sevilla, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2002, respectively. Since 1997, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1999). His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.Alfredo Pérez Vega-Leal was born in Seville, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2003, respectively. Since 1995, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an Associate Professor in 1999. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion.Ramón González Carvajal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1995 and 1999, respectively. Since 1996, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1996), and Professor (2002). He has published more than 100 papers in International Journals and Conferences. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.Antonio Torralba was born in Seville, Spain. He received the electrical engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1983 and 1985, respectively. Since 1983, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Assistant professor, Associate Professor (1987), and Professor (1996). He has published 30 papers in journals and more than 80 papers in conferences. His research interests are in the design and modeling of low-voltage analog circuits, analog and mixed-signal design, analog to digital conversion, and electronic circuits and systems with application to control and communication.Jonathan Noel Tombs was born in Oxford, UK. He received the Electrical Engineering and Ph.D. degrees from Oxford University, UK, in 1987 and 1991, respectively. Since 1993, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1997), and Professor (2002). He has published more than 50 papers in International Journals and Conferences. His research interests are related to Digital Design and system verification with VHDL, low-voltage low-power analog circuit design, A/D and D/A conversion and analog and mixed signal processing.Jaime Ramírez-Angulo is currently Klipsch Distinguished Professor, IEEE fellow and Director of the Mixed-Signal VLSI lab at the Klipsch School of Electrical and Computer Engineering, New Mexico State University (Las Cruces, New Mexico), USA. He received a degree in Communications and Electronic Engineering (Professional degree), a M.S.E.E. from the National Polytechnic Institute in Mexico City and a Dr.-Ing. degree form the University of Stuttgart in Stuttgart, Germany in 1974, 1976 and 1982 respectively. He was professor at the National Institute for Astrophysics Optics and Electronics (INAOE) and at Texas A&M University. His research is related to various aspects of design and test of analog and mixed-signal Very Large Scale Integrated Circuits.     

G729 Voice Decoder Design

Embedded digital signal processing (DSP) systems are usually associated with real time constraints and/or high data rates such that fully software implementations are often not satisfactory. In that case, mixed hardware/software implementations are to be investigated. This paper presents the design of a HW/SW G.729 voice decoder dedicated to embedded systems. The decoder has been built around, on the one hand a reconfigurable digital circuit (FPGA) to achieve the so called IP hardware part—the autocorrelation computation—using a linear systolic array, and on the other hand a digital signal processor (DSP) for the remainder of the algorithm. Apart such an implementation is typically driven by the use of reusable component (IP) it is of great interest for new G729-based applications such as Voice over IP (VoIP) for example. It results in an overall reduction of the execution time per frame. Another interesting point is the design of a parameterizable autocorrelation block which can be useful for a wide range of applications such as GSM 13 Kbit/s, APC 9.6 Kbit/s and G723 6.3 Kbit/s and 5.3 Kbit/s. In the G729 context and using a V50 Virtex FPGA, the execution time of this function is 10 times faster than a TMS320C6201 DSP implementation. Fatma Sayadi is Ph.D. student at Faculty of Sciences, Monastir, Tunisia in collaboration with the LESTER Laboratory, University de Bretagne Sud, Lorient, France. She is a member of Laboratory of Electronics and Micro-Electronics. His researches interest, the implementation of Digital Signal, high level design using VHDL language, Hardware/Software Co-design. Emmanuel Casseau received his Ph.D Degree in Electrical Engineering in 1994. He is currently an Associate Professor in the Electronic Department at the University de Bretagne Sud, Lorient, France. He is also in charge of the IP project of the Lester Lab., University de Bretagne Sud. His research interests include system design, high-level synthesis, virtual components and SoCs. Mohamed Atri born in 1971, received his Ph.D. Degree in Micro-electronics from the Science Faculty of Monastir in 2001. He is currently a member of the Laboratory of Electronics & Micro-electronics. His research includes Circuit and System Design, Network Communication, IPs and SoCs. Mehrez Marzougui received the B.Sc. degree from University of Science and Technology (electronic option), Monastir, Tunisia, and the M.Sc. degree in electronic from the same university in 1996 and 1998 respectively. Since 1998, he has been a Ph.D. candidate in Electronic and Micro-electronic laboratory at the University of Sciences and Technology, Monastir, Tunisia. His research interests include hardware/software co-verification and high-level synthesis. Rached Tourki was born in 1948. He received the B.S. degree in Physics (Electronics option) from Tunis University, in 1970; the M.S. and the Doctorat de 3eme cycle in Electronics from Institut d'Electronique d'Orsay, Paris-south University in 1971 and 1973 respectively. From 1973 to 1974 he served as microelectronics engineer in Thomson-CSF. He received the Doctorat d'etat in Physics from Nice University in 1979. Since this date he has been professor in Microelectronics and Microprocessors with the physics department, Faculte des Sciences de Monastir. Eric Martin born in 1961, is a Full Professor at the University of South Brittany in Lorient, France. His interest includes the implementation of Digital Signal and Image Processing and high-level design methods for dedicated circuits.     

Reduced-Complexity Iterative Multiuser Detection for DS-CDMA

A reduced-complexity iterative multiuser detection scheme is proposed. The scheme involves a simple way of choosing only K + 1 user bit vectors instead of the full-complexity 2^K for the likelihood computation, thus reducing the complexity to O(K). An alternative, reduced computation method of increasing this list of vectors after each iteration is also presented. Simulations over AWGN, imperfect power control and multipath conditions demonstrate that the performance of the proposed reduced-complexity method is close to that of the full-complexity.Ju Yan Pan received the B.S.E.E. degree from Mississippi State University, U.S.A., in 1998 and the M.Eng. degree from Nanyang Technological University, Singapore, in 2002. He is currently working as a system design engineer at the wireless communication technology department of Oki Techno Centre Pte. Ltd. in Singapore Science Park II. His current reserach interests include third-generation WCDMA systems, turbo decoding and multiuser detection.Cheong Boon Soh received the Bachelor of Engineering in Electrical and Computer Systems Engineering (Hons I) and Ph.D. degrees from Monash University, Victoria, Australia, in 1983 and 1987, respectively. He is an Associate Professor in the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore. He has published more than one hundred international journal papers. His current research interests are robust control, system theory, nonlinear systems, coding theory, mobile communication systems and intelligent systems.Gunawan Erry received his B.Sc degree in Electrical and Electronic Engineering from the University of Leeds, U.K., in 1983. He then received his MBA and Ph.D. in total technology from Bradford University in 1984 and 1988 respectively. From 1984 to 1988, he worked for Communication Systems Research Ltd, U.K. as a satellite communication systems engineer. In 1988, he moved to Space Communications (SAT-TEL) Ltd, U.K. He joined the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore in 1989. Currently, he is an Associate Professor in the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore. His current research interests are in digital communications, mobile and satellite communications, error coding and spread-spectrum. He has published over sixty international research papers and has been a consultant to a local company on the study of DECT system and Bluetooth.     

Voltage-Mode Universal Biquadratic Filters with One Input and Five Outputs

Four new voltage-mode universal biquadratic filters each with one input terminal and five output terminals are presented. Each of the first two proposed circuits uses four plus-type second-generation current conveyors, two grounded capacitors and five resistors. The third proposed circuit employs two plus-type second-generation current conveyors, one differential voltage current conveyor, two grounded capacitors and five resistors. The fourth proposed circuit employs two multi-output second-generation current conveyors, two grounded capacitors and five resistors. Each of the proposed circuits can realize all the standard filter functions; highpass, bandpass, lowpass, notch and allpass, simultaneously, without changing the passive elements. The proposed circuits enjoy the features of orthogonal controllable of resonance angular frequencies and quality factors, using only grounded capacitors as well as low active and passive sensitivities. Jiun-Wei Horng was born in Tainan, Taiwan, Republic of China, in 1971. He received the B.S. degree in Electronic Engineering from Chung Yuan Christian University, Chung-Li, in 1993, and the Ph.D. degree from National Taiwan University, Taipei, in 1997. From 1997 to 1999, he served as a Second-Lieutenant in China Army Force. From 1999 to 2000, he joined CHROMA ATE INC. where he worked in the area of video pattern generator technologies. From 2000 to 2005, he joined the Department of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan as an Assistant Professor. Since 2005, he is an Associate Professor. His teaching and research interests are in the areas of Circuits and Systems, Analog and Digital Electronics, Active Filter Design and Current-Mode Signal Processing. Chun-Li Hou was born in Taipei, Taiwan, Republic of China, in 1951. He received the B.S. degree, M.S. degree, and Ph.D. degree in Electrical Engineering from National Taiwan University, Taipei, in 1974, 1976, and 1991, respectively. From 1977 to 1979, he taught as a lecture in Tamkang College. From 1981 to 1991, he taught as a lecture in the department of Electronic Engineering, Chung-Yuan Christian University, Chung, Taiwan. From 1992 until now, he taught there as an Associate Professor. His teaching and research interests are in the areas of Current-Mode Analog Circuit Analysis and Design, Active Network Synthesis Circuit theory and Applications. Chun-Ming Chang obtained his bachelor and master degrees, both in the field of electrical engineering, from National Cheng Kung University, Tainan, Taiwan, R.O. China, and his Ph.D. degree in the field of electronics and computer science from the University of Southampton, U.K. He had been an associate professor in Chung Yuan Christian University in Taiwan from 1985 to 1991, and has been a full professor in the same University since 1991. His research interest is divided by two relative fields, network synthesis before 1991 and analog circuit design after 1991. He had been a chairman of the electrical engineering department in Chung Yuan Christian University from 1995 to 1999. Recently, he was recommended for inclusion in The Contemporary Who's Who of Professionals 2004 Edition, and nominated by the Governing Board of Editors of the American Biographical Institute for the prestigious title MAN OF THE YEAR-2005, and became an Advisor of the ABI's distinguished RESEARCH BOARD OF ADVISORS due to the invention of Analytical Synthesis Method and OTA-Only-Without-C Circuits in the field of analog circuit design. Wen-Yaw Chung was born in Hsin-Chu, Taiwan, R.O.C., 1957. He received the B.S.E.E. and M.S. degrees from Chung Yuan Christian University, Chung Li, Taiwan, in 1979 and 1981 respectively, and the Ph.D. degree in Electrical and Computer Engineering from Mississippi State University, USA, in 1989. Subsequently, he joined the Advanced Microelectronics Division, Institute for Technology Development in Mississippi, where he was involved in the design of a bipolar optical data receiver. In 1990 he worked as a design manager for the Communication Product Division, United Microelectronics Corporation, Hsin-Chu, where he was involved in the design of analog CMOS data communication integrated circuits. Since 1991 he has been an Associate Professor in the Department of Electronic Engineering at Chung Yuan Christian University. His research interests include mixed-signal VLSI design, biomedical IC applications, sensor and actuator interfacing for deep submicron VLSI electronics.