提高晶闸管器件对di/dt的耐受能力的途径

介绍了晶闸管器件的通态电流上升率di/dt参数及其损坏晶闸管器件的机理，并进一步介绍了提高晶闸管器件的通态di/dt耐量的设计和工艺方法，及应用过程中限制晶闸管阳极电路的电流上升率，保护晶闸管器件的方法。     

高灵敏度500A,2000V光控晶闸管的研制

本文介绍一种高灵敏度光触发晶闸管的结构特点及关键的生产工艺,并对该器件进行了理论分析和主要参数的计算机辅助设计,提出了带有薄n层的台阶形光敏门极结构可使器件获得较高的光触发灵敏度和较好的触发灵敏度与dv/dt耐量间的协调关系。研制成功的直径为45mm、容量为500A、耐压为2000V的器件的最小光触发功率小于3mW,dv/dt耐量大于1000V/μs,di/dt耐量大于100A/μs通态峰值压降小于2V。     

20对?还是100对?——关于电流上升率测试的一段纠纷

大约28年前,在“1700轧机“攻关中,有6个晶闸管制造单位承担了制造500A/2000V～2500V风冷晶闸管的课题。根据整机应用的需要,di/dt(电流上升率)达到50A/μs是一项必考指标。此前,虽然在颁布的产品标准中规定了di/dt耐量的测试线路和测试方法,但对此大功率晶闸管适用的测试设备尚未制造出来,该测试设备的研制及其对di/dt的测试实践在国内都是首次尝试。     

考虑温度影响的SiC MOSFET动态性能分析与优化

SiC器件的高开关速度使其瞬态过程的非理想特性大为增加,对杂散参数也更为敏感,容易激发高频振荡和过冲.为充分发挥其高开关速度优势,提升系统控制性能,首先,建立SiC MOSFET开关瞬态解析模型,提取了开关过程的关键动态性能参数电流变化率(di/dt)和电压变化率(dv/dt);其次,通过理论分析,明确了di/dt和dv/dt的关键影响因子为驱动电阻、栅源电容、栅漏电容和温度.然后,在Simplorer软件中搭建双脉冲测试电路,定量分析了不同驱动参数和温度对di/dt和dv/dt的影响规律.结果 表明:驱动参数对di/dt和dv/dt具有不同的控制效果,并且di/dt和dv/dt在开通、关断过程分别体现正温度特性和负温度特性.最后,以150℃环境为例,通过减小关断电阻补偿温度影响,实现了在不增大电应力的前提下,关断损耗降低了8.37％.     

特高压晶闸管p-层穿通和p+层发射极结构设计

基于传统晶闸管单扩散p层杂质浓度分布很难协调阻断电压、通流能力、通态压降、反向恢复电荷和关断时间之间的矛盾,无法使特高压晶闸管的通流能力由4 000 A提高到4 500 A。对特高压晶闸管采用低浓度p-层穿透、高浓度p+层发射极结构设计进行了理论分析并进行了工艺实验,测试结果表明,特高压晶闸管在不损失阻断电压(≥8 500 V)前提下,芯片厚度减薄0.05 mm、通态压降下降0.11 V,反向恢复电荷、dV/dt耐量、di/dt耐量、关断时间等得到优化,研制了6英寸(1英寸=2.54 cm)4 500 A/8 500 V特高压晶闸管,并成功应用于±800 kV/7 200 MW特高压直流输电工程中。     

特高压晶闸管结终端造型技术

分析了传统晶闸管结终端造型技术的优缺点.基于双负角结终端造型技术,通过径向变掺杂技术和类台面造型技术改进,发展了一种全新的结终端造型技术.该技术不仅使芯片极薄化,而且使结终端造型占用芯片长度极小化,同时使有效导通长度极大化.制造并测试了三种不同结终端造型技术的样品,测试结果表明,采用该技术的样品在不降低阻断电压(≥8 000 V)前提下,具有更小的漏电流(2.50 mA);在流过相同的通态电流(4 500 A)时,具有更小的通态压降1.782 V;而且反向恢复电荷、dv/dt耐量、di/dt耐量、关断时间等得到全面优化.成功研制了6英寸(1英寸=2.54 cm)电流为4 500 A、阻断电压为8 500 V的特高压晶闸管,其动态特性和参数的一致性满足设计及应用要求.     

分段式电流舵 D/A转换器抗di/dt噪声设计

设计了一个8位50MHzD/A转换器(DAC),采用5+3分段式电流舵差分输出结构,其中高5位采用温度计码方式译码,低3位采用二进制译码方式;从各电路模块设计结构上提高DAC抗di/dt噪声的能力;设计了一个低交叉点开关驱动电路,有效地降低了输出毛刺,减小了数字电路di/dt噪声的影响。采用VIS0.35μmCMOS工艺进行仿真,结果表明,微分非线性(DNL)和积分非线性(INL)均小于0.15LSB。     

超结高压MOSFET驱动电路及EMI设计

分析了超结结构功率MOSFET在开关过程中由于Coss和Crss电容更强烈的非线性产生更快开关速度的特性;给出了不同外部驱动参数对开关过程的dV/dt和di/dt的影响;列出了不同驱动电路开关波形及开关性能的变化.最后,设计了优化驱动电路,实现优化的EMI结果,并给出了相应驱动电路的EMI测试结果.     

MOSFET反向恢复对不同应用的影响

传统上，FET体二极管反向恢复行为采用双脉冲试验方法来评估。由于这种试验方法旨在得出QIT和IRRM参数，因此，所施加的di／dt相对比较缓慢（100A／us）。在一定程度上，缓慢的dj，dt是因袭陈规，但同时也是因为随着di／dt的提高，寄生电感（Ldi／dt）会妨碍精确测定感兴趣的参数，     

金属氧化物半导体控制晶闸管的di/dt优化

金属氧化物半导体控制晶闸管(MCT)相比于绝缘栅双极型晶体管(IGBT)具有高电流密度、低导通压降和快速开启等优势,在高压脉冲功率领域具有广阔的应用前景.作为脉冲功率开关,MCT开启过程对输出脉冲信号质量有很大影响.采用理论分析并结合仿真优化重点研究了MCT开启瞬态特性.通过对MCT开启过程进行详细地理论分析推导,给出了MCT开启过程中阳极电流和上升时间的表达式.结合Sentaurus TCAD仿真优化,将MCT开启过程中电流上升速率(di/dt)由40 kA/s提升至80 kA/s,极大地改善了器件开启瞬态特性.最后,总结提出了提高器件开启瞬间di/dt的设计途径.     

High-energy pulse-switching characteristics of thyristors

Experiments were conducted to study the high energy, high di/dt pulse-switching characteristics of silicon controlled rectifiers (SCRs) with and without the amplifying gate. High di/dt, high-energy single-shot experiments were first done. Devices without the amplifying gate performed much better than the devices with the amplifying gate. A physical model is presented to describe the role of the amplifying gate in the turn-on process, thereby explaining the differences in the switching characteristics. The turn-on area for the failure of the devices was theoretically estimated and correlated with observations. This allowed calculation of the current density required for failure. Since the failure of these devices under high di/dt conditions was thermal in nature, a simulation using a finite-element method was performed to estimate the temperature rise in the devices. The results from this simulation showed that the temperature rise was significantly higher in the devices with the amplifying gate than in the devices without the amplifying gate. From these results, the safe operating frequencies for all the devices under high di/dt conditions was estimated. These estimates were confirmed by experimentally stressing the devices under high di/dt repetitive operation     

The di/dt capability of thyristors

This paper describes an experimental investigation of the di/dt failure mechanism of thyristors. The location of the initial turn-on region and the spread of the "on" region were observed on a specially designed thyristor having many monitoring electrodes. The turn-on process was studied for triggering by gate, by breakover, and by dv/dt. In many cases it was found that turn-on occurred at almost the same region, whether it was triggered by breakover or by dv/dt. This area coincided with the final holding position in the turn-off process. The di/dt capability of the thyristor was measured. It was found that the capabilities were almost the same for the three triggering methods. The destruction temperature in the di/dt test was estimated from the area of the burn-out spots and the energy dissipation.     

Behavior of thyristors under transient conditions

The capability of gate-triggered thyristors to withstand steep wavefront, high-current pulses (i.e., di/dt capability) is a function of both junction temperature and frequency of operation. Localized internal heating occurs during turn-on and may lead to thermal runaway. The conditions required for this to occur have been determined by destructively testing many devices. The initial conducting area of a thyristor largely determines di/dt capability, which is not necessarily related to the size of the device but is a function of the design of the gate region. Gate drive is very important for determining the di/dt capability of a thyristor having a conventional gate design. Two devices which have been designed to increase the initial conducting area are discussed. One of these devices, if improperly designed, can lose its effectiveness with high gate drive. This characteristic can be studied by observing the reverse recovery current immediately following short forward current pulses.     

An EBS (electron bombarded semiconductor) high-current pulse amplifier

An EBS (electron bombarded semiconductor) pulse amplifier which generates high-current fast-risetime variable-width pulses into low impedance loads is described. Current pulses of 100 A into a 1-Ω load have been obtained with a risetime of 2.2 ns. A di/dt of 40 000 A/µs and a dV/dt of 71 000 V/µs have been obtained. Pulse lengths to 1 µs at 0.1-percent duty have been achieved. The risetime and peak current capabilities are presently limited by internal circuit parasitics. Without parasistics, the theoretical peak output capabilities for this EBS are 340 A with a di/dt of 6 × 10⁵A/µs.     

Design and characterization of a CMOS off-chip driver/receiver withreduced power-supply disturbance

A CMOS off-chip signal driver that achieves a 2.5-3 times smaller di/dt noise than the conventional design while not incurring the penalty of signal delay is described. It minimizes L di/dt effects by reducing the output signal swing by about a factor of 2 and by providing a controlled ramp rate for the output current. The circuit has a nearly constant output resistance for source termination of transmission lines, and includes a receiver designed for the smaller signal swing. Simulations show a driver-receiver delay of 3 ns for a 7.5-cm line on a multichip package with a peak di/dt of only 12 mA/ns. Driver-receiver delay and noise measurements are also presented     

Power Converter EMI Analysis Including IGBT Nonlinear Switching Transient Model

It is well known that very high dv/dt and di/dt during the switching instant is the major high-frequency electromagnetic interference (EMI) source. This paper proposes an improved and simplified EMI-modeling method considering the insulated gate bipolar transistor switching-behavior model. The device turn-on and turn-off dynamics are investigated by dividing the nonlinear transition by several stages. The real device switching voltage and current are approximated by piecewise linear lines and expressed using multiple dv/dt and di/dt superposition. The derived EMI spectra suggest that the high-frequency noise is modeled with an acceptable accuracy. The proposed methodology is verified by experimental results using a dc-dc buck converter     

Silicon carbide PiN and merged PiN Schottky power diode models implemented in the Saber circuit simulator

Dynamic electrothermal circuit simulator models are developed for silicon carbide power diodes. The models accurately describe the temperature dependence of on-state characteristics and reverse-recovery switching waveforms. The models are verified for the temperature dependence of the on-state characteristics, and the di/dt, dv/dt, and temperature dependence of the reverse-recovery characteristics. The model results are presented for 1500 V SiC Merged PiN Schottky (MPS) diodes, 600 V Schottky diodes, and 5000 V SiC PiN diodes. The devices studied have current ratings from 0.25 A to 5 A and have different lifetimes resulting in different switching energy versus on-state voltage trade-offs. The devices are characterized using a previously reported test system specifically designed to emulate a wide range of application conditions by independently controlling the applied diode voltage, forward diode current, di/dt, and dv/dt at turn-off. A behavioral model of the test system is implemented to simulate and validate the models. The models are validated for a wide range of application conditions for which the diode could be used.     

Progress in light activated power thyristors

Light activated power thyristors would have considerable advantages in intermediate- and high-voltage circuits, as power and trigger circuits could be electrically separated by use of glass fiber cables. Besides high-voltage capability, such devices must have turn-on delay times, dv/dt capabilities, and di/dt stabilities which are comparable to conventionally fired thyristors. The necessary trigger power, however, has to be kept low enough to enable firing with GaAs light emitters, which are available now or will be in the near future. The dv/dt sensitivity is an essential limitation for the reduction of the minimum necessary trigger power. Optimizing of the thyristor emitter shunts results in an already acceptable compromise, but much better results can be obtained by a gate structure which actively compensates dv/dt fault triggering. Our test devices show good turn-on behavior. A short survey on different GaAs-light sources and the coupling problem is given.