快速热退火硅中微缺陷分析

本文通过高剂量注砷硅的一系列快速热退火实验,分析了注入晶格损伤恢复情况和二次缺陷生长过程。在实验结果的基础上综合研究了快速热退火硅中的微缺陷过程。     

砷注入硅中高温瞬态热退火研究

本文采用阳极氧化法剥层技术和扩展电阻法研究了砷离子注入硅中的高温瞬态热退火行为;测定了退火后杂质分布结深和杂质激活率,并与理论结果进行了比较。结果表明:120keV 砷注入5×10~(15)cm~(-2),经1180℃3分钟退火后,杂质激活率和再分布情况都比较理想。本研究首次采用扩散炉进行高温热退火。     

电子辐照高阻NTD硅中缺陷能级和少数载流子寿命

<正>近十几年来,用中子嬗变技术在硅中进行磷掺杂,可获得n型高阻NTD硅单晶,用电子辐照在硅中引入复合中心以降低少子寿命的方法,也引起人们的极大关注.为此,我们将NTD硅制成p~+n结二极管,经电子辐照后,分别从深能级瞬态谱(DLTS)测量中获得相应的缺陷能级、俘获截面和浓度等参数,并用二极管反向恢复时间法,测量了这些样品的少子寿命.对所得结果作出初步的分析讨论.     

注砷硅快速热退火过程研究

本文研究砷注入硅后以高频感应石墨作辐射热源的快速热退火过程.实验结果表明,快速热退火过程可分为二个阶段:第一阶段为固相外延再生长.第二阶段为高温消除损伤.     

注硅不掺杂半绝缘GaAs中的深能级缺陷

用DLTS法对经两步快速热退火(RTA)后的注硅不掺杂SI-GaAs中的缺陷进行了研究。确定了激活层中存在着两个电子陷阱组(以主能级ET1、ET2标记)及其电学参数的深度分布。在体内,ET1=Ec0.53eV,n=2.310-16cm2;ET2=Ec0.81eV,m=9.710-13cm2;密度典型值为NT1=8.01016cm-3,NT2=3.81016cm-3;表面附近,ET1=Ec0.45eV,NT1=1.91016cm-3;ET2=Ec0.71eV,NT2=1.21016cm-3,分别以[AsiVAs,AsGa]和[VAsAsiVGaAsGa]等作为ET1和ET2的缺陷构型解释了它们在RTA过程中的行为。     

高阻硅中深能级与少子寿命的研究

本文测量了ｎ型高阻硅在９种不同浓度的金掺杂前后少子寿命的变化，以及两类不同电阻率的ｎ型高阻硅在７种不同辐照剂量的１ＭｅＶ高能电子辐照前后少子寿命的变化；测量了金掺杂和高能电子辐照在硅中引入的主要深能级；研究对比金掺杂和高能电子辐照对硅单晶性能的影响及其在提高电子器件开关速度方面的应用。     

脉冲中子辐照在硅中引起缺陷的研究

研究了脉冲中子辐照的中子嬗变掺杂 (NTD)硅二极管中缺陷的形成及其退火特征 ,并与热中子辐照样品进行了比较。深能级瞬态谱仪 (DL TS)测量表明硅中主要存在五类电活性缺陷 :氧空位 E1(Ec- 0 .19e V) ,不同荷电态的双空位 E2 (Ec- 0 .2 8e V)和 E4 (Ec- 0 .4 0 e V) ,双空位与氧杂质相结合的络合物 E3 (Ec- 0 .31e V) ,以及与样品材料原生缺陷有关的辐照感生缺陷 E5(Ec- 0 .4 8e V)。实验结果表明 ,脉冲中子辐照由于其高的中子能量和辐照剂量率 ,导致复杂络合物的浓度高于简单缺陷浓度。进一步 4 0 0℃温度以下退火实验显示了缺陷的分解和重建过程     

快速热退火铝合金降低硅p~+-n结的漏电流

快速热退火铝合金工艺可以明显改善硼扩硅P~+-n结的漏电流.X射线衍射实验表明,铝原子补偿了硼原子在硅片中造成的应变,改善了晶体的完整性.     

利用快速退火法控制非晶硅薄膜中纳米硅粒尺寸

报道了利用快速退火法控制膜中纳米硅粒大小的方法,讨论了升温快慢与所形成的纳米硅粒大小的关系.     

Study of deep level defect behavior in undoped n-InP (1 0 0) after rapid thermal annealing

The effects of rapid thermal annealing on deep level defects in the undoped n-type InP with Ru as Schottky contact metal have been characterized using deep level transient spectroscopy (DLTS). It is observed that the as-deposited sample exhibit two deep levels with activation energies of 0.66 and 0.89 eV. For the samples annealed at 300 °C and 400 °C, a deep level is identified with activation energies 0.89 and 0.70 eV, respectively below the conduction band. When the sample is annealed at 500 °C, three deep levels are observed with activation energies 0.25, 0.32 and 0.66 eV. Annealing of the sample at 300 °C, orders the lattice of as-grown material by suppressing the defect 0.66 eV (A1) which is found in the as-deposited sample. The trap concentration of the 0.89 eV deep levels is found to be increased with annealing temperature. The deep level 0.32 eV may be due to the lattice defect by thermal damage during rapid thermal annealing process such as vacancies, interstitials and its complexes, indicating the damage of the sample after annealing at 500 °C. The defects observed in all the samples are possibly due to the creation of phosphorous vacancy or phosphorous antisite.     

光伏法研究掺金硅特性

本文采用光伏方法测量掺金硅的少子寿命，掺金浓度为１０~（１２）～６．６２×１０~（１５）ｃｍ~（－３），４个数量级；根据对两类不同电阻率的Ｎ型掺金硅少子寿命系统的测量和统计计算，提出了对硅中金性质的看法。统计计算及简并因子和金施主与金受主的相关性，实验和计算结果都表明，高浓度金掺杂可以改变Ｎ型高阻硅的导电类型。     

A study of mottling phenomenon on textured multicrystalline silicon wafers and its potential effects on solar cell performance

The mottling phenomenon refers to the appearance of irregular dark patterns on HF–HNO₃ acid etching textured multicrystalline silicon (mc-Si) wafers. The mottles have been identified as clusters of dislocation etch pits. In the acidic texturization, conditions favoring light reflectivity reduction usually lead to enhanced mottling. In a belief of adverse effect of the mottles to cell performance, light reflectivity reduction is more or less compromised in industry to avoid the mottling. The present study aims to identify whether appearance of the mottles alone really adversely affects the wafers minority carrier lifetime. Both serial examinations of an acid etched mc-Si wafer sample and parallel examinations of neighboring pairs of mc-Si wafer samples etched in acids of different HF/HNO₃ ratios were carried out. The results show that development of the mottling, i.e., growth of dislocation etch pits, does not deteriorate mc-Si wafers in their minority carriers lifetime; rather it even slightly increases the lifetimes. Light reflectivity measurement and modeling show that the mottles can contribute to reduction of light reflectivity, and ~3% relative reduction of reflectivity is expected for multicrystalline silicon wafers of ordinary level of dislocation density. Removal of the defected zone surrounding a dislocation by the etching is postulated as a reason for the observed mottling-enhancement of the lifetime. It is further postulated that, in texturization of mc-Si wafers for cell production, instead of compromising light reflectivity reduction to avoid the mottling, it may be better to pursue lower light reflectivity, allowing some extent of the mottling. Meanwhile, more attention should be paid to compatibility of the cone-shaped dislocation etch-pit with grid printing of solar cells.     

A deep level transient spectroscopy study of rapid thermal annealed arsenic implanted silicon

Deep level traps are observed in silicon that has been implanted with high doses of arsenic and subsequently annealed by rapid thermal annealing. The doses studied create enough damage to form a surface amorphous layer. Annealing temperatures, implant fluence, and the presence of a surface amorphous layer contribute to the type of trap observed. These results show evidence for a clustering/declustering mechanism of arsenic in silicon during rapid thermal annealing.     

单色光光电导衰减法测试硅单晶少子寿命的表面复合修正公式

本文在数值分析和实验数据的基础上，提出了用单色光高频光电导衰减法测量硅单晶少子寿命的表面复合修正公式。     

n型HgCdTe晶片少子寿命分布的小光点测量

用聚焦的激光光点（宽度约为０．１ｍｍ）测量了ｎ型Ｈｇ１－ｘＣｄｘＴｅ（ｘ＝０．２）长条状薄片样品的少数载流子寿命沿样品长条方向的分布，结果表明分布是不均匀的，讨论了引起这种不均匀的可能原因。