Real-Time Adaptive Test Algorithm Including Test Escape Estimation Method

This work aims to reduce the test time per chip, but affect the quality of the products only as little as possible compared to the conventional semiconductor test. For that purpose, a simulation software has been developed that performs adaptive test simulations based on real data and test results of conventional production testing. Products has been analyzed and both the potential for test time savings and the resulting loss of quality are determined. Finally, it is shown that by the intelligent omission of tests, compared to conventional testing procedures, test time reduction of up to 50 % can be achieved. In contrast, there are only few defective components that are not detected by the adaptive test procedure and which reduced the quality of products. In best case, the fraction of test escapes was under 40 ppm. To handle the potential risk of test escapes this paper also introduces a statistical estimation method.     

A Low-Cost Test Methodology for Dynamic Specification Testing of High-Speed Data Converters

Testing high-speed A/D converters for dynamic specifications needs test equipment running at high frequency. In this paper, a methodology to test high-speed A/D converters using low-frequency resources is described. It is based on the alternate testing approach. In the proposed methodology, models are built to map the signatures of an initial set of devices, obtained on the proposed low-cost test set-up, to the dynamic specifications of the same devices, obtained using high-precision test equipment. During production testing, the devices are tested on the low-cost test set-up. The dynamic specifications of the devices are estimated by capturing their signatures on the low cost test set-up and processing them with the pre-developed models. As opposed to the conventional method of dynamic specification testing of data converters, the proposed approach does not require the tester resources running at a frequency higher than the device-under-test (DUT). The test methodology was verified in simulations as well as in hardware with specification estimation error of less than 5%.

D／A转换器的测试设计

讨论了主跃变测试法;LSB阶梯扫描,建立时间测试法;参考电流转换速率dI/dt测试法;阐明了DAC测试环境及自行设计DAC测试系统注意点;最后介绍了在实际工作中采用APPLE-Ⅱ微型计算机构成的DAC测试系统的结构和应用情况。     

用于数据转换器的时钟合成器设计

设计了一种用于数据转换器的低抖动锁相环时钟合成器.基于一阶锁相环结构,提出新的系统分析线性模型,改进了片上无源离散环路滤波器,大大缩短了设计周期.该21.88 MHz时钟合成器采用0.18 μm CMOS混合信号工艺,在1.8 V电源电压下,电荷泵和压控振荡器功耗为410 μA.时钟合成器在1 MHz频偏处相位噪声为-114 dBc/Hz.     

Estimation of Regional Scale Evapotranspiration Through Analysis of Satellite Thermal-infrared Data

Since the mid 70's the LANDSAT series of satelites has acquired visible and near-infrared observations of the earth at a frequency and spatial resolution suitable for agriculture assessment purposes. More recently satellite systems have acquired high precision thermalinfrared data relating to surface thermal properties and moisture status. A data set from the Heat Capacity Mapping Mission [1] illustrates the potential applications of such data for inferring evapotranspiration on a regional scale. Methods described previously [2] are utilized to estimate evapotranspiration rates, yielding results which are consistent with surface measurements of pan evaporation.     

数据转换器的市场与技术动向

通过采访ADI、TI和凌力尔特,探讨了数模转换器的技术和市场趋势.     

Digital Test Method for Embedded Converters with Unknown-Phase Harmonics

This paper presents an extension of the ANC (“Analogue Network of Converters”)-based method, which is an original Design-for-Test (DfT) technique associated to a dedicated test algorithm to characterize the harmonic components of a set of embedded converters using only digital test resources. The ANC-based method was primarily developed under the assumption that the harmonics’ phase is proportional to the input phase. This assumption is not valid for all converter architectures, where filtering effects may affect the harmonics’ phase. The improved ANC-based method is able to calculate the magnitude of the harmonic components with unknown phase. The fundamental principle of this improved version of the ANC-based method is the same, but further mathematical developments have been established using a model independent from the harmonics’ phase. The simulation results and the experiments show an excellent agreement between the values measured using the method and the values measured with a usual test setup, for the THD and SFDR parameters. Simulations were carried out considering both random phases and realistic phase delays such as the ones induced by a low pass filter.     

高速模/数转换器常规参数的动态测试

高速模拟／数字转换器(ADC)被广泛应用于视频和无线通讯等领域。如何对高速ADC的性能进行准确评估是一个受到高度关注的课题。准确评估高速ADC的性能需要采用动态测试方法。文章运用码密度立方图分析法，分析了高速ADC常规参数，包括失调、微分非线性、积分非线性、失码、增益误差等，的动态测试。     

用于晶元及封装测试的DC-DC内建可测性设计

针对单片DC-DC变换器进行了内建可测性设计。通过控制外围引脚使芯片进入一种特殊的测试状态,利用引脚复用技术,实现对基准电压、振荡频率、导通电阻等多种特性指标的测量。该方法无须外围专用控制结构配合,对于晶元以及封装后的芯片测试全部适用,降低了编程的复杂程度,提高了测试效率。应用于一款TSOT封装的高效电流模同步整流型降压DC-DC变换器中。测试结果表明,内建可测性设计对芯片的正常工作没有任何影响,测试精度满足DC-DC设计要求。     

Tunable Mismatch Shaping for Quadrature Bandpass Delta-Sigma Data Converters

This paper presents an architecture for quadrature bandpass mismatch shaping that allows the center frequency of the mismatch suppression band to be tunable over the entire Nyquist range. The approach is based on the previously reported complex-valued tree-based mismatch shaper, and extends this to allow tunable operation. The proposed design has been implemented using VHDL and synthesized to logic gates. The hardware complexity and mismatch shaping performance of the proposed architecture are compared to that of a reference architecture, which uses separate tunable mismatch shapers for each complex component path. Simulation results show consistent mismatch shaping performance across the entire tuning range.     

定时截尾试验零故障时的MTBF估计方法

针对产品定时截尾试验中零故障时无法进行平均故障间隔时间(Mean Time Between Failures,MTBF)估计的问题,分析了不同情况下点估计方法选用的注意事项,并通过公式推导得出了零故障时置信下限的计算公式。对置信下限计算公式进一步推导,得到了便于实际应用的简化计算公式。通过在多个可靠性试验中应用该方法进行MTBF估计,结果表明该方法可行有效。     

TFT-LCD屏缺陷检测的研究

分析了国外目前常用几种薄膜晶体管(TFT)有源矩阵液晶显示（AM-LCD)屏的缺陷检测方法的优缺点。深入研究了TFT-LCD屏的结构、缺陷产生的原因和概率．设计了一种能全面、直观地进行TFT-LCD缺陷检测的方法，该方法不仅能检测出TFT-LCD中各种常见的新短路等硬性缺陷并确定其具体位置．而且能根据TFT-LCD屏质量要求对软性缺陷进行判定。     

串行输出A／D转换器的测试方法

以ＳＡＤ０８３２８位串行输出Ａ．Ｄ转换器为例，验证了一种串行输出Ａ／Ｄ转换器的特殊测试方法。详细介绍了诸如转换精度，三态特性等主要参数的测试方法和测试线路。测试结果表明，该测试方法完全满足串行输出Ａ／Ｄ转换器的测试精度要求。     

DC/DC变换器输入阶跃响应测试方法研究

介绍了DC/DC变换器输入阶跃响应的概念和测试原理,对该参数的测试技术进行了探索,开发出适合的测试方法和测试系统。通过产品的测试,验证了测试方法和测试系统的准确性。该测试方法符合SJ20646-97《混合集成电路DC/DC变换器测试方法》的规定。该测试方法和系统适用于大动态输入范围和大功率DC/DC变换器输入阶跃响应的测试。     

用于H.264/AVC的D级数据重用整数运动估计VLSI结构

本文提出了一种用于H.264/AVC的D级数据重用整数运动估计VLSI结构.提出的结构是在一种固定块尺寸运动估计VLSI结构基础上,利用交叉网络实现变块尺寸的计算,使用多bank的存储器组织方式,使片上存储器的读写规则简单,易于处理不同搜索范围和不同尺寸的视频的运动估计.提出的运动估计结构用Verilog HDL描述,使用HJTC 0.18μm工艺,用Synopsys DC做了逻辑综合.相比现有结构,该结构由于增加片上存储器,因此数据重用率高,大大降低了存储带宽需求;另外数据吞吐率高,能够满足高性能视频编码需求.     

高速A/D转换器测试采样技术研究

高速A/D转换器是电子器件中比较特殊而又关键的器件。关于高速A/D转换器的动态参数测试方法比较多,文章主要讨论相干采样与加窗采样在高速A/D转换器参数测试中的应用,两种方法各自的优缺点,以及应用中应该注意的问题。     

基于VB和GPIB接口的DC／DC变换器自动测试系统

从一个应用于批量生产和科研的测试研发实例出发,详细介绍了在Visual Basic环境下,利用GPIB接口和VISA COM库,将PC和各种测量仪器连接起来,构成一个实用的DC/DC变换器自动测试系统的方法.该系统成功实现了对DC/DC变换器输出电压、效率、负载瞬变响应幅度等DC/DC变换器电特性的自动测试及可靠的数据管理.     

应对串行数据测试挑战,泰克推出高速串行数据测试设备

近日,泰克公司(Tektronix)发布了AWG7000任意波形发生器以及DSA8200数字串行分析示波器解决方案,新产品旨在满足日益普遍的高速串行数据总线设计和测试要求.     

3G基站的两个关键部件--高速数据转换器和放大器

第三代移动电话主要依靠宽带码分多址(WCDMA)技术,信号处理技术的发展、体系结构的进步以及新开发的高速数据转换器和运算放大器正在使无线基础结构的设计师们降低成本,更好地实现第三代无线通信系统的目标。