用频变负电阻实现的混沌振荡器

提出了用频变负电阻(FDNR)实现混沌振荡器的新电路，试电路结构简单，仅用一个接地的频变负电阻作为有源器件，用二极管提供必要的非线性．文中给出了PSpice仿真验证了结果。     

混沌振荡器的计算机仿真

提出了用频变负电阻(FDNR)实现混沌振荡器的新电路,该电路结构简单,易于集成,仅用一个接地的频变负电阻作为有源器件,用二极管提供必要的非线性。并给出了电路的数学模拟和PSpice仿真。模拟和仿真结果表明,二者取得了很好的一致。     

太赫兹平面肖特基二极管参数模型

根据太赫兹平面肖特基二极管物理结构,在理想二极管SPICE参数模型的基础上建立了二极管小信号等效电路模型。依据该二极管等效电路模型设计了基于共面波导（CPW）去嵌方法的二极管S参数在片测试结构,并对其在0.1~50 GHz、75~110 GHz频率范围内进行了高频小信号测试,利用测试结果提取了高频下二极管电路模型中各部分电容、电阻以及电感参数。将相应的高频下电容与电阻参数分别与低频经验公式电容值和直流I-V测试提取的电阻值进行了对比,并利用仿真手段对高频参数模型进行了验证。完整的参数模型以及测试手段相较于理想二极管SPICE模型和传统的参数提取方法可以更为准确地表征器件在高频下的工作状态。该建模思路可用于太赫兹频段非线性电路的优化设计。     

减少RC充电电路能量损失的方法研究

减少RC充、放电电路中能量的损失,可以降低能源的消耗,提高电源的利用率,也可以减少器件的功耗。通过利用多个电源和二极管的非线性,给出了RC充电电路中减少能量损失的方法和理论计算,在理想二极管开关状态下,利用无限多个电源可以使RC充电电路中能量损失减少到零。这对于大容量、高电压的充放电电路、以电容为主的储能电路及设备是非常有用的。最后给出了应用实例。     

分析非线性电路的谐波平衡法的改进

本文根据分析微波非线性电路的基本方法之一谐波平衡法,提出了一种加速收敛过程的改进方法,并且将其应用于微波混频器的非线性分析。在分析过程中引入了混频二极管非线性特性由时域到频域的简化变换技术,大大加快了计算速度。分析结果与已发表的结果相比较,一致性较好。这种改进的分析方法也可以推广应用于包含多个非线性器件的非线性电路的计算机辅助分析。     

二端口元件的电阻替代方法及其应用

针对含二端口元件的电路,提出了用电阻支路替代二端口元件端口的分析方法。经过电阻替代后,消除了二端口元件端口间的耦合关系,从而使得电路的分析显得直观、简单。讨论了电阻替代方法的适用性条件。通过举例说明了该方法在电路分析中的应用。     

一种单电源高集成度蔡氏振荡器

二端非线性电阻的实现是研究蔡氏电路中混沌现象的一个重要环节,传统的非线性电阻大多采用正负电源供电的运放和电阻、电容等分立器件来搭建。在分析非线性电阻工作原理的基础上,提出采用单电源供电的集成电路制造工艺实现负阻器件的思想。设计的非线性负阻器件主要由轨到轨运算放大器、基准电压/电流产生等模块组成,并在0.18 μm标准CMOS工艺下设计实现。仿真结果表明,在1.8 V单电源工作模式下,蔡氏电路两个关键节点的李萨如波形表现为双螺旋吸引子,证明该振荡器电路有效,整个电路的功耗约为2.45 mA。     

蔡氏混沌电路在Multisim软件中的设计与仿真

经典的蔡氏电路是一个简单混沌电路,能够产生丰富的混沌现象,然而该电路的系统参数基本上是固定的,不同混沌电路之间的电路不具备通用性。基于此,本文提出在Multisim仿真软件上通过模块化的设计方法重构蔡氏混沌电路,利用常见的运算放大器、电阻、电容电子元件组成混沌系统的线性部分,着重介绍了如何利用多个二极管实、运放等实现复杂绝对值非线性函数,并给出蔡氏混沌电路相应的硬件仿真结果。     

“简洁至上”的晶体管甲类音频功率放大器

<正> Hi-Fi界有一句至理名言,就是“简洁至上”。这就是说,假如能用一个元件或器件做成的电路,就尽量不用两个。电子电路中常用的电子元件有电阻、电容、电感等,常用的电子器件有二极管、三极管及集成电路等。电阻、电容都属于线性元件,在放大电路中可以认为不会因它们而产生非线性失真。但是,目前用于放大的电子器件,不论是电子管、晶体管,还是集成电路,统统都是非线性器件,它们是放大电路中产生非线性失真的根源。因此,在放大电路中应尽量少用管子。要做到这一点也并非容易,所以通常所见到的放大电路都比较复杂。要想“简洁”,必须解决两个问题:一是放大倍数要足够大,至少应该在接CD机时能够达到额定的输出功率;二是非线性失真要尽量小些,在不加负反馈或只加少量的负反馈时,谐波失真系数能够达到Hi-Fi要求。     

什么是"小信号"

首先讨论了在电路原理课程中讲授非线性电阻电路分析的必要性,随后探讨了非线性电阻电路的小信号分析方法。在给出当前教材对于小信号的普遍定义之后,用3个简单的例子讨论了这种定义方式存在的问题,从误差的角度深入探讨了怎样的信号才能够称之为小信号这一重要的概念性问题,给出了比较严格的小信号定义。     

Saturated Resistor Load for GaAs Integrated Circuits

Saturated resistors, two-terminal load devices, have been fabricated and evaluated as pull-up loads for GaAs digital integrated circuits. The saturated resistor loads exhibit superior device characteristics compared with FET active loads. Up to 100-percent improvement in the uniformity of the saturation current has been obtained. Ring oscillators with saturated resistor pull-up loads have shown ~20-percent lower speed-power products than ring oscillators with FET active loads. This superior circuit performance is attributed to 1) no gate capacitance, and 2) less backgating effect. Reliability studies using accelerated aging have shown that circuits are more reliable when saturated resistor loads are used.     

Saturated resistor load for GaAs integrated circuits

Saturated resistors, two-terminal load devices, have been fabricated and evaluated as pull-up loads for GaAs digital integrated circuits. The saturated resistor loads exhibit superior device characteristics compared with FET active loads. Up to 100-percent improvement in the uniformity Of the saturation current has been obtained. Ring oscillators with saturated resistor pull-up loads have shown ∼ 20-percent lower speed-power products than ring oscillators with FET active loads. This superior circuit performance is attributed to 1)no gate capacitance, and 2) less backgating effect. Reliability studies using accelerated aging have shown that circuits are more reliable when saturated resistor loads are used.     

基于忆阻器的混沌、存储器及神经网络电路研究进展

忆阻器是除电阻、电容、电感之外发现的第4种基本电子元件,它是一种具有记忆特性的非线性器件,可用于混沌、存储器、神经网络等电路与系统的实现。该文对基于忆阻器的混沌电路、存储器、神经网络电路的设计与神经动力学的国内外研究进行了综述,并给出了对它们的研究展望。     

A circuit for reducing on-resistance of a p-n-p-n device at low currents

This letter proposes a useful circuit which can reduce the on-resistance of a p-n-p-n device. This circuit is contrived from experimental results showing that the on-resistance decreases as the value of a resistor inserted between the gate and cathode terminals decreases. The basic operation and features of this circuit are discussed and its usefulness is verified experimentally. The p-n-p-n device having the circuit described here shows significant reduction in the on-resistance at the low forward-current region without degradation of characteristics such as gate triggering. This p-n-p-n device is useful for subscriber line interface circuits which need low on-resistance especially at low current levels.     

三阶非自治电路中的混沌振荡

本文研究在正弦电源激励下的三阶电路中的非线性动力性质。在该电路中，唯一的非线性元件是分段线性的负电阻元件。计算机模拟和电路实验表明，该电路在电源电压的有效值改变时，振荡制式会有如下之演变：周期—拟周期—混沌—亚超混沌—混沌—周期。此处所谓的亚超混沌振荡，是指相空间轨线的吸引子具有( ，0，0，-)类型的李雅普诺夫指数谱的振荡制式而言的。这种亚超混沌振荡制式在现有的非线性电路与系统的文献中尚不曾有过报道。本文的计算机模拟结果与电路实验结果之间有较好的吻合。     

Nonlinear circuit synthesis with controllable gyrators

By means of a controllable gyrator and a dc source--representing the concepts of controlled energy transmission and energy supply--many active and passive nonlinear circuits can be synthesized. Among these are the linear ideal gyrator, resistor, and reactor, as special cases.     

一种采用单信号控制的新型高压高低侧功率器件

Novel high-voltage, high-side and low-side power devices, whose control circuits are referred to as the tub, are proposed and investigated to reduce chip area and improve the reliability of high-voltage integrated circuits. By using the tub circuit to control a branch circuit consisting of a PMOS and a resistor, a pulse signal is generated to control the low-side n-LDMOS after being processed by a low-voltage circuit. Thus, the high-voltage level-shifting circuit is not needed any more, and the parasitic effect of the conventional level-shifting circuit is eliminated. Moreover, the specific on-resistance of the proposed low-side device is reduced by more than 14.3% compared with the conventional one. In the meantime, integrated low-voltage power supplies for the low-voltage circuit and the tub circuit are also proposed. Simulations are performed with MEDICI and SPICE, and the results show that the expectant functions are achieved well.     

An analysis of a circuit for the generation of high-order harmonics using an ideal nonlinear capacitor

A particular harmonic generator circuit using an ideal nonlinear capacitor is analyzed and theoretical expressions are obtained for the loss involved in generating a high-order harmonic. The harmonic energy is developed in a load resistor either as an exponentially decaying sine wave or as a pulse. The analysis is valid for harmonics of about the tenth or greater. The results are presented in a graphical form that allows the losses involved to be found easily and it is thus shown that the minimum loss in generating a high-order harmonic by this circuit is about 8.5 db independent of the order of the harmonic. The degree to which a charge storage diode approximates to an ideal nonlinear capacitor is then discussed and some experimental results using such a diode are presented.     

Complementary Josephson junction devices and circuits: a possiblenew approach to superconducting electronics

We present a superconducting logic family whose operation relies on the availability of a current gain greater than one, based on the analogy to semiconductor complementary metal-oxide-semiconductor (CMOS) logic family. The Complementary Josephson Junction (CJJ) logic family utilizes two types of nonlatching devices: a conventional device and a complementary device. The conventional device has a finite critical current, and the complementary device has zero critical current with no input applied. When the input is high, the complementary device has a finite critical current, while the conventional device has zero critical current. The bias current can be steered between a branch with a complementary device and a branch with a conventional device performing logic (and memory) functions. We can also use a resistor as a load to a complementary device. We call this circuit topology the Resistor Complementary Josephson Junction (RCJJ) family. It is analogous to the semiconductor PMOS/resistor logic family. In this paper, we investigate methods of realizing complementary devices, and we present a preliminary analysis of speed, margins, and power dissipation in simple CJJ and RCJJ inverter circuits     

An accurate analytical propagation delay model for high-speed CMLbipolar circuits

A new analytical delay model for high-speed CML circuits is presented. It is applicable to high-speed/low-voltage-swing silicon and HBT CML circuits operating at medium or high current densities. The model is based on bipolar SPICE parameters file, and can be used to estimate the propagation delay time of CML circuits under different operating conditions. The detailed transient analysis accounts for delay components due to each element in the complete SPICE bipolar transistor model. The comparison to SPICE circuit simulation results show excellent agreement for a wide range of state-of-the-art technologies and circuit parameters. The new model predicts the delay time with less than 5% error in most cases. The influence of the finite slopes (slewing rate) of the input signal and the device dimensions is also investigated. The delay model determined the optimum current i₀ (or load resistor R_L) for a transistor of a certain emitter area when driven by a source of a voltage swing (ΔV) and slew time (t_r ). At a specified power dissipation, the delay model is used to optimally size the transistor emitter area for maximum switching speed. The model provides circuit and device guidelines to minimize the propagation delay time and improve the performance of high-speed CML circuits