适用于ASIC的高速低功耗逻辑单元

本文介绍一种ECL电路结构形式的ASIC逻辑单元的设计和应用。该单元使用2.5V的电源,内部开关电流设计为0.5mA,逻辑摆幅设计为340mV,输入输出均采用双向互补信号。它具有信息的基本记忆功能,用它进行多级组合配套设计,可制作不同模数的分频器、寄存器和计数器等。设计灵活,功能强,电路速度快,功耗低,仅为具有相同功能的普通ECL电路的1/30。这些电路可用在通讯机、电子控制系统、电子测量系结中作高速数字锁相环,数字信号处理的专用集成电路。     

最佳通用逻辑门及ECL电路实现

本文用ECL电路实现了文献[1]提出的最佳通用逻辑门ULG.2,并把它与传统的逻辑门进行了比较,认为这种U_2~(L)ECL电路,可以作为超高速中规模集成电路标准单元.     

基于开关信号理论的四值ECL电路

从一个有效的多值代数系统应能反映多值电路中的物理过程的这一原则出发,本文提出了一组可以描写多值ECL电路中信号与开关元件间相互作用的运算。讨论了这些运算的物理对应及有关性质,并由此建立了适用于ECL电路的开关信号理论。本文设计了若干基本四值ECL电路,用SPICE程序模拟证明了它们均具有正确的逻辑功能与理想的DC特性。     

智能功率集成电路的发展动向

本文概述智能功率集成电路的分类和应用以及涉及到SPIC发展动向中的隔离技术等,并介绍了SPIC中的过流,过热和栅充电泵驱动电路等基本关键技术.     

ECL集成电路的四值接口技术

本文介绍了适用于多值ECL电路设计的差动电流开关理论。在该理论中,分别用开关变量和四值信号变量来描写ECL电路中差动晶体管对的开关状态和信号,并引入此两类变量之间的联结运算,以描写电路内部开关元件与信号的相互作用过程。基于该理论,本文对两种接口电路2-4编码器和4-2译码器进行了设计。应用SPICE程序对设计电路的计算机模拟表明,两种电路均具有正确的逻辑功能、理想的DC转移特性和瞬态特性。由于该接口电路具有与二值电路兼容的集成工艺、电源设备、逻辑级差和瞬态特性,因此它可用作现有二值ECL集成电路的输入输出接口,从而达到减少芯片的引脚数和片间连接的目的。     

集成电路中接口电路的可靠性设计

在集成电路设计中,可将承担静电放电保护、电平转换、电路驱动等功能的电路组合成接口电路,通过对接口电路的可靠性设计来提高集成电路的可靠性。从电路设计、版图设计、封装设计等设计阶段的特点出发,阐述了各阶段可靠性设计的内容,并总结了一些设计要点和设计准则,提出了可采用接口电路、封装、PCB三者协同设计的方法,以提高接口电路的可靠性。     

单片放音机集成电路引脚资料

步行者放音机十分流行,而且低压供电的放音机愈来愈多(3V供电),在这种放音机中共有两块集成电路,一块是电动机稳速集成电路,另一块是完成放音信号放大、处理的集成电路,由于放音信号主要由一块集成电路来放大、处理,所以称之为单片放音集成电路。这种单片放音机集成电路的工作原理同普通录音机放音通道电路结构基本一样,即由前置放大器,电子音量控制器电路和耳机驱动电路构成,而且是     

双层逻辑电路

本文讨论了在集成电路中将ECL信息变换到TTL信息的困难,提出了用一种新型触发器——浮动触发器实现ECL信息到TTL信息变换的方案.在此基础上,提出了一种新的逻辑电路——双层逻辑电路.其电平较高的土层传输ECL信息,电平较低的下层传输TTL信息,并通过在组合电路中,把TTL信息变换为ECL信息,及在寄存器中将ECL信息交换为TTL信息来完成时序电路主要的逻辑功能.用此电路设计了四位多功能运算器.研制结果表明,其功耗低,布线容易,元件用量少,适于中、大规模集成.     

有关ECL电路的几个方面

我厂承担了某项重点工程任务所需的集成电路,在一四二四所的大力协助下,已试制生产了八种中、小规模超高速ECL集成电路。现除继续扩大品种,不断提高成品率和可靠性外,还以平行作业的方法,开展大规模ECL存贮器的试制工作。国际国内已有各种系列的ECL集成电路,我厂是仿优选系列MECL10000系列试制和扩展品种的。 ECL电路不同于饱和型和抗饱和型逻辑电路。它从电路结构上根除了常规TTL电路门管由“关”转“开”所需释放载流子电荷的“存贮时间”;它没有STTL电路采用肖特基钳位而带来附加的输入电容,STTL电路的速度必然受RC时间常数所制约。ECL电路的延迟仅仅受管芯中的分布电容所影响,是现能使用的最高速的集成逻辑电路。     

ECL电路应用设计中传输线控制

现代ECL数字电路信号速率可以高达GHz频率并且上升时间在ps级,在这样的信号速率下,PCB传输线效应成了电路正常工作的制约因素.本篇介绍了ECL集成电路应用设计中传输线的基本操作.     

Theory of differential current switches and logic design of ternary ECL circuits at switch level

Starting from the viewpoint that the switch states and signal values in a digital circuit should be described separately by two different kinds of variable, the interaction between the switching element and signal in multi-valued ECL circuits is analysed and two types of connection operations, threshold switching operation and current switching operation, are proposed. The properties and circuit realizations of these new operations are discussed and the theory of differential current switches applicable to ECL circuits is established. Examples of basic ternary ECL circuits confirm that this theory can effectively guide the logic design of ternary ECL circuits at switch level. The circuits are verified by using the SPICE II program. They have the same logic level difference and transient characteristic as binary ECL circuits. Since the multi-valued ECL circuit uses only one set of power supply and can set several threshold values by using reference levels, it can be fabricated using conventional ECL techniques and is compatible with binary ECL circuits.     

THE QUATERNARY INTERFACE TECHNIQUE IN ECL INTEGRATED CIRCUITS

The theory of differential current switches which applies to the design of multivaluedECL circuits is introduced.In this theory,the switching state of differential transistor pairand signal in ECL circuits are described by switching variables and quaternary signal variables,respectively.he connection operations between the two kinds of variables are introduced todescribe the action process between switching element and signal in the circuits.Based on thistheory,two kinds of interface circuits-2-4 encoder and 4-2 decoder are designed.The computersimulation for the designed circuits by using SPICE program confirms that both circuits havecorrect logic functions,desired DO transfer characteristics and transient characteristics.Theseinterface circuits are compatible with binary circuits in the integrated process,the power supplyequipment,the logic stage and the transient characteristic.Therefore,they can be used as input-output interface of the existing binary ECL integrated circuits so as to decrease the number ofpins of a chip and the connections between chips.     

Transistor-tunnel-diode ternary-logic circuits

Two new basic circuits for ternary-logical operations are described. Analogue simulation and experimental measurements confirm that the switching speeds of the ternary circuits can be comparable with those in similar binary circuits. It is concluded that a marginal improvement in processing rate may be achieved with ternary logic using transistor-tunnel-diode logic circuits.     

低电压低功耗ECL电路设计

首先指出了 ECL电路随着集成度和速度的提高 ,存在着功耗太大的问题 ,进而提出了采用低电压电源以降低功耗 ,为此发展了将串联开关转换成并联开关的技术 ,保证了电路能在低电压下正常工作 ,并由此实现了适合于低电压工作的 ECL电路的开关级设计。从对设计的电路进行的计算机模拟结果表明 ,采用文中提出的并联开关技术设计的电路 ,在电源电压为 -2 .5 V时 ,不仅具有正确的逻辑功能和较高的工作速度 ,且比采用-5 .0 V电源的电路节约了 80 %以上的功耗     

Resonant-tunneling diode and HEMT logic circuits with multiplethresholds and multilevel output

By using resonant-tunneling diodes (RTDs) and high electron mobility transistors (HEMTs), we implement a new class of logic circuits that operate with multiple thresholds and multilevel output. The basic idea of the circuits is to synthesize transfer characteristics by key logic elements, namely, up and down literals. We first describe two fundamental logic circuits based on this idea: a ternary inverter and a literal gate. Then we present experimental results on these circuits fabricated by integrating InP-based RTDs and HEMTs. It is found that these circuits operate successfully with threshold voltages and output levels that have been predicted from individual device characteristics. Consequently, the validity of the basic idea behind the circuits presented here is proven. The device counts and the number of logic stages required for the present circuits are less than half those for conventional ones. A possible application is finally discussed     

基于比较器的四值电流型CMOS加减电路设计

该文通过对电流型CMOS电路的阈值控制引入了多值电流型比较器。与2值逻辑电路相比,多值逻辑电路的单条导线允许更多的信息传输。相较于电压信号,电流信号易实现加、减等算术运算,在多值逻辑的设计上更加方便。同时提出了基于比较器的4值基本单元设计方法,实现了4值取大、取小以及反向器的设计,在此基础上设计实现了加法器和减法器。该设计方法在2值、3值以及n值逻辑上同样适用。实验结果表明所设计的电路具有正确的逻辑功能,较之相关文献电流型CMOS全加器有更低的功耗和更少的晶体管数。     

Design of ternary CMOS circuits based on transmission function theory

This paper presents threshold comparison operation, transmission operation and union operation which can be used to describe the function of MOS transistors in a pass-transistor network. The relative properties and circuit realizations of these operations, and the transmission function expression by use of these operations are discussed. A transmission function theory suitable to CMOS network synthesis is proposed. This paper also discusses the simplification of ternary functions and proposes minimized design of some basic ternary CMOS circuits. The computer simulation using SPICE2G5 has confirmed that these circuits have desirable DC transfer characteristics.     

Integrated-circuit digital I?Requirements and features of a logic family; RTL, DTL, and HTL devices logic families

The purpose of this article is to categorize the needs and desired features that a logic or system designer should consider when selecting a family of digital integrated circuits. The various major digital IC families are evaluated and compared with these needs in view. The intended results are that the reader will gain facility in IC technology, terminology, and usage in various areas of application. Part II of this article will cover transistor-transistor logic (TTL) devices. Part III is devoted to emitter-coupled logic (ECL) and metal oxide semiconductor (MOS) devices.