Simple Short-Pulse CO<Subscript>2</Subscript> Laser Excited by Longitudinal Discharge without High-Voltage Switch

We have developed a longitudinally excited CO₂ laser without a high-voltage switch. The laser produces a short laser pulse similar to those from TEA and Q-switched CO₂ lasers. This system, which is the simplest short-pulse CO₂ laser yet constructed, includes a pulsed power supply, a high-speed step-up transformer, a storage capacitor, and a laser tube. At high pressure (4.2 kPa and above), a rapid discharge produces a short laser pulse with a sharp spike pulse. In mixed gas (CO₂: N₂: He = 1: 1: 2) at a pressure of 9.0 kPa, the laser pulse contains a spike pulse of 218 ns and has a pulse tail length of 16.7 μs.     

A compact free electron laser investigation

An electron beam source based on pseudospark discharge was successful in operation at the beam voltage of 200keV and beam current of 2kA. The detailed design of a compact free electron laser using an electron beam by a pseudospark discharge is described. The compact free electron laser consists of a smaller Marx generator with 6 capacitors and switches, a water capacitance of 6nF and a beam source with a high brightness of 3×10¹¹ A/(m rad)². The computer simulation shows that an output power of 101MW is expected at a frequency of 38GHz with a beam energy of 300keV, a current of 2kA and a beam emittance of 48mm mraa.     

Longitudinally Excited CO<Subscript>2</Subscript> Laser with Short Laser Pulse like TEA CO<Subscript>2</Subscript> Laser

We have developed a longitudinally excited CO₂ laser with a short laser pulse similar to that of TEA and Q-switched CO₂ lasers. A capacitor transfer circuit with a low shunt resistance provided rapid discharge and a sharp spike pulse with a short pulse tail. Specifically, a circuit with a resistance of 10 M Ω provided a spike pulse width of 103.3 ns and a pulse tail length of 61.9 μs, whereas a circuit with a shunt resistance of 100 Ω provided a laser pulse with a spike pulse width of 96.3 ns and a pulse tail length of 17.2 μs. The laser pulses from this longitudinally excited CO₂ laser were used for processing a human tooth without carbonization and for glass marking without cracks.      

Design challenges of a 65 nm CMOS stacked folded differential PA structure for mobile communications

In this paper, a novel phase-locked loop (PLL) architecture with multiple charge pumps, which is used to design a fast-locking PLL and a low-phase-noise PLL, is proposed. The effective capacitance and resistance of the loop filter in terms of voltage is scaled up/down according to the locking status by controlling the magnitude and direction of the charge pump current. Two PLLs, one with a fast-locking characteristic and the other with a low-phase-noise characteristic, are designed and fabricated in a 0.35-μm CMOS process based on the proposed architecture. The fast-locking PLL has a locking time of less than 6 μs and a phase noise of −90.45 dBc/Hz at 1 MHz offset. The low-phase-noise PLL has a locking time of 25 μs, a phase noise of −105.37 dBc/Hz at 1 MHz offset, and a reference spur of −50 dBc. Both PLLs have an 851.2 MHz output frequency.     

Electromigration in a Sn-3 wt.%Ag-0.5 wt.%Cu-3 wt.%Bi Solder Stripe Between Two Cu Electrodes Under Current Stressing

The electromigration behavior of a Sn-3 wt.%Ag-0.5 wt.%Cu-3 wt.%Bi solder stripe between two Cu electrodes under current stressing at various densities has been investigated for a current stressing time of 72 h and a temperature of 120°C. After current stressing at a density of 1.0 × 10⁴ A/cm², the solder matrix exhibited a slight microstructural change as well as formation of a distributed Cu₆Sn₅ phase near the anode-side solder/Cu interface. Upon increasing the current density to 3.9 × 10⁴ A/cm² and 5.0 × 10⁴ A/cm², a high density of distributed Cu₆Sn₅ phase was formed across the entire solder stripe, resulting in pronounced microstructural change of the solder. Hillocks were also formed near the anode-side interface due to accumulation of a Sn-rich phase, a Bi-rich phase, and a distributed Cu₆Sn₅ phase, while voids were formed in the solder matrix and at the opposite cathode side. The mechanisms of formation of the distributed Cu₆Sn₅ phase and migration of Bi and Sn are discussed.     

Bandwidth optimization of a low power,high speed CMOS current op amp

A current op amp with a differential output and a single-ended input can be configured from a single second generation current conveyor and an output stage with a differential floating current source. Owing to a very simple basic configuration with a single dominant pole, this design combines a high bandwidth with a high open loop gain. In this paper we present the basic configuration, derive the fundamental equations for the performance of the op amp, and describe some design considerations with respect to an optimization of the op amp for a high bandwidth. Simulation results are given from a commercially available 2µm CMOS process resulting in an open loop differential gain of 94dB and a gain-bandwidth product of 128M H z at a supply voltage of 3V and a supply current of 25µA. The design has been experimentally verified through a test circuit and experimental results from this confirm the expected behaviour.     

Optimum conditions for second harmonic generation by hot-electron and electron-transfer effects in semiconductors

Optimum conditions for second harmonic generation (SHG) are derived analytically in both semiconductors with a velocity-saturation characteristic due to hot-electron effect and with an N-shaped characteristic due to electron-transfer effect. The d.c. bias fields for a maximum conversion efficiency are approximately the value of the ratio of a saturation velocity to a low-field mobility for a saturated characteristic and the value slightly less than the threshold field for an N-shaped characteristic. For a saturated characteristic, the shape closer to a rectangular gives a higher conversion efficiency. An n-type Ge is most superior to all of p-type Ge, n- and p-types Si. For an N-shaped characteristic, steeper spike shape gives a higher conversion efficiency. An n-type GaInSb is most superior to both of n-types GaAs and InP.     

Generating sub-1V reference voltages from a resistorless CMOS bandgap reference circuit by using a piecewise curvature temperature compensation technique

A piecewise curvature compensated CMOS voltage reference that is able to generate a sub-1V reference voltage is presented. The presented voltage reference circuit is operated at a minimum operating voltage of 1.5 V (theoretically 1.408 V) and generates a stable 0.658 V reference voltage with a temperature coefficient of 9.617 ppm/°C over the temperature range of −10 °C to 130 °C. When implemented in a 0.18 μm CMOS technology, the presented design occupies a compact silicon area of 0.022 mm². Spectre SPICE simulation showed that the presented design achieves a line regulation of 0.89%, a power supply rejection ratio of −42.3 dB, a power consumption of 0.449 mW at 1.8 V power supply and a high immunity to process variation.     

Diffraction of H0m and E0m modes by a system of axially symmetric discontinuities in a coaxial circuit

Diffraction of axially symmetric H _0m and E _0m modes by a system of annular slots in the hollow inner conductor of a coaxial waveguide is considered. The space inside a slot and between the slots is filled with a dielectric. Diffraction of H _0m and E _0m modes by the end of a semiinfinite circular waveguide placed coaxially in a circular waveguide of larger diameter is solved as the key problem. The obtained solution is used in the analysis of structures with a finite number of equispaced discontinuities. The solution is obtained with the operator approach. Dependences of the reflection coefficient of this structure on the slot width and the spacing of discontinuities are analyzed.     

Development of a‐SiOx:H solar cells with very high Voc × FF product

In this study, deposition conditions for making a‐SiO_x:H are investigated systematically in order to obtain a high band gap material. We found that at given optical band gap, a‐SiO_x:H with favorable opto‐electronic properties can be obtained when deposited using low CO₂ flow rates and deposition pressures. We also found that a low radio frequency power density is required in order to limit the effect of ion bombardment on the material properties of i‐a‐SiO_x:H and thereby the solar cell performance. In addition, by decreasing the heater temperature from 300 to 200°C when making the i‐a‐SiO_x:H, the V_oc can be increased. We employed optimized p‐doped and n‐doped a‐SiO_x:H films into the p‐i‐n solar cells, and as a consequence, a high V_oc of over 1 V and high fill factor (FF) are obtained. When depositing on texture‐etched ZnO:Al substrates, a high efficiency a‐SiO_x:H single junction solar cell having a high V_oc × FF product of 0.761 (V_oc: 1.042 V, J_sc: 10.3 mA/cm², FF: 0.73, efficiency: 7.83%) was obtained. The a‐SiO_x:H solar cell shows comparable light degradation characteristics to standard a‐Si:H solar cells. Copyright © 2014 John Wiley & Sons, Ltd.     

A low-power active inductor with improved Q-factor and its application to phase shifter

This letter presents a low-power single-ended active inductor with its Q-factor enhanced by feedback. Without sacrificing the self-resonance frequency and increasing the DC power consumption of the main circuit, the feedback transistor introduces a negative resistance; therefore, high Q-factors can be achieved in a wide operating frequency range. The proposed inductor was designed in a 0.13 μm CMOS process and simulated using Cadence Spectre. The active area is ~4 μm × 5 μm. With ~0.1 mW power consumption, the designed active inductor shows a 17 GHz maximum self-resonance frequency and a 1–8 GHz peak-Q operating frequency range. Using this active inductor, a 3-bit digitally-controlled phase shifter was designed. The phase shifter can provide a phase shift range larger than 180° from 1.5 to 4 GHz and a return loss better than 10 dB.     

An integrated 0.35 μm CMOS optical receiver with clock and data recovery circuit

This paper presents an integrated optical receiver that operates at 1 Gb/s in a standard 0.35 μm digital CMOS technology. The receiver consists of an integrated CMOS photodetector, a transimpedance amplifier (TIA) followed by a post-amplification stage and a dual-loop clock and data recovery (CDR) circuit. At a wavelength of 860 nm, the circuit requires an average light input power of −19.7 dBm to obtain a bit-error rate (BER) of 10⁻¹². The complete receiver consumes a total power of approximately 155 mW from a 3.3-V supply. The core circuit area is 0.85×1.32 mm².     

A 10 b 120 MS/s 108 mW 0.18 μm CMOS ADC with a PVT-insensitive current reference

This paper proposes a 10 b 120 MS/s CMOS ADC with a PVT-insensitive current reference. The designed current reference shows a mean temperature drift of 35.2 ppm/°C in the temperature range from −25 to 100°C and a supply rejection of 1.1%/V between 1.6 and 2.0 V. The prototype ADC fabricated in a 0.18 μm 1P6M CMOS technology demonstrates a measured DNL and INL of 0.18LSB and 0.53LSB with a maximum SNDR and SFDR of 53 and 68 dB at 120 MS/s. The ADC with an active chip area of 1.8 mm² consumes 108 mW at 120 MS/s and 1.8 V while the proposed on-chip current reference consumes 0.35 mW with a die area of 0.02 mm².     

Strong Damping‐Like Spin‐Orbit Torque and Tunable Dzyaloshinskii–Moriya Interaction Generated by Low‐Resistivity Pd1−xPtx Alloys

Despite their great promise for providing a pathway for very efficient and fast manipulation of magnetization, spin‐orbit torque (SOT) operations are currently energy inefficient due to a low damping‐like SOT efficiency per unit current bias, and/or the very high resistivity of the spin Hall materials. This work reports an advantageous spin Hall material, Pd_1?xPt_x, which combines a low resistivity with a giant spin Hall effect as evidenced with three independent SOT ferromagnetic detectors. The optimal Pd_0.25Pt_0.75 alloy has a giant internal spin Hall ratio of >0.60 (damping‐like SOT efficiency of ≈0.26 for all three ferromagnets) and a low resistivity of ≈57.5 µΩ cm at a 4 nm thickness. Moreover, it is found that the Dzyaloshinskii–Moriya interaction (DMI), the key ingredient for the manipulation of chiral spin arrangements (e.g., magnetic skyrmions and chiral domain walls), is considerably strong at the Pd_1?xPt_x/Fe_0.6Co_0.2B_0.2 interface when compared to that at Ta/Fe_0.6Co_0.2B_0.2 or W/Fe_0.6Co_0.2B_0.2 interfaces and can be tuned by a factor of 5 through control of the interfacial spin‐orbital coupling via the heavy metal composition. This work establishes a very effective spin current generator that combines a notably high energy efficiency with a very strong and tunable DMI for advanced chiral spintronics and spin torque applications.     

A universal low-noise analog receiver baseband in 65-nm CMOS

In this paper, a novel universal receiver baseband approach is introduced. The chain includes a post-mixer noise shaping blocker pre-filter, a programmable-gain post mixer amplifier (PMA) with blocker suppression, a differential ramp-based novel linear-in-dB variable gain amplifier and a Sallen–Key output buffer. The 1.2-V chain is implemented in a 65-nm CMOS process, occupying a die area of 0.45 mm². The total power consumption of the baseband chain is 11.5 mW. The device can be tuned across a bandwidth of 700-KHz to 5.2-MHz with 20 kHz resolution and is tested for two distinct mobile-TV applications; integrated services digital broadcasting-terrestrial ISDB-T (3-segment f _c = 700 kHz) and digital video broadcasting-terrestrial/handheld (DVB-T/H f _c = 3.8 MHz). The measured IIP3 of the whole chain for the adjacent blocker channel is 24.2 and 24 dBm for the ISDB-T and DVB-T/H modes, respectively. The measured input-referred noise density is 10.5 nV/sqrtHz in DVB-T/H mode and 14.5 nV/sqrtHz in ISDB-T mode.     

Low‐Cost Self‐Assembled Oxide Separator for Rechargeable Batteries

Rechargeable battery cells having a liquid electrolyte require a separator permeable to the electrolyte between the two electrodes. Because the electrodes change their volume during charge and discharge, the porous separators are flexible polymers with an electronic energy gap E_g large enough for the Fermi levels of the two electrodes to be within it. In this work, a porous film of self‐assembled SiO₂ nanoparticles is developed as the separator for a Li‐ion battery with a liquid electrolyte. This coating does not require the plasticity of a polymer membrane and has the required large E_g. If adsorbed water is removed from the SiO₂ surface, the nanoparticles bond to one another and to an oxide cathode to form a plastic self‐assembling porous layer into which the liquid electrolyte can penetrate. The Li‐ion batteries with a LiCoO₂ cathode coated with SiO₂ as a separator show similar performance to cells with a traditional polypropylene separator and improved cyclability with a reduced volume of liquid electrolyte owing to the electrolyte wetting properties of the SiO₂ nanoparticles. The SiO₂ nanoparticles are easy to prepare, cheap, and environmentally friendly.     

Modeling and characterization of a 5.2 GHz VCO for UWB applications in 0.13 μm CMOS process

This paper describes a 5.2 GHz voltage-controlled oscillator (VCO) as a key component in RF transceivers. The circuit includes a complementary cross-coupled MOSFET as a negative conductance, beside a tank circuit which consists of an optimal on-chip spiral inductor (L), and an accumulation mode MOS varactor (C(V)). A model for phase noise and figure merit is introduced and verified through simulation in a standard 0.13 μm CMOS process. The VCO core drew a 4.2 mA of current from a 1.2 V power supply and a phase noise of −98.5 dBc/Hz at 1 MHz offset from the 5.2 GHz carrier was calculated. The whole performance of the circuit specifically the tuning range was found to be 26%.     

Robust Flexible Textile Tribovoltaic Nanogenerator via a 2D 2H-MoS2/Ta4C3 Dynamic Heterojunction

The tribovoltaic effect can convert semiconductor interfacial frictional mechanical energy into direct current (DC) electricity, but the flexibility and durability of semiconductor materials limit its application in wearable electronic. Herein, a robust flexible textile tribovoltaic nanogenerator is presented based on a 2D dynamic heterojunction of 2H-MoS₂/Ta₄C₃ (MTNG). During the friction process, a built-in electric field (E_b) and an additional interfacial electric field (E_CE) are generated in a continuous dynamic contact of 2H-MoS₂/Ta₄C₃, and through the 2H-MoS₂/Ta₄C₃ dynamic heterojunction, a significant number of electron-hole pairs are excited and move directionally to generate a DC. The influences of mechanical pressure and sliding speed on output performance of MTNGs are systematically investigated. The MTNGs deliver excellent output power density (39.15 mW m²) and outstanding robustness (43 000 cycles). Ten MTNGs can be connected in series to obtain a DC voltage of 3.3 V and in parallel to obtain a DC current of 75 µA. Furthermore, the MTNGs can effectively power a variety of commercial electronic watches and calculators by harvesting human kinetic energy. A 2D dynamic heterojunction 2H-MoS₂/Ta₄C₃ DC nanogenerator is described and offers a workable option for the creation of flexible DC power sources and self-powered wearable electronics.     

Resistive switching characteristics of ZnO–graphene quantum dots and their use as an active component of an organic memory cell with one diode-one resistor architecture

We investigated the resistive switching characteristics of a polystyrene:ZnO–graphene quantum dots system and its potential application in a one diode-one resistor architecture of an organic memory cell. The log–log I–V plot and the temperature-variable I–V measurements revealed that the switching mechanism in a low-current state is closely related to thermally activated transport. The turn-on process was induced by a space-charge-limited current mechanism resulted from the ZnO–graphene quantum dots acting as charge trap sites, and charge transfer through filamentary path. The memory device with a diode presented a ∼10³ I_ON/I_OFF ratio, stable endurance cycles (10² cycles) and retention times (10⁴ s), and uniform cell-to-cell switching. The one diode-one resistor architecture can effectively reduce cross-talk issue and realize a cross bar array as large as ∼3 kbit in the readout margin estimation. Furthermore, a specific word was encoded using the standard ASCII character code.     

Electrical reliability of highly reliable 256M-bit mobile DRAM with top-edge round STI and dual gate oxide

A novel CMOS fabrication process with a dual gate oxide (NDGO, thin oxide 5.0 nm, thick oxide 7.8 nm) and a shallow trench isolation (STI) top-edge rounded by a pad oxide undercut was developed for a 256M-bit mobile dynamic random access memory (DRAM) with V_D=1.8 V. We present a comprehensive study on the I–V characteristics and the long-term reliability of CMOSFET fabricated by NDGO process, and compared these characteristics with those of conventional single gate oxide transistors with a gate oxide thickness 5.0–7.5 nm. While thin oxide nMOSFET have a threshold voltage of nMOSFET (V_thn) of between 0.70 and 0.72 V and a saturation current (I_DSAT) of between 280 and 300 μA/μm, thick oxide nMOSFET have a V_thn of between 0.85 and 0.90 V and an I_DSAT of between 160 and 200 μA/μm in NDGO process due to a difference in the gate oxide thickness at similar boron doses. A 10 year lifetime of thick oxide cell transistors is projected for a V_g=8.9 V due to an electrical stress release at the STI top-edge round improved by the pad oxide undercut. The hot carrier lifetime and hot electron induced punchthrough also showed good characteristics. Consequently, this NDGO process is able to provide a reliable transistor performance for a 256M-bit mobile DRAM operating at low power.