A 5-10 GHz octave-band AlGaAs/GaAs HBT-Schottky diodedown-converter MMIC

The authors describe an AlGaAs/GaAs heterojunction bipolar transistor (HBT) X-band down-converter monolithic microwave integrated circuit (MMIC) which integrates a double double-balanced Schottky mixer and five stages of HBT amplification to achieve greater than 30 dB conversion gain over an RF bandwidth from 5 to 10 GHz. In addition, an output IP3 as high as +15 dBm has been achieved. The Schottky diodes are constructed from the existing N^$collector and N⁺ subcollector layers of the HBT molecular beam epitaxy (MBE) device structure. A novel HBT amplifier topology employing active feedback which provides wide bandwidth in a compact area is used for the RF, LO, and IF amplifier stages. The complete down-converter MMIC is realized in a 3.6×3.4 mm² area, is self-biased through a 6 V supply, and consumes 530 mW. This MMIC represents the highest complexity X-band down-converter MMIC demonstrated using GaAs HBT-Schottky diode technology     

60-GHz monolithic down- and up-converters utilizing asource-injection concept

This paper deals with the design considerations, fabrication process, and performance of coplanar waveguide (CPW) heterojunction FET (HJFET) down- and up-converter monolithic microwave integrated circuits (MMIC's) for V-band wireless system applications. To realize a mixer featuring a simple structure with inherently isolated ports, and yet permitting independent port matching and low local oscillator (LO) power operation, a “source-injection” concept is utilized by treating the HJFET as a three-port device in which the LO signal is injected through the source terminal, the RF (or IF) signal through the gate terminal, and the IF (or RF) signal is extracted from the drain terminal. The down-converter chip incorporates an image-rejection filter and a source-injection mixer. The up-converter chip incorporates a source-injection mixer and an output RF filter. With an LO power and frequency of 7 dBm and 60.4 GHz, both converters can operate at any IF frequency within 0.5-2 GHz, with a corresponding conversion gain within -7 to -12 dB, primarily dominated by the related filter's insertion loss. Chip size is 3.3 mm×2 mm for the down-converter, and 3.5 mm×1.8 mm for the up-converter     

Integrated balanced sampling circuit for ultra-wideband communications and radar systems

A balanced sampling circuit realized using step recovery and Schottky diodes on coplanar waveguide, coplanar strips, and slotlines is presented for ultra-wideband communications and radar applications. An efficient design was implemented to achieve improved performance. The impulse generator, providing signal for the sampling gate, was designed with a new LO feeding structure. The fabricated circuit shows 16-19 dB conversion loss without amplifier and 1-4 dB conversion gain with amplifier across 9-GHz RF bandwidth with 500-MHz sampling frequency.     

A 9–31-GHz Subharmonic Passive Mixer in 90-nm CMOS Technology

A subharmonic down-conversion passive mixer is designed and fabricated in a 90-nm CMOS technology. It utilizes a single active device and operates in the LO source-pumped mode, i.e., the LO signal is applied to the source and the RF signal to the gate. When driven by an LO signal whose frequency is only half of the fundamental mixer, the mixer exhibits a conversion loss as low as 8–11 dB over a wide RF frequency range of 9–31GHz. This performance is superior to the mixer operating in the gate-pumped mode where the mixer shows a conversion loss of 12–15dB over an RF frequency range of 6.5–20 GHz. Moreover, this mixer can also operate with an LO signal whose frequency is only 1/3 of the fundamental one, and achieves a conversion loss of 12–15dB within an RF frequency range of 12–33 GHz. The IF signal is always extracted from the drain via a low-pass filter which supports an IF frequency range from DC to 2 GHz. These results, for the first time, demonstrate the feasibility of implementation of high-frequency wideband subharmonic passive mixers in a low-cost CMOS technology.     

Response of Quasi-Peak Detector to Periodic Impulses with Random Amplitudes

The known result for the output reading of a quasi-peak detector to periodic pulse inputs is here extended to cover inputs made up of regularly repeated pulses of the same shape, but with random amplitudes. The cosine envelope was chosen for the pulse shape and is viewed as a satisfactory approximation for the typical IF amplifier impulse response. The probability distribution for the pulse amplitude was assumed uniform over an amplitude interval; the latter is a parameter in the analysis so that the result applies, at one extreme, to pulses ranging randomly from zero amplitude to some maximum, and at the other extreme, to fixed amplitude pulses. Solutions are provided for low-frequency inputs-such as would be developed at the output of an IF amplifier followed by an envelope detector, and RF inputs-such as would be found directly at the IF amplifier output.     

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).     

Monolithic integrated blanking up-converter

A novel GaAs monolithic integrated DC-coupled up-converter is presented. It up-converts a 0.1- to 0.5-GHz signal to 0.6 to 1.75 GHz. The high level of integration has been achieved in a small chip size of 1.22 mm×1.22 mm by utilizing active matching techniques. A wideband local oscillator (LO) amplifier, an active 180° splitter, a double-balanced mixer, an RF amplifier, an actively matched IF amplifier, and an RF blanking circuit are integrated on a GaAs chip. The up-converter exhibits an 8-dB conversion gain, a maximum input/output voltage standing wave ratio (VSWR) of less than 1.6, and a 40-dB RF blanking for an IF of 0.1 to 0.5 GHz and LO of 0.5-1.25 GHz. The measured results are in good agreement with the simulated results     

一款集成驱动放大器的低变频损耗混频器设计

采用0.5μm GaAs工艺设计并制造了一款单片集成驱动放大器的低变频损耗混频器.电路主要包括混频部分、巴伦和驱动放大器3个模块.混频器的射频(RF)、本振(LO)频率为4～7 GHz,中频(IF)带宽为DC～2.5 GHz,芯片变频损耗小于7 dB,本振到射频隔离度大于35 dB,本振到中频隔离度大于27 dB.1 dB压缩点输入功率大于11 dBm,输入三阶交调点大于20 dBm.该混频器单片集成一款驱动放大器,解决了无源混频器要求大本振功率的问题,变频功能由串联二极管环实现,巴伦采用螺旋式结构,在实现超低变频损耗和良好隔离度的同时,保持了较小的芯片面积.整体芯片面积为1.1 mm×1.2 mm.     

A 0.7-7 GHz wideband reconfigurable receiver RF front-end in CMOS

In this paper,a 0.7-7 GHz wideband RF receiver front-end SoC is designed using the CMOS process.The front-end is composed of two main blocks:a single-ended wideband low noise amplifier (LNA) and an inphase/quadrature (I/Q) voltage-driven passive mixer with IF amplifiers.Based on a self-biased resistive negative feedback topology,the LNA adopts shunt-peaking inductors and a gate inductor to boost the bandwidth.The passive down-conversion mixer includes two parts:passive switches and IF amplifiers.The measurement results show that the front-end works well at different LO frequencies,and this chip is reconfigurable among 0.7 to 7 GHz by tuning the LO frequency.The measured results under 2.5-GHz LO frequency show that the front-end SoC achieves a maximum conversion gain of 26 dB,a minimum noise figure (NF) of 3.2 dB,with an IF bandwidth of greater than 500 MHz.The chip area is 1.67 × 1.08 mm2.     

Broadband single- and double-balanced resistive HEMT monolithicmixers

A double-balanced (DB) 3-18 GHz and a single-balanced (SB) 2-16 GHz resistive HEMT monolithic mixer have been successfully developed. The DB mixer consists of a AlGaAs/InGaAs HEMT quad, an active LO balun, and two passive baluns for RF and IF. At 16 dBm LO power, this mixer achieves the conversion losses of 7.5-9 dB for 4-13 GHz RF and 7.5-11 dB for 3-18 GHz RF. The SB mixer consists of a pair of AlGaAs/InGaAs HEMT's, an active LO balun, a passive IF balun and a passive RF power divider. At 16 dBm LO power, this mixer achieves the conversion losses of 8-10 dB for 4-15 GHz RF and 8-11 dB for 2-16 GHz RF. The simulated conversion losses of both mixers are very much in agreement with the measured results. Also, the DB mixer achieves a third-order input intercept (IP₃) of +19.5 to +27.5 dBm for a 7-18 GHz RF and 1 GHz IF at a LO drive of 16 dBm while the SB mixer achieves an input IP ₃ of +20 to +28.5 dBm for 2 to 16 GHz RF and 1 GHz IF at a 16 dBm LO power. The bandwidth of the RF and LO frequencies are approximately 6:1 for the DB mixer and 8:1 for the SB mixer. The DB mixer of this work is believed to be the first reported DB resistive HEMT MMIC mixer covering such a broad bandwidth     

A 2-V, 1-10 GHz BiCMOS transceiver chip for multimode wirelesscommunications networks

This paper concerns the design consideration, fabrication process, and performance results for an ultra-broadband, low-voltage, low-power, BiCMOS-based transceiver chip for cellular-satellite-LAN wireless communication networks. The transceiver chip incorporates an RF amplifier, a Gilbert down-mixer, and an IF amplifier in the receive path, and an IF amplifier, a Gilbert up-mixer, and an RF amplifier in the transmit path. For an RF frequency in the 1-10 GHz band and an IF frequency in the 100-1000 MHz band, the developed transceiver chip consumes less than 60 mW at 2 V, to yield a downconversion gain of 40 dB at 1 GHz and 10 dB at 10 GHz and an upconversion gain of 42 dB at 1 GHz and 11 dB at 10 GHz. To avoid possible start-up problems caused during “stand-by” to “enable” mode transition, a simple switching technique is employed for enabling either the receive or the transmit path, by changing the value of a reference voltage applied to both the down- and the up-mixers. While the developed transceiver chip exhibits the best performance for a dc supply voltage of 2 V, it shows a graceful degradation for a ±0.15 V voltage deviation. The transceiver's chip size is 1.04 mm×1.04 mm     

A 20 GHz microwave sampler

A microwave sampler circuit which operates over the frequency band of 1-20 GHz and has a number of novel features is described. These features include a wideband microstrip-to-slot balun and a wideband active isolator the function of which is to reduce the local oscillator to RF leakage from the input port of the sampler. The signal-to-noise ratio over the input bandwidth is greater than 20 dB at an input power level of -32 dBm. This signal-to-noise ratio was measured in an IF bandwidth of 175 MHz and includes the contribution from the IF amplifier. The sampler, which is made on alumina using MIC techniques, has an integrated impulse generator driven with a sinusoidal local oscillator of only 20 dBm over the frequency band of 250-350 MHz. The IF signal is in the 10-175-MHz band. The RF input VSWR is better than 2:1 up to 20 GHz, and the oscillator to RF breakthrough is better than -58 dBm (-78 dBc) when driven with a local oscillator of 20 dBm. This unusually low leakage was achieved by using the active isolator prior to the sampling circuit     

应用于IEEE 802.11b无线局域网系统的2.4GHzCMOS单片收发机射频前端

实现了一个应用于IEEE 802.11b无线局域网系统的2.4GHz CMOS单片收发机射频前端,它的接收机和发射机都采用了性能优良的超外差结构.该射频前端由五个模块组成:低噪声放大器、下变频器、上变频器、末前级和LO缓冲器.除了下变频器的输出采用了开漏级输出外,各模块的输入、输出端都在片匹配到50Ω.该射频前端已经采用0.18μm CMOS工艺实现.当低噪声放大器和下变频器直接级联时,测量到的噪声系数约为5.2dB,功率增益为12.5dB,输入1dB压缩点约为-18dBm,输入三阶交调点约为-7dBm.当上变频器和末前级直接级联时,测量到的噪声系数约为12.4dB,功率增益约为23.8dB,输出1dB压缩点约为1.5dBm,输出三阶交调点约为16dBm.接收机射频前端和发射机射频前端都采用1.8V电源,消耗的电流分别为13.6和27.6mA.     

45 GHz active HEMT mixer

A low-noise 45 GHz mixer has been realised using a high electron mobility transistor (HEMT). This is the first reported active mixer above 30 GHz and the first reported HEMT mixer. The mixer exhibits 1.5 dB maximum gain at 4 dBm local oscillator (LO) power and 8.1 dB noise figure, including a 2.6 dB NF IF amplifier, at 2 dBm LO power.     

High-isolation photonic microwave mixer/link for wideband signal processing and transmission

We have proposed, analyzed, and demonstrated a high-isolation photonic microwave mixer using an integrated, dual-stage balanced-bridge Mach-Zehnder modulator. The proposed balanced photonic microwave mixer provides not only high isolation between radio frequency (RF) signal and local oscillator (LO) ports, but also excellent isolation between intermediate frequency (IF) and RF/LO ports without any filters. In this paper, the structure, principle, and operation settings are discussed in detail. Experimental results showed >60 dB electrical isolation between RF and LO ports and >50 dB isolation between IF and RF/LO ports in a demonstrative photonic microwave mixer. This device can extend the bandwidth of a modulator and have wide applications in RF photonic links where RF signal conversion and processing are required.     

60 GHz MMIC double balanced Gilbert mixer in mHEMT technology with integrated RF, LO and IF baluns

A 60 GHz MMIC double balanced Gilbert mixer (DBGM) with integrated RF, LO and IF baluns has been designed, fabricated in an mHEMT MMIC technology and characterised with probed measurements. Although a standard mixer topology for integrated circuits in the low gigahertz region, the DBGM has had very little impact in the millimetre-wave range. To the authors' knowledge, the presented DBGM operates at the highest RF frequency ever published for any FET-based Gilbert type mixer, double or single balanced. A measured down conversion gain of 1.5 dB at 60 GHz is obtained with a DC power consumption of 300 mW. Further, IF bandwidth, isolation between the LO, RF and IF ports, 1 dB compression point for the RF input, and LO input power is presented     

A high sensitivity and wide dynamic range zero-IF RF receiver for cognitive radio application

This paper presents an RF receiver of zero-Intermediate Frequency (IF) architecture for Cognitive Radio (CR) communication systems. Zero-IF architecture reduce the image reject filter and IF filter, so it is excellent in low cost, compact volume, and low power dissipation. The receiver employs three digital attenuator and a high gain, high linearity low noise amplifier to achieve wide dynamic range of 70 dB and high receiving sensitivity of −81 dBm. A fully balanced I/Q demodulator and a differential Local Oscillator (LO) chips are used to minimize the negative effects caused by second-order distortion and LO leakage. In order to select an 8 MHz-channel from 14 continuous ones located in UHF band (694–806 MHz) accurately, approach of channel selectivity circuits is proposed. The RF receiver has been designed, fabricated, and test. The measured result shows that the noise figure is 3.4 dB, and the error vector magnitude is 7.5% when the input power is −81 dBm.     

Simultaneous all-optical frequency downconversion technique utilizing an SOA-MZI for WDM radio over fiber (RoF) applications

Simultaneous all-optical frequency-downconversion technique utilizing a semiconductor optical amplifier Mach-Zehnder interferometer (SOA-MZI) is experimentally demonstrated, and its application to a wavelength-division-multiplexing (WDM) radio over fiber (RoF) uplink is proposed. The conversion efficiencies from 22.5 (f/sub RF/) to 2.5 GHz (f/sub IF/=f/sub RF/-2f/sub LO/) are in the range from 1.5 to 3 dB for the optical RF wavelength between 1548 and 1558 nm. Error-free simultaneous all-optical frequency downconversion of the two WDM RoF upstream channels that carry 155-Mb/s differential phase-shift keying data at 22.5 GHz to an optical intermediate frequency signal having the frequency of 2.5 GHz with the power penalty less than 0.1 dB at the bit error rate of 10/sup -8/ is achieved.     

5.2/5.7-GHz 48-dB Image Rejection GaInP/GaAs HBT Weaver Down-Converter Using LO Frequency Quadrupler

A GaInP/GaAs heterojunction bipolar transistor (HBT) down-converter using the Weaver architecture is demonstrated in this paper. The Weaver system is a double-conversion image rejection heterodyne system which requires no bandpass filters in the signal path and no quadrature networks. The Weaver down-converter has the image rejection ratios of 48 dB and 44 dB when the RF frequency is 5.2 GHz and 5.7 GHz, respectively. A new frequency quadrupler is employed in the down-converter to generate the local oscillator (LO) signals. The frequency quadrupler is designed to minimize the phase error when generating LO signals and thus the image rejection performance is improved. A diagrammatic explanation using the complex mixing technique to analyze the image rejection mechanism of the Weaver architecture is developed in this paper. From our analysis, the image rejection can be further improved by making the LO₁ and LO₂ signals coherent     

A Common Source Input Cross Coupled Quad CMOS Mixer*

A CMOS doubly balanced mixer circuit is implemented with a source follower input and a cross coupled mixing quad. The circuit employs an all N-channel configuration and is suitable for high frequency applications. As a down-converter with an RF input of 2.0 GHz and an IF output of 200 MHz, the mixer demonstrates 9 dB of conversion loss with a corresponding input referred third order intercept of 0 dBm. As an up-converter with an IF input frequency of 400 MHz and an RF output of 2.4 GHz, the mixer demonstrates 14 dB of conversion loss.