Free charge transfer in charge-coupled devices

The free charge-transfer characteristics of charge-coupled devices (CCD's) are analyzed in terms of the charge motion due to thermal diffusion, self-induced drift, and fringing field drift. The charge-coupled structures considered have separations between the gates equal to the thickness of the channel oxide. The effect of each of the above mechanisms on charge transfer is first considered separately, and a new method is presented for the calculation of the self-induced field. Then the results of a computer simulation of the charge-transfer process that simultaneously considers all three charge-motion mechanisms is presented for three-phase CCD's with gate lengths of 4 and 10 µ. The analysis shows that while the majority of the charge is transferred by means of the self-induced drift that follows a hyperbolic time dependence, the last few percent of the charge decays exponentially under the influence of the fringing field drift or thermal diffusion, depending on the design of the structure. The analysis shows that in CCD's made on relatively high resistivity substrates, the transfer by fringing-field drift can be very fast, such that transfer efficiencies of 99.99 percent are expected at 5- to 10- MHz bit rates for 10-µ gate lengths and at up to 100 MHz for 4-µ gate lengths.     

Experimental confirmation of an analytical model for charge transfer in charge-coupled devices

An analytical model for the charge loss as a function of transfer time under low charge levels in surface channel charge-coupled devices has been theoretically determined and experimentally confirmed. The model includes the effect of surface states. A new method of measuring charge transfer makes it possible to determine the role that surface states play in the degradation of signal charge transfer.     

Charge transfer in overlapping gate charge-coupled devices

A detailed numerical simulation of the free charge transfer in overlapped gate charge-coupled devices is presented. The transport are analyzed in terms of thermal diffusion, self-induced fields, and fringing fields under all the relevant electrodes and interelectrode regions with time-varying gate potentials. The results of the charge transfer with different clocking schemes and clocking waveforms are presented. The dependence of the stages of the charge transfer on the device parameters are discussed in detail. A lumped-circuit model of CCD that could be used to obtain the charge-transfer characteristics with various clocking waveforms is also presented.     

Measurement of transfer efficiency of charge-coupled devices

A simple method for measuring the transfer efficiency of charge- coupled devices is described. It is based on the effect of charge pumping in MOS devices and has the advantages that (1) it requires a simple device and simple pulsing circuitry; and (2) the lost charge is evaluated from d.c. measurement.     

Experimental results on junction charge-coupled devices

In junction charge-coupled devices (JCCD's) unique possibilities exist for charge injection and charge detection, which make this device an interesting candidate for analog as well as digital applications. Based on potential calculations published earlier, two processes A and B have been designed for fabricating JCCD's. The essential steps for obtaining a smooth channel potential in process A are a very light phosphorus implantation over the whole device and a phosphorus implantation through the same window used to diffuse the p-type gates. In process B, one phosphorus implantation over the whole device is used and V-groove etching provides the separation between the p-type gates. Devices have been realized with different process parameters. Irregularities in the channel potential were measured using special test devices. The best devices in process A have a transfer inefficiency of 10^-5and a charge-handling capability of 5.10¹¹electrons/cm². In this process, with only seven masking steps, bipolar NPN transistors, and n-channel JFET's were also realized. These excellent results have stimulated further research on analog and digital applications of JCCD's.     

Theoretical analysis of charge transfer in thin-film charge-coupled devices

The charge-transfer process in thin-film charge-coupled devices made from, e.g. hydrogenated amorphous silicon (a-Si:H) is analysed mathematically. This analysis considers the spatial coordinate in the transfer direction explicitly, while, by making use of the thin film feature, it is formulated as a quasi 1-D problem. In agreement with previous work, it is found that the thickness of the active layer influences the deleterious effect of localized states. However, it is shown that for a realistic distribution of localized states in undoped a-Si:H, the transfer inefficiency can approach the ultimate trap-free case when the active layer thickness is reduced to below 0.1 μm. Such a device can be operated at a frequency of slightly less than 100 kHz.     

Experimental observation of avalanche multiplication in charge-coupled devices

Avalanche multiplication of signal charge in surface-channel charge-coupled devices is reported in this paper. Experimental observations show that avalanche multiplication takes place when the electrons are made to fall down a steep barrier of more than 8 V in an overlapping gate structure. For a 16-V fall, the gain in charge is about 3-percent per transfer. A simple model is developed which explains the experimental data reasonably well. The upper limit to the amplitude of clock voltages that can be applied to a CCD is likely to be determined by this avalanche multiplication mechanism rather than the oxide breakdown criterion.     

Charge transfer in charge-coupled devices in the presence of interface states

The transfer of charge from under a gate of a three-phase surface-channel charge-coupled device is analysed in terms of thermal diffusion, charge-gradient induced drift, fringing field drift, and interface state trapping. A method based on a piecewise approximation for the emission rate from interface states is proposed and used to derive the single-transfer characteristics in the presence of interface traps. It is shown that the emission rate exhibits a marked spatial dependence, which is a function of both fringing field profile and interface state density. It is also concluded that trapping effects are a strong limitation on the transfer efficiencies attainable in surface-channel charge-coupled devices at low and moderate frequencies.     

Numerical methods for the charge transfer analysis of charge-coupled devices

Charge transfer phenomenon in charge-coupled devices is characterized by a nonlinear partial differential equation of the parabolic type, usually coupled with a very undesirable nonlinear boundary condition. In this study, special treatment is made to the boundaries such that the nonlinearity of the boundary condition does not appear in the final calculation. Four possible finite-difference schemes for this problem are described and results compared. Through numerical experimentations, the linearized Crank-Nicolson scheme is proved to exhibit superior quality and is recommended for the exclusive use in studying the charge transfer phenomenon in CCD. Using this scheme, the charge transfer phenomenon of a two phase overlapping gate CCD has been studied and numerical results are presented. Special emphasis is directed toward the relative importance of the self-induced drift, fringing field drift and thermal diffusion currents. Also, the usefulness of approximating a spatial fringing field pattern by a constant value to the charge transfer phenomenon is discussed.     

Interlacing in charge-coupled imaging devices

Solid-state imaging devices to be used in commercial broadcast TV or the Picturephone® system have to supply the video information in a 2:1 interlaced timing format. An efficient way to achieve such a readout from charge-coupled area imaging devices of the frame transfer type is described. The resolution cells of the device are elongated in the vertical dimension to extend across the distance corresponding to two scanning lines in the display. For the two fields forming a full frame the charge generated by the incident light is integrated alternately underneath different sets of electrodes. Experimental results obtained on a 64 × 106 element frame transfer array are presented and compared to theory. They show that in a three-phase structure, by alternately integrating the charge underneath electrodes number 1 and numbers 2+3 jointly, the vertical resolution can be improved by about a factor of 2. This results in a limiting resolution in the vertical direction of about 75 percent of that given by the spatial pitch of the transfer cells. The value 75 percent is characteristic of all raster scanned imaging devices and is a result of the line scanned display. The usefulness of this scheme for line imaging devices is also discussed but is dismissed as being inferior to a bilinear approach with separate interdigitated integration sites.     

Overlapping-gate buried-channel charge-coupled devices

In this letter the advantages of the overlapping-gate buried-channel charged-coupled devices over the 3-phase metal-gate and resistive-gate buried-channel c.c.d. are discussed and pertinent design considerations for the overlapping-gate c.c.d.s are presented.     

Noise measurements in charge-coupled devices

Measurements of the noise levels at the output of surface and bulk channel charge-coupled devices with three-phase overlapping polysilicon electrodes are presented. Pulser noise, correlated transfer noise, shot noise, dark current noise, and electrical insertion noise at the input have been measured and studied. The dependences of the electrical insertion noise and the transfer noise on charge packet size and clock frequency are discussed in detail and the latter related to interface state densities. New schemes and input circuits for low-noise electrical insertion of the signal charge are discussed. Our measurements indicate that the noise levels due to the intrinsic noise sources (transfer and storage noise) agree with our physical understanding of the device operation. The noise levels due to the extrinsic noise sources (pulser noise and electrical insertion noise) are above the expected theoretical values.     

Moat-etched two-phase charge-coupled devices

A novel technique for fabricating two-phase charge-coupled devices is described. The structure requires only thermally grown SiO₂ and makes use of moats etched into the silicon which in conjunction with a single layer metallization achieve small interelectrode spacings and directionality of charge transport. The feasibility of the technique is demonstrated experimentally. The devices fabricated were successfully operated as both digital and analog shift registers. The method described offers certain advantages in ease of fabrication and reliability along with the capability for high speed operation.     

Introduction to charge-coupled devices

The operating principles of charge-coupled devices are described in terms of the basic properties of semiconductors. The overall aim is for those unfamiliar with CCD's to understand how they work and thus to appreciate their capabilities as well as their limitations. The topics discussed include charge storage and transfer, electrical and optical inputting of charge and charge sensing, factors governing maximum and minimum operating frequencies, transfer efficiency, and basic CCD fabrication techniques.     

Theory of amorphous-silicon charge-coupled devices

The theory of operation of amorphous-silicon charge-coupled devices has been studied numerically and analytically under the assumption that the localized states in amorphous-silicon are distributed exponentially with respect to energy. The transfer inefficiency ε is found to depend not only on the localized state density but also on the transit time and initial density of signal electrons. The approximate analysis shows thatln(epsilon)is a linear function of logarithmic clock frequency, and that its coefficient is given by the characteristic temperature which represents the steepness of the localized state density distribution in amorphous-silicon.     

A simple driving and frequency characterization technique for two-phase charge-coupled devices

A driving technique for two-phase devices is described which requires only one clock both to drive the charge-coupled device (CCD) and to reset a floating output diffusion. This driving technique has permitted the development of a simple method of frequency characterization of two-phase CCD's. This involves the use of a single clock pulse of variable mark-space ratio, allowing the measurement of high-frequency CCD performance using circuitry, most of which is operated at low frequency.     

Thermal carrier generation in charge-coupled devices

The build-up of thermally generated carriers in a charge-coupled device shift register is characterized by constructing a model for the generation inside a single shift-register bit. Using the model, theoretical response curves are constructed for two practical modes of operation where the contribution from the generation of carriers can be substantial. Experiments are presented which confirm all aspects of the theoretical response curves, including the presence of an initial period of reduced generation in one of the two modes. Procedures for determining generation parameters directly from observed CCD characteristics are presented and implemented. One generation parameter, the minority carrier lifetime τ, is determined by employing the CCD connected in a gate-controlled diode configuration; two others, the depleted surface generation velocity s0, and the general shape of the depletion layer, are determined utilizing a curve fitting procedure. The spatial variation in generation rates is also investigated and found to possess a distribution which is skewed positively and not Gaussian.     

Hot electrons in short-gate charge-coupled devices

Calculations are presented which show that the heating of electrons by high electric fields in short-gate surface-channel charge-coupled devices slows down the charge transfer process because of mobility reduction and hot carrier diffusion. Other consequences of carrier heating are a reduction of the interface-trapping noise and transfer inefficiency at short transfer cycles.     

Drift-aiding fringing fields in charge-coupled devices

Transverse electric fields at the Si-SiO/SUB 2/ interface (fringing fields) can aid transfer of charge from one potential well to another in charge- coupled devices (CCD). The magnitudes of these drift-aiding fringing fields are evaluated by an approximate analysis and also by computer. The analytical approach assumes zero space charge in the silicon and agrees with the computer solutions in that limit. When the depletion width becomes less than the gate width the fringing field is reduced considerably. Transit times associated with these fringing fields are evaluated. Trapping of charge in interface states rather than transfer of free charge is expected to be the fundamental limitation on speed and transfer efficiency in appropriately designed CCDs.