A Device-Level Vacuum-Packaging Scheme for Microbolometers on Rigid and Flexible Substrates

This paper reports on the design, fabrication, and characterization of device-level vacuum-packaged microbolometers on rigid Si wafers and flexible polyimide substrates. Semiconducting yttrium barium copper oxide (commonly referred to as YBCO) serves as the bolometric material. Operating micromachined bolometers in vacuum reduces the thermal conductance G_th from the detector to the substrate. If flexibility of the substrate is not to be sacrificed, then the vacuum packaging needs to be done at the device level. Here, the microbolometers are fabricated on a silicon nitride support membrane, isolated from the substrate using surface micromachining. Suitable materials as well as various dimensions in the vacuum cavity are determined using finite-element method (FEM)-based CoventorWARE. A vacuum cavity made of Al₂O₃ has been designed. The thermal conductance G_th of bolometers with the geometry implemented in this work is the same for devices on rigid and flexible substrates. The theoretical value of G_th was calculated to be 4.0 x 10^-6 W/K for devices operating in vacuum and 1.4 x 10^-4 W/K for devices operating at atmospheric pressure. Device-level vacuum-packaged microbolometers on both rigid Si and flexible polyimide substrates have been fabricated and characterized for optical and electrical properties. A low thermal conductance of 1.1 X 10^-6 W/K has been measured six months after fabrication, which implies an intact vacuum cavity.     

用于微电子机械系统封装的体硅键合技术和薄膜密封技术

对静电键合、体硅直接键合和界面层辅助键合等三种体硅键合技术，整片操作、局部操作和选择保护等三种密封技术，以及这些技术用于微电子机械系统的密封作了评述，强调在器件研究开始时应考虑封装问题，具体技术则应在保证器件功能和尽量减少芯片复杂性两者之间权衡决定。     

Imprinted laminate wafer-level packaging for SAW ID-tags and SAW delay line sensors

We have developed a wafer-level packaging solution for surface acoustic wave devices using imprinted dry film resist (DFR). The packaging process involves the preparation of an imprinted dry film resist that is aligned and laminated to the device wafer and requires one additional lithography step to define the package outline. Two commercial dry film solutions, SU-8 and TMMF, have been evaluated. Compared with traditional ceramic packages, no detectable RF parasitics are introduced by this packaging process. At the same time, the miniature package dimensions allow for wafer-level probing. The packaging process has the great advantage that the cavity formation does not require any sacrificial layer and no liquids, and therefore prevents contamination or stiction of the packaged device. This non-hermetic packaging process is ideal for passive antenna modules using polymer technology for low-cost SAW identification (ID)-tags or lidding in low-temperature cofired ceramic (LTCC) antenna substrates for high-performance wireless sensors. This technique is also applicable to SAW filters and duplexers for module integration in cellular phones using flip-chip mounting and hermetic overcoating.     

Epitaxial growth and thermal stability of silicon layers on crystalline gadolinium oxide

In this work, an unconventional approach for epitaxial growth of Si on single-crystalline rare-earth oxide is presented using molecular beam epitaxy under ultra-high vacuum. Surface and bulk crystalline structures as well as chemical content were examined. Silicon-on-insulator layers were fabricated by encapsulated solid phase epitaxy on Si(111) substrate. The gadolinium oxide capping layer was removed by wet-chemical etching. The remaining silicon layer is single crystalline without any impurities and exhibits 7 × 7 reconstructed surface after annealing in very low silicon flux in the growth chamber. The thermal stability of the fabricated silicon-on-insulator structure was studied by step-wise heating under ultra-high vacuum conditions. The fabricated ultra-thin (10-15 nm) silicon-on-oxide layers remain structurally and chemically stable up to 900 °C.     

Fluxless bonding of silicon wafers to molybdenum substrates using electroplated tin-rich solder

A novel fluxless bonding process of silicon wafer on molybdenum substrate is successfully developed. Si-to-Mo bonding can be used for packaging power devices, especially when a device consists of an entire wafer. 300 Å Cr layer and 1,000 Å Au layer are first deposited on Si wafers and Mo substrates. The Cr/Au dual layer is used as underbump metallurgy and seed layer of electroplating. To reduce plastic shear strain on the solder in a bonded pair, thick Sn layer (70 μm) is electroplated over Mo substrates having Cr/Au structure, followed immediately by thin (0.1 μm) Ag layer. This Ag layer acts as the capping layer to prevent inner Sn from oxidation. The bonding process is performed in 50 millitorrs vacuum to inhibit oxidation. The bonding condition is 290 °C for 15 min without the use of any flux. The bonding layer thickness is controlled at 50 μm by small spacers placed between Si wafer and Mo substrate. Microstructure and composition of the joints are studied under scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDX). Scanning acoustic microscopy (SAM) is also used to verify the quality of joints over the entire sample. Without using any flux, high quality and uniform bonding layer is achieved. The composition of the joint is more than 97 at.% Sn. No intermetallic compound layers exist in the joint. This novel fluxless bonding process should be valuable in packaging large high power devices.     

Filter-protected photodiodes for high-throughput enzymatic analysis

This paper relates to the use of a thin film of re-crystallized (polycrystalline) silicon as a low-pass rejection filter in the ultraviolet light range and, more particularly, to the use of this layer as a protective layer for semiconductor diodes. The polycrystalline silicon filters were fabricated by laser annealing a thin film of amorphous silicon deposited by an LPCVD process. A standard component of the polysilicon-gate CMOS process is the boron phosphor silicate glass (BPSG) planarization layer. Since this layer is always applied, the possibility of using it as the isolator between the diode and the filter (and, thereby, omit one SiO/sub 2/ layer) is considered. Using scanning electron microscopy, we compared the crystallization process of the LPCVD silicon film deposited on a glass substrate and on a BPSG layer. The fabrication and the characterization of the filter-protected photodiodes are described in the paper.     

Application of nanoporous silicon for a metal-semiconductor-metal visible light photodetector

In this paper we present a study on the application of nanoporous silicon to an optoelectronic device called a nanoporous silicon metal-semiconductor-metal (MSM) visible light photodetector. This device was fabricated on a nanoporous silicon layer which was formed by electrochemical etching of a silicon wafer in a hydrofluoric acid solution under various anodization conditions such as the resistivity of the silicon wafer, current density, concentration of the hydrofluoric acid solution and anodization time. The structure of this device has two square Al/nanoporous silicon Schottky-barrier junctions on the silicon substrate and the electrode spacing is 500 microm. The experiment will study photoresponse and the response time of a nanoporous silicon MSM photodetector which was fabricated on the various porosity of a nanoporous silicon layer. It is found that when devices are fabricated on a higher porosity nanoporous silicon layer, the photoresponse of the device will expand toward the short-wavelength and the bandwidth of the spectrum response will cover visible light. In addition, it is found that the response time of the device decreases.     

Field-emission electron source for vacuum micropump

In the work a conception of a miniature, orbitron ion vacuum micropump for an integration with vacuum MEMS devices is presented. It is made of silicon and glass using microengineering technology. The main part of the device is a lateral field-emission source of electrons, which has been fabricated on oxidized silicon wafer. Both, cold cathode and anode of the source are made of thin gold layer using only one photolithography process. Fabrication process and the preliminary results of electrical tests of the field-emission electron source are presented. Experimental studies have shown its good emission parameters: a low threshold voltage (over a dozen Volts), a high electron current (from tens to several hundred micro amperes), and field enhancement coefficient from 10⁷ to 10⁸ cm⁻¹. These results are promising and give possibility to fabricate orbitron micropump as an integrated part of vacuum MEMS.     

离体电生理检测微电极阵列传感器的设计与制备(英文)

针对动物离体组织电生理检测的实际需求,设计并制备了一种以载玻片为基底,以微电极阵列为敏感元件,并将灌流装置集成一体的传感器芯片.采用微电子机械系统(MEMS)技术中的薄膜工艺完成了微电极阵列的制备,其导电层和绝缘层分别是铂和氮化硅.采用聚二甲基硅烷(PDMS)浇铸制成埋有管道的方形灌流槽.该传感器可保持离体组织的生理活性,同时实现电生理信号的64通道同步记录.整个芯片结构紧凑,接口简单,使用方便.对芯片的电学性能进行了研究,结果表明,通过在微电极表面电镀修饰铂黑,可有效降低其交流阻抗,提高信噪比.     

N-type crystalline silicon films free of amorphous silicon deposited on glass by HCl addition using hot wire chemical vapour deposition

Since n-type crystalline silicon films have the electric property much better than those of hydrogenated amorphous and microcrystalline silicon films, they can enhance the performance of advanced electronic devices such as solar cells and thin film transistors (TFTs). Since the formation of amorphous silicon is unavoidable in the low temperature deposition of microcrystalline silicon on a glass substrate at temperatures less than 550 degrees C in the plasma-enhanced chemical vapour deposition and hot wire chemical vapour deposition (HWCVD), crystalline silicon films have not been deposited directly on a glass substrate but fabricated by the post treatment of amorphous silicon films. In this work, by adding the HCl gas, amorphous silicon-free n-type crystalline silicon films could be deposited directly on a glass substrate by HWCVD. The resistivity of the n-type crystalline silicon film for the flow rate ratio of [HCl]/[SiH4] = 7.5 and [PH3]/[SiH4] = 0.042 was 5.31 x 10(-4) ohms cm, which is comparable to the resistivity 1.23 x 10(-3) ohms cm of films prepared by thermal annealing of amorphous silicon films. The absence of amorphous silicon in the film could be confirmed by high resolution transmission electron microscopy.     

Field-emission electron source for vacuum micropump

In the work a conception of a miniature, orbitron ion vacuum micropump for an integration with vacuum MEMS devices is presented. It is made of silicon and glass using microengineering technology. The main part of the device is a lateral field-emission source of electrons, which has been fabricated on oxidized silicon wafer. Both, cold cathode and anode of the source are made of thin gold layer using only one photolithography process. Fabrication process and the preliminary results of electrical tests of the field-emission electron source are presented. Experimental studies have shown its good emission parameters: a low threshold voltage (over a dozen Volts), a high electron current (from tens to several hundred micro amperes), and field enhancement coefficient from 10⁷ to 10⁸ cm⁻¹. These results are promising and give possibility to fabricate orbitron micropump as an integrated part of vacuum MEMS.     

The effect of substrate temperature on the oxidation behavior of erbium thick films

The effect of substrate temperature on the oxidation behavior of erbium thick films, fabricated by electron-beam vapor deposition (EBVD), was investigated by X-ray photoelectron spectroscopy (XPS), X-ray diffraction (XRD), and scanning electron microscopy (SEM). The erbium thick film is black when it is deposited at substrate temperature below 450 °C and turns gray at higher substrate temperature in a vacuum pressure of approximately 1.5 × 10⁻⁶ Torr, which indicates that the thickness of erbium oxide layer formed on the surface of erbium films increases with the decreasing substrate temperature. XPS depth profile results demonstrate that the thickness of the surface erbium oxide layer of erbium film deposited at substrate temperature of 550 and 350 °C are about 50 and 75 nm, respectively. The thicker oxide layer at lower substrate temperatures may be attributed to grain size and the dynamic vacuum condition around the substrates. Other possible factors involved in the oxidation behavior are also discussed.     

A carpet cloak for visible light

We report an invisibility carpet cloak device, which is capable of making an object undetectable by visible light. The cloak is designed using quasi conformal mapping and is fabricated in a silicon nitride waveguide on a specially developed nanoporous silicon oxide substrate with a very low refractive index (n<1.25). The spatial index variation is realized by etching holes of various sizes in the nitride layer at deep subwavelength scale creating a local effective medium index. The fabricated device demonstrates wideband invisibility throughout the visible spectrum with low loss. This silicon nitride on low index substrate can also be a general scheme for implementation of transformation optical devices at visible frequencies.     

圆片级气密封装及通孔垂直互连研究

提出了一种新颖的圆片级气密封装结构.其中芯片互连采用了通孔垂直互连技术:KOH腐蚀和DRIE相结合的薄硅晶片通孔刻蚀技术、由下向上铜电镀的通孔金属化技术、纯Sn焊料气密键合和凸点制备相结合的通孔互连技术.整个工艺过程与IC工艺相匹配,并在圆片级的基础上完成,可实现互连密度200/cm2的垂直通孔密度.该结构在降低封装成本,提高封装密度的同时可有效地保护MEMS器件不受损伤.实验还对结构的键合强度和气密性进行了研究.初步实验表明,该结构能够满足MIL-STD对封装结构气密性的要求,同时其焊层键合强度可达8MPa以上.本工作初步在工艺方面实现了该封装结构,为进一步的实用化研究奠定了基础.     

Annealing studies and electrical properties of SnS-based solar cells

Thin films of SnS (tin sulphide) were thermally evaporated onto glass and CdS/ITO (cadmium sulphide/indium tin oxide) coated glass substrates and then annealed in vacuum with the aim of optimising them for use in photovoltaic solar cell device structures. The chemical and physical properties of the layers were determined using scanning electron microscopy, energy dispersive x-ray analysis, x-ray diffraction, and transmittance versus wavelength measurements. “Superstrate configuration” devices were also made using indium tin oxide as the transparent conductive oxide, thermally evaporated cadmium sulphide as the buffer layer and evaporated copper/indium as the back contact material. Capacitance-voltage data are given for the fabricated devices. Capacitance-voltage, spectral response and I-V data are given for the fabricated devices.     

Integrated 3-D Silicon Electrodes for Electrochemical Sensing in Microfluidic Environments: Application to Single-Cell Characterization

A microtechnology allowing the integration of thin metal electrodes and three dimensional highly doped bulk silicon electrodes on a hybrid PDMS/glass fluidic microchip has been developed. The fabrication involved anodic bonding of a silicon wafer onto glass substrate, deep reactive ion etching of 3-D bulk silicon electrodes, and plasma bonding of a PDMS microfluidic structure on a silicon/gold/glass substrate. The devices realized using this technology have been used for electrical impedance characterization of chemical and biological material. Microdevices with typical dimensions of hundreds of micrometers have been fabricated and tested in the determination of the conductivity of NaCl solutions. Smaller sensors, with critical dimensions under 10 m, have been achieved for single-cell characterization. Human hepatocellular liver carcinoma cells have been introduced in the microimpedance sensors. Measurements show the interfacial relaxation of the cellular membrane in the range. It is expected that other electrochemical sensors and electrokinetic actuators can benefit from this technology.     

Fabrication of flexible and vertical silicon nanowire electronics

Vertical silicon nanowire (SiNW) array devices directly connected on both sides to metallic contacts were fabricated on various non-Si-based substrates (e.g., glass, plastics, and metal foils) in order to fully exploit the nanomaterial properties for final applications. The devices were realized with uniform length Ag-assisted electroless etched SiNW arrays that were detached from their fabrication substrate, typically Si wafers, reattached to arbitrary substrates, and formed with metallic contacts on both sides of the NW array. Electrical characterization of the SiNW array devices exhibits good current-voltage characteristics consistent with the SiNW morphology.     

Non-uniform deposition in the early stage of hot-wire chemical vapor deposition of silicon: The charge effect approach

The deposition behavior in hot-wire chemical vapor deposition (HWCVD) of silicon was investigated, focusing on the thickness uniformity of films deposited on silicon and glass substrates, and based on the previous suggestion that a major depositing flux in HWCVD should be negatively charged nanoparticles. The deposition was performed using a 20%-SiH₄-80%-H₂ gas mixture at a 450 °C substrate temperature under a working pressure of 66.7 Pa (0.5 Torr). Non-uniform depositions for three hot-wire temperatures, 1590 °C, 1670 °C, and 1800 °C, and on the silicon and glass substrates were compared. The non-uniformity was most pronounced at 1800 °C and more pronounced on the glass substrate. On the glass substrate, the deposition rate was highest at the corner and lowest at the center, which was attributed to the fastest charge removal, to a conducting stainless steel substrate holder, at the corner. Once the entire glass substrate was deposited with silicon, the growth rate tended to become uniform, possibly due to the high charge removal rate of silicon. The observed deposition behavior indicated that the major depositing flux is negatively charged.     

A ZnO nanowire vacuum pressure sensor

In this study, we report the growth and characterization of lateral ZnO nanowires (NWs) on ZnO:Ga/glass templates. Using x-ray diffraction and micro-Raman spectroscopy, it was found that crystal quality of the as-grown ZnO NWs is good. It was also found that the average length and average diameter of the laterally grown ZnO NWs were 5?μm and 30?nm, respectively. A vacuum pressure sensor was then fabricated using a single NW bridging across two electrodes. By measuring the current-voltage characteristics of the samples at low pressure, we found that the currents were of 17, 34.28, 57.37 and 96.06?nA for the ZnO NW measured at 1 × 10(-3)?Torr, 1 × 10(-4)?Torr, 3 × 10(-5)?Torr and 5 × 10(-6)?Torr, respectively. These values suggest that the laterally grown ZnO NWs prepared in this study are potentially useful for vacuum pressure sensing.     

Development of Palladium‐based Oxygen Scavenger: Optimization of Substrate and Palladium Layer Thickness

Oxygen scavenging films based on vacuum deposited palladium layers were developed to remove residual oxygen remaining in food packages after modified atmosphere packaging. Palladium (Pd) was coated on to a range of packaging films and in different thicknesses using magnetron sputtering technology. To improve the substrate surface, an additional silicon oxide (SiO_x) layer was also applied to the films before Pd deposition. To determine the oxygen scavenging activity, the scavenger films were placed into an airtight cell, which was flushed with a gas mixture containing 2 vol.% oxygen and 5 vol.% hydrogen. The results showed that the oxygen scavenging rate was strongly dependent on the coating substrate as well as on the Pd deposition thickness. Packaging films such as polyethylene terephthalate, aluminium oxide‐coated polyethylene terephthalate, oriented polypropylene and polylactic acid were found to be the most suitable substrates for Pd‐based oxygen scavengers. Moreover, it was demonstrated that the intermediate SiO_x layer between the substrate and the Pd layer led to a substantial increase in the oxygen scavenging activity rate (up to 33‐fold) for all applied packaging films. Additionally, it was shown that the optimal Pd layer thickness for the investigated oxygen scavenging films lies between 0.7 and 3.4 nm. The resulting scavenger films have the potential to scavenge residual headspace oxygen of sensitive foods within a matter of minutes leading to shelf life extension and overall quality improvements. Copyright © 2015 John Wiley & Sons, Ltd.