A monolithic field emitter array with a JFET

This paper proposes a novel structure of the conical Si field emitters monolithically incorporating a vertical-type junction field effect transistor (JFET) and demonstrates the emission control in field emission from the emitters. The proposal has many attractive advantages in the display application and reliable fabrication, because the structure needs neither additional area for the JFET nor additional process except ion implantation. The experimental results of the emitters show excellent controllability and stability in the emission current     

A high-resolution silicon monolithic nozzle array for inkjetprinting

This paper describes a high-resolution monolithic nozzle array for inkjet printing. The nozzles are fabricated using a bulk anisotropic etching technology to undercut a network of highly-boron-doped silicon support ribs, forming an array of microchannels which are then sealed using thermal oxidation and LPCVD dielectrics. Closely-spaced trapezoidal or triangular nozzles are realized after cutting the wafer perpendicular to the microtubes. With a 21-μm nozzle width and a 4-μm nozzle-to-nozzle separation, a resolution of 1016 dots per inch (d/in) can be achieved. Polysilicon heaters are integrated on top of each microchannel so that when activated, the underlying ink is vaporized and a drop of ink is expelled to impinge on the paper. The fabrication of this device requires only five masks and is compatible with the addition of on-chip circuitry for multiplexing the heater control signals. Heat transfer efficiency to the ink is enhanced by the high thermal conductivity of the silicon ribs in the channel ceiling, while the bulk silicon maintains high interchannel isolation. Current pulses 20 μs wide with a power density of 3.35×10⁸ W/m² have been used in initial printing tests, resulting in 20-μm diameter ink dots on a piece of paper which was set 2 mm away from the nozzle. The energy required to fire an ink drop is 11.5 μJ     

A monolithic voltage-comparator array for A/D converters

Describes a monolithic circuit consisting of an array of 8 voltage comparators, a resistive voltage divider, and associated logic circuits. Intended as an encoding component for high-speed parallel A/D converters, this `3-bit quantizer' uses regeneration for voltage gain and signal storage. A Gray-code output minimizes the problem of comparator indecision. The principal error sources are an asymmetry-induced comparator offset with 2-mV standard deviation and a thermally induced offset of a much as /spl plusmn/2.5 mV, dependent on signal history. The quantizer has been incorporated in an experimental 6-bit 200 megasample/s (MS/s) A/D converter.     

A monolithic mosaic of photon sensors for solid-state imaging applications

Monolithic silicon mosaics of photosensor elements have been developed for solid-state imaging applications. The physical structure, design considerations, and performance characteristics of these electrooptical devices as applied to image converter applications are discussed. The sensing monolith consists of a square 50 by 50 mosaic of phototransistor elements on 0.010 inch centers which are interconnected both by internally diffused strips and by vapor deposited surface bars. FiftyXand fiftyYexternal leads provide access to any individual elementX_{b}Y_{a}of the mosaic. Fabrication of this 2500 element mosaic involves the techniques of planar passivation, epitaxial growth, solid-state diffusion, and thin-film vacuum evaporation. A discussion of sensor operation includes mechanisms of phototransistor action, electrooptical conversion efficiency, and element-to-element crosstalk minimization. An evaluation of the electrooptical transfer characteristics of the mosaic sensor elements are presented. Uniformity of element response is typically better than 85% for response within a 3 : 1 range and 75% for response within a 2 : 1 range. Several shades of gray can be imaged simultaneously. The mosaic dynamic range extends over 3.5 orders of incident illumination energy or five orders of output photocurrent. The minimum and maximum detectable signals are approximately 10.0 nW and 1.0 roW, respectively. Sensitivity is of the order of 10²to 10³µA/mW in the linear portion of the transfer curve.     

A monolithic diode array millimeter-wave beam transmittancecontroller

Amplitude control of transmitted millimeter-wave beams by monolithic Schottky diode arrays is demonstrated. An array containing 4800 diodes has demonstrated control over the range of 20-50% beam transmittance at 99 GHz and 20-70% beam transmittance at 165 GHz. Modulation testing on a second array (8640 diodes) with similar transmission characteristics has shown array control to 50 MHz with negligible loss of output response. An extensive evaluation performed for the 8640-diode array shows good agreement between array impedance parameters determined from quasi-optical measurements, theoretical calculations, and low-frequency C-V measurements. The results have extended the range of quasi-optical functions demonstrated by solid-state power-combining arrays for application to millimeter-wave systems     

A monolithic 16-channels analog array normalizer

A monolithic circuit has been developed which accepts 16 parallel voltage inputs having values which may be as small as 15 mV or as large as 15 V, and generates 16 concurrent output voltages which are in the same ratios as the inputs with a peak amplitude controllable by the user. Response time is in the region of 1 /spl mu/s at full scale. The chip includes provisions for expansion to any number of channels. Operation is from supplies of /spl plusmn/3 to 15 V at a quiescent current of 125 /spl mu/A. Details of the design principles and peripheral circuitry are provided. Measurements of static accuracy and dynamic performance demonstrate that this approach may often simplify preprocessing of signal arrays in pattern-recognition applications.     

Cantilever RF-MEMS for monolithic integration with phased array antennas on a PCB

This article presents the development and operation of a novel electrostatic metal-to-metal contact cantilever radio-frequency microelectromechanical system (RF-MEMS) switch for monolithic integration with microstrip phased array antennas (PAAs) on a printed circuit board. The switch is fabricated using simple photolithography techniques on a Rogers 4003c substrate, with a footprint of 200 µm × 100 µm, based on a 1 µm-thick copper cantilever. An alternative wet-etching technique for effectively releasing the cantilever is described. Electrostatic and electromagnetic measurements show that the RF-MEMS presents an actuation voltage of 90 V for metal-to-metal contact, an isolation of ?8.7 dB, insertion loss of ?2.5 dB and a return loss of ?15 dB on a 50 Ω microstrip line at 12.5 GHz. For proof-of-concept, a beam-steering 2 × 2 microstrip PAA, based on two 1-bit phase shifters suitable for the monolithic integration of the RF-MEMS, has been designed and measured at 12.5 GHz. Measurements show that the beam-steering system presents effective radiation characteristics with scanning capabilities from broadside towards 29° in the H-plane.     

A monolithic active conical horn antenna array for millimeter and submillimeter wave applications

In this paper, a novel active integrated conical horn array is presented. Specifically, a 95 GHz quasioptically fed mixer integrated with an annular slot ring antenna was used as the basic element of the proposed active system. For efficient reception, a low cost micro-machined conical horn array was fabricated and placed on the top of active elements. A modified nonorthogonal finite-difference time-domain (FDTD) approach was applied for analyzing the basic conical horn antenna and a hybrid matrix manipulation technique for efficient antenna array modeling. The proposed active conical horn antenna array was fabricated and measured. Numerical simulations have verified the design at its distributed stages presenting very good agreement with the experimental data.     

Single-chip image sensors with a digital processor array

The architectures, implementation and applications of two smart sensors, LAPP and PASIC, are described. The basic idea of these two designs is to integrate an image sensor array with a digital processor array in a single chip. The integrated camera-and-processor eliminates the bottleneck of sequential image read-out that characterizes conventional systems. They provide fast, compact and economic solutions for tasks such as industrial inspection, optical character recognition and robot vision.     

基于遗传算法的水下阵列DOA估计研究

利用遗传算法研究水下阵列对目标的方位角估计问题,提出了一种新的方法证明遗传算法中的适应度函数对应于信号源的阵列流型取得极大值,采用该适应度函数的遗传算法(GA)计算量介于MUSIC算法和DML算法之间.通过计算机仿真验证,采用该适应度函数的遗传算法进行的DOA估计具有分辨相干目标的能力,角度分辨力高于MUSIC算法,估计偏差和均方误差在中低信噪比条件下小于MUSIC算法,与DML算法基本一致.     

Cross point array with bipolar monolithic integrated ON-attenuation compensated crosspoints

Deals with a novel crosspoint array with bipolar monolithic integrated ON-attenuation compensated crosspoints, i.e., bidirectional amplifying crosspoints for space-division PABXs. Properties of the crosspoints are described in detail. The array is realized with the aid of an I/SUP 2/L-crosspoint array for switching and control.     

均匀圆阵部分阵元失效情况下的DOA估计方法

在空间谱估计中,均匀圆阵(Uniform Circular Array--UCA)具有诸多优点,其得到广泛的应用.但在用MUSIC 算法测向时,一旦某一个或几个阵元通道失效,则通道数据变成无效数据,导致测向性能严重恶化,甚至完全失效.本文对在均匀圆阵部分通道失效的情况下,利用均匀圆阵其余阵元数据实现对信号来波方向进行有效估计的方法进行了分析和验证.其原理在于,直接将失效阵元进行隔离,利用剩余阵元形成的非均匀圆阵,进行MUSIC算法测向.该方法能在较高信噪比条件下实现和原阵列几乎相同的估计精度,在较低信噪比、信号数较小的条件下,也能取得良好的估计性能,大大增强了整个阵列谱估计的稳健性和鲁棒性.     

Simulations for thermal warpage and pressure nonlinearity of monolithic CMOS pressure sensors

The operation function of a piezoresistive pressure sensor utilizes a voltage output to detect the magnitude of pressure. The basic design concept for monolithic pressure sensors is to fabricate a standard submicron CMOS process with appropriate modifications to integrate on-chip signal conditioning circuits with anisotropic-etched piezoresistive sensing elements. In this study, thermal stress simulations with applied pressure loadings are used to estimate the electromechanical behavior of a new monolithic sensing element concept design. The major tasks are to predict the ripple deformation of a silicon diaphragm due to the thermal residual stresses from multiple passivation layers and estimate the pressure nonlinearities on the transducer. More detailed approaches with design and performance concerns are also discussed.     

A monolithic 1 × 10 array of silicon avalanche photodiodes

A monolithic 1 × 10 array of silicon avalanche photodiodes (Si-APD's) was fabricated. The deviations of breakdown voltages and current gains from mean values in an array were less than ±0.3 and ±2 percent, respectively. The optical interelemental coupling between the adjacent two elements in an array was estimated to be -57 dB.     

阵列式吸收光谱毒气痕量浓度检测仪研究

针对单组分毒气痕量浓度检测,采用透射式吸收光谱检测手段,改进了单纯基于Beer-Lambert定律的检测机理,以金属卟啉为气敏材料设计了阵列式毒气反应腔体,并将其与USB4000光谱仪配接,实现了毒气痕量浓度的检测;最后应用检测仪测得了单组分气态甲基磷酸二甲酯（DMMP）毒气模拟品的吸收光谱,对光谱数据进行了Savitzky-Golay卷积平滑法滤波和一阶导数法寻峰,并以最大吸收波长进行了仪器标定和DMMP痕量浓度预测实验,实验结果表明DMMP在0～1050ppm浓度区间预测效果满足要求,预测值和参考值线性相关。     

CCD图像传感器的微透镜阵列设计与实验研究

为了最大程度地改善CCD图像传感器的填充因子,进行了用于与CCD集成的微透镜阵列的光学优化设计,并与实验结果进行了对比。测试结果表明,所设计的透镜阵列使CCD的填充因子提高2.9倍,相对光谱响应增加了0.2。所设计的透镜对于改善CCD入射信号光的光强分布、提高光利用效率,从而提高CCD的光电性能有显著效果。     

基于三通道脉冲宽度调制的LED调光调色

为了实现发光二极管(LED)的精确调光,根 据重心原理,结合脉冲宽度调制(PWM),推导出混合光的色品坐标 与占空比的函数关系;采用红/绿/蓝、红/绿/冷白和暖白/绿/蓝3种LED光源模块进行 实验验证,并且 以光效、显色指数和最大光通量3个指标对混光效果进行评价。实验结果表明:建议的计算 模型能精确地指导LED的光 色调节,混合光的色品坐标的设定值和测量值之间的误差小于0.002,色温误差在50 K以内。 用光谱丰富的 冷白和暖白LED分别代替红/绿/蓝光源模块中的蓝光和红光,能提高混合光的显色指数,暖 白/绿/蓝光源模块的混光效果最佳。     

A digital array based bit serial processor for arbitrary window size kernel convolution in vision sensors

The high speed and in-pixel processing of image data in smart vision sensors is an important solution for real time machine vision tasks. Diverse architectures have been presented for array based kernel convolution processing, many of which use analog processing elements to save space. In this paper a digital array based bit serial architecture is presented to perform certain image filtering tasks in the digital domain and hence gain higher accuracies than the analog methods. The presented method benefits from more diverse convolution options such as arbitrary size kernel windows, compared with the digital pulse based approaches. The proposed digital cell structure is compact enough to fit inside an image sensor pixel. When incorporated in a vision chip, resolutions of up to 12 bit accuracy can be obtained in kernel convolution functions with 35×28 μm² layout area usage per pixel in a 90 nm technology. Still, higher accuracies can be obtained with larger pixels. The power consumption of the approach is approximately 10 nW/pixel at a frame rate of 1 kfps.     

Photoelectric characteristics of diodes in prototype photosensitive pixels for a monolithic array infrared photodetector

Test photodiodes in the form of mesa structures with different areas from 30 × 30 to 100 × 100 μm in size are fabricated based on a Cd _x Hg_{1 − x} Te/Si structure at x = 0.235, grown by molecular-beam epitaxy (MBE). The current-voltage characteristics of the diodes are measured in the dark and under background light conditions. The experimental results are compared with theoretical calculations. It is found that the dependence of the photodiode photocurrent and dark current on the mesa structure size appears in the mesa size ranges from 30 × 30 to 80 × 80 μm. The dark current decreases and the photocurrent increases with decreasing mesa size. The mechanisms affecting the behavior of current-voltage characteristics are discussed.     

A monolithic conditioner for thermocouple signals

The authors discusses a monolithic signal conditioner for direct thermocouple input which provides gain, common-mode signal rejection, and cold-junction compensation. It provides 50 to 1 ambient temperature rejection and a nominal 10 mV//spl deg/C output range. It operates on as little as 800 /spl mu/W, provides a thermocouple fault alarm and has provision for use as a set-point feedback controller as well as for signal measurements. The circuit is fabricated on a standard linear IC process and uses laser-wafer-trimmed thin-film resistors to achieve 1/spl deg/C temperature calibration.