Finite volume based CFD simulation of pressurized flip-chip underfill encapsulation process

This paper presents the simulation of pressurized underfill encapsulation process for high I/O flip chip package. 3D model of flip chip packages is built using GAMBIT and simulated using FLUENT software. Injection methods such as central point, one line, L-type and U-type are studied. Cross-viscosity model and volume of fluid (VOF) technique are applied for melt front tracking of the encapsulant. The melt front profiles and pressure field for all injection types are analyzed and presented. The pressure distribution within the flip-chip, fill volume versus filling time and viscosity versus shear rate are also plotted. The U-type injection is found to be faster in filling. The numerical results are compared with the previous experimental results and found in good conformity. The strength of CFD software in handling underfill encapsulation problems is proved to be excellent.     

Experimental study on the thermo-mechanical effects of underfill and low-CTE substrate in a flip-chip device

Moiré interferometry was used to analyze the thermal deformation of four flip-chip devices mounted on FR-4 substrate and a new multi-layer substrate, with and without underfill. Thermal loading was applied by cooling the devices from 100 °C to room temperature (25 °C). The effects of underfill and the low-CTE (coefficient of thermal expansion) substrate on thermal deformation were investigated. The experimental results showed that the underfill curved in a manner similar to the silicon chip. For the flip-chip devices mounted on the multi-layer substrate, the CTE mismatch between the silicon chip and substrate was reduced, and bending deformation decreased. Of the four flip-chip devices studied, the underfilled flip-chip device mounted on the multi-layer substrate had the least deformed solder balls.     

Experimental verification of models for underfill flow driven by capillary forces in flip-chip packaging

Underfill process is a very important step in the flip-chip packaging because of its great impact on the reliability of electronic devices. In the control of the underfill dispensing in flip-chip packaging, an analytical model for the underfill flow behavior is required to perform the control action. Traditionally, the Washburn model is used for predicting the viscous flow behavior in the flip-chip underfill process driven by capillary forces. Unfortunately, some studies in the literature have shown that the model does not match the measured results well due to the neglect of the characteristics such as solder bump resistance and non-Newtonian behavior of underfills. Although some underfill flow models have been developed for considering these characteristics, there is no sufficient account for such a mismatch from the literature. In this article, we present an experimental investigation aimed to understand the possible causes responsible for the observed mismatch with the Washburn model. The experimental investigation confirmed that the underfill fluid used in flip-chip packaging shows a complex non-Newtonian behavior and that the Washburn model is, indeed, only applicable to the Newtonian fluid in this setting. Another contribution of the work reported in this article is the provision of measured data on a test bed which was built upon using the off-the-shelf components; as such the data can be used by other researchers to validate their theoretical findings.     

Recent advances in modeling the underfill process in flip-chip packaging

Flip-chip underfill process is a very important step in the flip-chip packaging technology because of its great impact on the reliability of the electronic devices. In this technology, underfill is used to redistribute the thermo-mechanical stress generated from the mismatch of the coefficient of thermal expansion between silicon die and organic substrate for increasing the reliability of flip-chip packaging. In this article, the models which have been used to describe the properties of underfill flow driven by capillary action are discussed. The models included apply to Newtonian and non-Newtonian behavior with and without the solder bump resistance for the purpose of understanding the behavior of underfill flow in flip-chip packaging.     

Modeling of the curing kinetics of no-flow underfill in flip-chip applications

No-flow underfill has greatly improved the production efficiency of flip-chip process. Due to its unique characteristics, including reaction latency, curing under solder reflow conditions and the desire for no post-cure, there is a need for a fundamental understanding of the curing process of no-flow underfill. Starting with a promising no-flow underfill formulation, this paper seeks to develop a systematic methodology to study and model the curing behavior of this underfill. A differential scanning calorimeter (DSC) is used to characterize the heat flow during curing under isothermal and temperature ramp conditions. A modified autocatalytic model is developed with temperature-dependent parameters. The degree of cure (DOC) is calculated; compared with DSC experiments, the model gives a good prediction of DOC under different curing conditions. The temperature of the printed wiring board (PWB) during solder reflow is measured using thermocouples and the evolution of DOC of the no-flow underfill during the reflow process is calculated. A stress rheometer is used to study the gelation of the underfill at different heating rates. Results show that at high curing temperature, the underfill gels at a lower DOC. Based on the kinetic model and the gelation study, the solder wetting behavior during the eutectic SnPb and lead-free SnAgCu reflow processes is predicted and confirmed by the solder wetting tests.     

Development of no-flow underfill materials for lead-free solderbumped flip-chip applications

No-flow underfill process in flip-chip assembly has become a promising technology toward a smaller, faster and more cost-efficient packaging technology. The current available no-flow underfill materials are mainly designed for eutectic tin-lead solders. With the advance of lead-free interconnection due to the environmental concerns, a new no-flow underfill chemistry needs to be developed for lead-free solder bumped flip-chip applications. Many epoxy resin/hexahydro-4-methyl phthalic anhydride/metal acetylacetonate material systems have been screened in terms of their curing behavior. Some potential base formulations with curing peak temperatures higher than 200°C (based on differential scanning calorimetry at a heating rate of 5°C/min) are selected for further study. The proper fluxing agents are developed and the effects of fluxing agents on the curing behavior and cured material properties of the potential base formulations are studied using differential scanning calorimetry, thermomechanical analysis, dynamic-mechanical analysis, thermogravimetric analysis, and rheometer. Fluxing capability of the developed no-flow formulations is evaluated using the wetting test of lead-free solder balls on a copper board. The developed no-flow underfill formulations show sufficient fluxing capability and good potential for lead-free solder bumped flip-chip applications     

Void-effect modeling of flip-chip encapsulation on ceramicsubstrate

A detailed numerical and experimental study of the thermal-mechanical stress and strain in the solder bumps (C4s) of a flip-chip ceramic chip carrier has been completed. The numerical model used was based upon the finite element method. The model simulated accelerated thermal cycling (ATC) from 0°C to 100°C. Several parametric studies were conducted, including the effects of chip size, micro-encapsulation, and the effect of the presence of voids in the micro-encapsulant. It was notably found that the presence of voids in the encapsulant does not significantly increase the stress/strain in the C4s, with the exception of very large voids and voids at or near the edge of the chip     

In process stress analysis of flip-chip assemblies during underfill cure

Low cost flip chip on board assemblies are analyzed during the underfill cure process to determine residual stress generation. In situ stress measurements are performed over the active face of the die during processing and relative in-plane stresses are measured. Experimental measurements are made using flip-chip test vehicles, based on the Sandia National Laboratories’ ATC04 assembly test chip. Four different commercial underfill materials have been evaluated and a relative comparison is presented with respect to the residual stresses produced by each underfill on the flip-chip assemblies. Significant stress variations are observed between the four underfills studied. Correlation between the glass transition temperature (T_g) and storage modulus (G^′) are made relative to residual stresses produced during underfill cure. Stress relaxation characteristics are also evaluated for the low cost flip-chip assemblies.     

Enhancement of underfill capillary flow in flip-chip packaging by means of the inertia effect

This paper describes how the use of inertia forces induced by the rotation of a working disk may be adopted to increase the fill rate of the flip-chip packaging process and thereby reduce the process cycle time. It is shown how the driving forces resulting from the inertia effect are determined by the Weber number. The constant and varying contact angle models are compared under a specified set of process conditions. The calculated flow behavior results indicate that the relationship between the contact angle, the average fluid velocity, the liquid-air interface position, and the filling time depends upon the Weber number. The constant and varying contact angle models are utilized in the analysis of a new processing method referred to as rotation-enhanced underfill packaging (REUP). The inertia effect induced by the angular motion of the working disk is shown to enhance the flow of the underfill encapsulant and to reduce the time of the underfill process. The present results confirm that the rotation of the working disk leads to an increased underfill capillary flow rate, which is beneficial in reducing the production cycle time of the flip-chip packaging process.     

Effects of underfill materials on the reliability of low-K flip-chip packaging

The reliability of low-K flip-chip packaging has become a critical issue owing to the low strength and poor adhesion qualities of the low-K dielectric material when compared with that of SiO₂ or fluorinated silicate glass (FSG). The underfill must protect the solder bumps and the low-K chip from cracking and delamination. However, the material properties of underfill are contrary to those required for preventing solder bumps and low-K chip from cracking and delamination. This study describes the systematic methodologies for how to specify the adequate underfill materials for low-K flip-chip packaging. The structure of the test vehicle is seven copper layers with a low-K dielectric constant value of 2.7-2.9, produced by the chemical vapor deposition (CVD) process. Initially, the adhesion and the flow test of the underfill were evaluated, and then the low-K chip and the bumps stress were determined using the finite element method. The preliminary screened underfill candidates were acquired by means of the underfill adhesion and flow test, and balancing the low-K chip and the bumps stress simulation results. Next, the low-K chips were assembled with these preliminary screened underfills. All the flip-chip packaging specimens underwent the reliability test in order to evaluate the material properties of the underfill affecting the flip-chip packaging stress. In addition, the failed samples are subjected to failure analysis to verify the failure mechanism. The results of this study indicate that, of the underfill materials investigated, those with a glass transition temperature (T_g) and a Young’s modulus of approximately 70–80 °C and 8–10 GPa, respectively, are optimum for low-K flip-chip packaging with eutectic solder bumps.     

An improvement of thermal conductivity of underfill materials for flip-chip packages

Effective heat dissipation is crucial to enhance the performance and reliability of electronic devices. In this work, the performance of encapsulants filled with carbon fiber was studied and compared with silica filled encapsulants. Encapsulants filled with mixed combination of fillers for optimizing key properties were also investigated. The thermal and electrical conductivities were investigated and glass transition temperature (Tg), thermal expansion coefficient (TCE), and storage modulus (E') of these materials were studied with thermal analysis methods. The composites filled with both carbon fiber and silica showed an increase of thermal conductivity three to five times of that of silica filled encapsulants of the same filler loading while maintaining/enhancing major mechanical and thermal properties.     

Recent advances in flip-chip underfill: materials, process, and reliability

In order to enhance the reliability of a flip-chip on organic board package, underfill is usually used to redistribute the thermomechanical stress created by the coefficient of thermal expansion (CTE) mismatch between the silicon chip and organic substrate. However, the conventional underfill relies on the capillary flow of the underfill resin and has many disadvantages. In order to overcome these disadvantages, many variations have been invented to improve the flip-chip underfill process. This paper reviews the recent advances in the material design, process development, and reliability issues of flip-chip underfill, especially in no-flow underfill, molded underfill, and wafer-level underfill. The relationship between the materials, process, and reliability in these packages is discussed.     

Mechanical fatigue test method for chip/underfill delamination in flip-chip packages

Underfill resin between Si chips and printed circuit boards is useful for improving the reliability of flip-chip packages. Generally, thermal cycle tests (TCTs) are applied to electronic packages under development in order to prove their reliability. At the early stage of development, however, a more effective test method is desirable, because TCTs are time-consuming. A new mechanical fatigue test for the underfill resin in flip-chip packages, namely the four points support test method, is proposed in this paper. The validity of the mechanical test method could be verified from the results of stress analyses and experiments. Considering the chip/underfill delamination statistically based on the assumption of Markov process, it was shown that the delamination probability during cyclic loads could be estimated with equations of the displacement range and number of cycles.     

Effect of thermocapillary action in the underfill encapsulation of multi-stack ball grid array

Recent trend in electronic industries are demanding smaller chip packaging process along with increase in performance and reliability of the package. The introduction of Multi-stack Ball Grid Array (BGA) to enhance the performance of the conventional BGA flip chip has frequently encountered several hitches such as extended filling time and incomplete filling at the upper layer of the multi-stacks BGA. It has been found that the encapsulant lacks energy to flow at the upper layer due to lower hydrostatics pressure. In this paper, a straightforward solution by incorporating additional thermal energy in the encapsulant to increases its flow ability is introduced. This additional thermal energy at the upper layer produces a distinct temperature difference between the upper and lower layers, or simply thermal delta. This research attempts to demonstrate the effectiveness of thermal delta in solving the aforementioned flow problem during encapsulation process of multi-stacks BGA, by means of experiment and numerical simulation. The findings have shown that the experimental data compares well with the simulation results. It was also found that the implementation of thermal delta substantially reduces the filling time across the multi-stack packages. This study reveals the potential of thermocapillary-driven underfill encapsulation being widely adopted in future industrial encapsulation of multi-stacks BGA packaging.     

FEM modeling of temperature distribution of a flip-chip no-flow underfill package during solder reflow process

Flip chip on organic substrate has relied on underfill to redistribute the thermomechanical stress and to enhance the solder joint reliability. However, the conventional flip-chip underfill process involves multiple process steps and has become the bottleneck of the flip-chip process. The no-flow underfill is invented to simplify the flip-chip underfill process and to reduce the packaging cost. The no-flow underfill process requires the underfill to possess high curing latency to avoid gelation before solder reflow so to ensure the solder interconnect. Therefore, the temperature distribution of a no-flow flip-chip package during the solder reflow process is important for high assembly yield. This paper uses the finite-element method (FEM) to model the temperature distribution of a flip-chip no-flow underfill package during the solder reflow process. The kinetics of underfill curing is established using an autocatalytic reaction model obtained by DSC studies. Two approaches are developed in order to incorporate the curing kinetics of the underfill into the FEM model using iteration and a loop program. The temperature distribution across the package and across the underfill layer is studied. The effect of the presence of the underfill fillet and the influence of the chip dimension on the temperature difference in the underfill layer is discussed. The influence of the underfill curing kinetics on the modeling results is also evaluated.     

Thermal management of AlGaN-GaN HFETs on sapphire using flip-chip bonding with epoxy underfill

Self-heating imposes the major limitation on the output power of GaN-based HFETs on sapphire or SiC. SiC substrates allow for a simple device thermal management scheme; however, they are about a factor 20-100 higher in cost than sapphire. Sapphire substrates of diameters exceeding 4 in are easily available but the heat removal through the substrate is inefficient due to its low thermal conductivity. The authors demonstrate that the thermal impedance of GaN based HFETs over sapphire substrates can be significantly reduced by implementing flip-chip bonding with thermal conductive epoxy underfill. They also show that in sapphire-based flip-chip mounted devices the heat spread from the active region under the gate along the GaN buffer and the substrate is the key contributor to the overall thermal impedance.     

Improved underfill adhesion in flip-chip packages by means of ultraviolet light/ozone treatment

The interfacial adhesion between the epoxy-based soldermask and underfill resin is successfully improved by means of ultraviolet light/ozone (UV/O/sub 3/) treatment. There is an optimized treatment condition that can impart the highest interfacial bond quality. The underlying mechanisms are evaluated based on several techniques, including X-ray photoelectron spectroscopy (XPS), contact angle measurement and nanoindentation of the UV/O/sub 3/ treated soldermask surface. Functionally similar changes in chemical element, wettability, and elastic modulus are identified of the substrate with respect to treatment time, which are also correlated to the improvement of interfacial bond strength. In particular, there is a linear relationship between the weighted dipole moment (obtained from the XPS analysis) and the surface polarity (calculated from the contact angle measurements) of the treated surface, confirming that the same conclusion can be drawn from the two different techniques. The UV/O/sub 3/ treatment is proven to be efficient in retaining the interfacial bond quality even after hygrothermal ageing.     

Chemothermal modeling and finite-element analysis for microwave cure process of underfill in flip-chip packaging

The reaction kinetics of microwave cure process of underfill materials in flip-chip packaging was investigated with nonisothermal kinetic method and compared with that of the thermal cure. Three-dimensional (3-D) nonlinear cure kinetic and transient heat transfer coupled model was solved by finite-element method (FEM) to simulate the microwave cure process. The accuracy of the program was verified using a simple heat conduction case by commercial FEM software. Temperature and conversion inside underfill during microwave cure process were evaluated by solving the nonlinear anisotropic heat conduction equation including internal heat generation produced by exothermic chemical reactions. Numerical results show that the iteration calculations are very sensitive to small changes in time step sizes. It was also found that variable frequency microwave can process underfill materials with uniform conversion under different curing temperatures.     

Effect of underfill filler settling on thermo-mechanical fatigue analysis of flip-chip eutectic solders

Underfills containing filler particles exhibit filler settling during the (capillary-based) wicking and curing processes, thus causing the reliability estimation to deviate from that of the presumed base of no filler settling. This paper examines the thermo-mechanical responses of the solder joints in flip-chip packaging to various conditions of filler settling. We built five y-dependent profiles for describing the uniform, bilayered, and gradual settling of filler spheres in the through-depth direction of the underfill and used the Mori-Tanaka method to calculate the effective material properties of the filler-resin underfill compound by considering a linearly elastic, temperature-dependent resin with a glass transition temperature range of 70-130 °C. For each settling profile we analyzed the fatigue indicators, referred to as the inelastic shear strain ranges and the inelastic shear strain energy densities of the solder joints, and compared their magnitudes against the extent of filler settling. The results show that the fatigue indicators depend on the extent of filler settling. A greater extent of bilayered filler settling produced larger (in magnitude) fatigue indicators. The fatigue indicators associated with gradual filler settling, however, were almost always smaller, on average, than those associated with no filler settling, indicating that some types of filler settling might favor a longer solder fatigue life. This preliminary but intriguing finding may be partially explained by considering the asymmetric thermal mismatch in the through-depth direction of the underfill; a comparatively good thermal match near the bottom side of the solder joints may compensate for the thermal mismatch at the top side, thus contributing to an overall better thermal match in the solder joint.