Multilevel monolithic inductors in silicon technology

Multilevel monolithic inductors implemented in standard BiCMOS technology are presented. Use of top metal layers shunted with vias provides Q values approaching 10 at 2.4 GHz and above 6 at 900 MHz for a 2 nH inductor. There is no modification to the conventional wiring metallurgy and no need for extra processing steps     

RF inductors with suspended and copper coated thick crystalline silicon spirals for monolithic MEMS LC circuits

This letter presents a novel radio frequency (RF) inductor in a monolithic inductor-capacitor circuit developed by using micro-electromechanical systems (MEMS) fabrication technology. The inductor consists of 40-/spl mu/m-thick single crystalline silicon spiral with copper surface coating as the conductor, which is suspended on a glass substrate. The fabricated inductor exhibits a self-resonance frequency higher than 15GHz, with the quality factor more than 35 and inductance over 5nH at 11.3GHz. Simulations based on a compact equivalent circuit model with parameters extracted using a characteristic-function approach have also been carried out for the inductor, and good agreement with measurements is obtained.     

Fabrication and performance of novel RF spiral inductors on silicon

This paper presents and discusses the fabrication and the performance of RF circular spiral inductors on silicon. The substrate materials underneath the inductor coil are removed by wet etching process. In the fabrication process, fine polishing of the photoresist is used to simplify the processes and ensure the seed layer and the pillars contact perfectly, and dry etching technique is used to remove the seed layer. The results show that Q-factor of the novel inductor is greatly improved by removing the silicon underneath the inductor coil. The spiral inductor for line width of 50 μm has a peak Q-factor of 17 at frequency of 1 GHz. The inductance is about 3.2 nH in the frequency range of 0.05-3 GHz and the resonance frequency of the inductors is about 6 GHz. If the strip is widened to 80 μm, the peak Q-factor of the inductor reduces to about 10 and the inductance is 1.5 nH in the same frequency range.     

RF circuit design aspects of spiral inductors on silicon

The design and optimization of spiral inductors on silicon substrates, the related layout issues in integrated circuits, and the effect of the inductor-Q an the performance of radio-frequency (RF) building blocks are discussed. Integrated spiral inductors with inductances of 0.5-100 nH and Q's up to 40 are shown to be feasible in very-large-scale-integration silicon technology. Circuit design aspects, such as a minimum inductor area, the cross talk between inductors, and the effect of a substrate contact on the inductor characteristics are addressed. Important RF building blocks, such as a bandpass filter, low-noise amplifier, and voltage-controlled oscillator are shown to benefit substantially from an improved inductor-Q     

On the design of RF spiral inductors on silicon

This review of design principles for implementation of a spiral inductor in a silicon integrated circuit fabrication process summarizes prior art in this field. In addition, a fast and physics-based inductor model is exploited to put the results contributed by many different groups in various technologies and achieved over the past eight years into perspective. Inductors are compared not only by their maximum quality factors (Q/sub max/), but also by taking the frequency at Q/sub max/, the inductance value (L), the self-resonance frequency (f/sub SR/), and the coil area into account. It is further explained that the spiral coil structure on a lossy silicon substrate can operate in three different modes, depending at first order on the silicon doping concentration. Ranging from high to low substrate resistivity, inductor-mode, resonator-mode, and eddy-current regimes are defined by characteristic changes of Q/sub max/, L, and f/sub SR/. The advantages and disadvantages of patterned or blanket resistive ground shields between the inductor coil and substrate and the effect of a substrate contact on the inductor are also addressed in this paper. Exploring optimum inductor designs under various constraints leverages the speed of the model. Finally, in view of the continuously increasing operating frequencies in advancing to new generations of RF systems, the range of feasible inductance values for given quality factors are predicted on the basis of optimum technological features.     

Temperature dependence of multiplication noise in silicon avalanche photodiodes

The temperature dependence of multiplication noise in silicon avalanche photodiodes with a low-high-low impurity density profile is calculated. The variation of multiplication noise by temperature change can be neglected in practical use at a constant multiplication factor, which is in agreement with experimental results.     

CMOS-compatible surface-micromachined suspended-spiral inductors for multi-GHz silicon RF ICs

Fully CMOS-compatible, highly suspended spiral inductors have been designed and fabricated on standard silicon substrates (1/spl sim/30 /spl Omega//spl middot/cm in resistivity) by surface micromachining technology (no substrate etch involved). The RF characteristics of the fabricated inductors have been measured and their equivalent circuit parameters have been extracted using a conventional lumped-element model. We have achieved a high peak Q-factor of 70 at 6 GHz with inductance of 1.38 nH (at 1 GHz) and a self-resonant frequency of over 20 GHz. To the best of our knowledge, this is the highest Q-factor ever reported on standard silicon substrates. This work has demonstrated that the proposed microelectromechanical systems (MEMS) inductors can be a viable technology option to meet the today's strong demands on high-Q on-chip inductors for multi-GHz silicon RF ICs.     

Purification of inductors and improvement of phase noise in monolithic differential LC-VCOs

A novel idea for the improvement of phase noise in differential LC-VCOs with no degradation of power consumption is proposed. Being based on purification of inductors to enhance the quality factor (Q), the application of the idea in design of CMOS based Giga Hertz (GHz) range low power and low phase noise monolithic differential LC-VCOs is illustrated and analyzed. Post-layout simulations using CMOS 0.18 μm TSMC RF design kit are used for evaluation.     

RF inductors and capacitors integrated on silicon chip by CMOS compatible Cu interconnect technology

High-Q inductors and high-density capacitors have been designed and fabricated with a post-process of additional metal layers on the top of interconnect layers. The fabrication was carried out with advanced Cu interconnect technology, which was compatible with nowadays CMOS backend of line. The Q_max of inductors with inductance from 0.4 to 11 nH was over 11 on low-resistivity silicon substrates. Two kinds of structures of on-chip capacitors, MIM and MIMIM, have been studied. A capacitance of 1.75 fF/μm² has been achieved with MIMIM structure using Si₃N₄ as dielectric.     

Impact of Al composition on RF noise figure of AlGaAs/GaAsheterojunction bipolar transistors

The influence of Al content on the RF noise characteristics of Al _xGa_1-xAs/GaAs heterojunction bipolar transistors (HBT's) is presented. It is shown that the minimum noise figure (F_min) at 2 GHz is reduced by increasing the Al mole fraction (x). This observed improvement in noise figure is directly correlated to the differences in dc current gain. The lowest measured F_min(2 GHz) of HBT's with emitter dimensions 2×(3.5×30) μm², were 1.3, 1.61, and 2.1 dB for x=0.35, 0.30, and 0.25 devices, respectively at I_c=3 mA. The measured results were found to agree well with calculated values over a wide range of collector currents     

Large suspended inductors on silicon and their use in a 2-μmCMOS RF amplifier

Large spiral inductors encased in oxide over silicon are shown to operate beyond the UHF band when the capacitance and loss resistance are greatly reduced by selective removal of the underlying substrate. Using a 100-nH inductor whose self-resonance lies at 3 GHz, a balanced tuned amplifier with a gain of 14 dB centered at 770 MHz has been implemented in a standard digital 2-μm CMOS IC process. The core amplifier noise figure is 6 dB, and the power dissipation is 7 mW for a 3-V supply     

The modeling, characterization, and design of monolithic inductorsfor silicon RF IC's

The results of a comprehensive investigation into the characteristics and optimization of inductors fabricated with the top-level metal of a submicron silicon VLSI process are presented. A computer program which extracts a physics-based model of microstrip components that is suitable for circuit (SPICE) simulation has been used to evaluate the effect of variations in metallization, layout geometry, and substrate parameters upon monolithic inductor performance. Three-dimensional (3-D) numerical simulations and experimental measurements of inductors were also used to benchmark the model accuracy. It is shown in this work that low inductor Q is primarily due to the restrictions imposed by the thin interconnect metallization available in most very large scale integration (VLSI) technologies, and that computer optimization of the inductor layout can be used to achieve a 50% improvement in component Q-factor over unoptimized designs     

High-performance inductors integrated on porous silicon

To study the substrate effect on inductor performance, several types of spiral inductors were fabricated on porous silicon (PS), p/sup -/ and p/sup +/ silicon substrate. /spl pi/-network analysis results show that the use of PS effectively reduces the shunt conductance and capacitance. The analysis further shows that the use of PS significantly reduces the eddy current portion of series resistance of inductor, leading to slower increase of the apparent series resistance with increasing frequency. Higher Q-factor and resonant frequency (f/sub r/) result from the reduced shunt conductance, shunt capacitance, and frequency dependence of series resistance. Inductors fabricated on PS regions are subjected to a much less stringent set of constraints than those on bulk Si substrate, allowing for much higher inductance to be achieved without severe sacrifice in Q-factor and f/sub r/. Similarly, much higher Q-factor can be obtained for reasonable inductance and f/sub r/.     

Wavelength dependence of noise figure in InGaAs/InGaAsPmultiple-quantum-well laser amplifier

Theoretical and experimental results are presented for the wavelength dependence of the noise figure and the single-pass gain in multiquantum well amplifiers. The theoretical model accounts for both conduction band/heavy hole band and conduction band/light-hole band transitions. The calculations are in good agreement with the experimental results, which indicate that the noise figure has some dependence on the wavelength. A minimum traveling-wave amplifier (TWA) noise figure of 3.9 dB has been measured at 1550 nm for a single-pass of 22 dB     

Self-assembling MEMS variable and fixed RF inductors

Inductors play a key role in wireless front-end circuitry, yet are not generally well suited for conventional RF integrated-circuit (RFIC) fabrication processes. We have developed inductors that can be fabricated on a conventional RFIC silicon substrate, which use warping members to assemble themselves away from the substrate to improve quality factor (Q) and self-resonance frequency (SRF), and to provide a degree of variation in inductance value. These self-assembling variable inductors are realized through foundry provided microelectromechanical systems (MEMS) processing and have demonstrated temperature stable Q values greater than 13, SRF values well above 15 GHz, and inductance variations greater than 18%. Simulations suggest the potential for Q values above 20 and inductance variations greater than 30%, with optimized processing     

Physical modeling of spiral inductors on silicon

This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance     

Wavelength dependence of noise figure of a travelling-waveGaInAsP/InP laser amplifier

Heterodyne noise measurements on a travelling-wave semiconductor laser amplifier show that the excess noise factor decreases with increasing wavelength. When the signal wavelength is changed from 1.48 μm to 1.55 μm the noise figure decreases from 10.5 dB to 6.0 dB     

Quarter-micrometer low-noise pseudomorphic GaAs HEMTs withextremely low dependence of the noise figure on drain-sourcecurrent

Quarter-micrometer pseudomorphic (PM) AlGaAs-InGaAs-GaAs HEMTs with an In mole fraction of 21% have been successfully developed, fabricated, and characterized. The devices are realized in a commercial technology by using a multiple-gate-finger layout with air bridges for the interconnection of the source pads and a Si₃N₄ passivation. PM HEMTs with a gate width of 6×20 μm exhibit state-of-the-art noise figures of 0.65 and 0.82 dB with an associated gain of 14.5 and 11.5 dB at 12 and 18 GHz, respectively. The noise figure shows the lowest dependence on the drain-source current yet reported with ΔF_max<0.12 dB for a wide biasing range from 25% I_dss up to 150% I _dss at 12 GHz when I_dss=170-250 mA/mm     

A comparative study on the various monolithic low noise amplifiercircuit topologies for RF and microwave applications

This paper critically compares the various monolithic low noise amplifier (LNA) circuit topologies using BiCMOS or MESFET technologies for RF and microwave applications, in addition to the conventional techniques, five newly proposed schemes for the simultaneous noise and input power matching are extensively compared with each other at microwave frequencies. At L-band, the best scheme is found to be the proposed cascode inductive series feedback (CCSF) or common-source inductive series feedback (CSSL)+common-gate inductive parallel feedback (CGPF) when 0.5 μm GaAs MESFET is used, while it is cascode resistive parallel feedback (CCPF) when n-p-n BJT is used. At C- and X-bands, the proposed CGPF exhibits the best performance. Other than CGPF, the CSSL+CGPF seems to he the best at 6 GHz, and both CCPF+CGPF and CSSL+CGPF are recommended at 12 GHz. Finally, to verify the feasibility of this approach, a CCPF has been fabricated with 0.5 μm GaAs MMIC technology, of which measured results agree well with the simulated ones     

RF operation of MOSFETs under integrated inductors

This paper presents an in-depth analysis of the operation of a CMOS single-chip three-dimensional inductor over a MOSFET structure at RF frequencies. Active circuitry is placed underneath the integrated inductors in order to take advantage of the vacant space. Measurements indicate that the operation of the MOSFET and of the inductor is affected in a predictable manner. The paper theoretically investigates the interaction between the two elements,analyzes the origin of all appearing effects and compares the theory with the experimental data from a typical CMOS process. Moreover, this study proposes possible applications and design guides and confirms the attractiveness of the inductor over MOSFET placement.