Thermal Ta2O5––alternative to SiO2 for storage capacitor application

Tantalum pentoxide thin layers (10–100 nm) obtained by thermal oxidation of rf sputtered Ta films on Si have been investigated with respect of their dielectric, structural and electric properties. It is established that stoichiometric Ta₂O₅ detected at the surface of the layers is reduced to tantalum suboxides in their depth. The oxide parameters are discussed in terms of a presence of an unavoidable ultrathin SiO₂ between Si and Ta₂O₅ and bond defects in both the oxide and the interface transition region. Conditions which guarantee obtaining high quality tantalum oxide with a dielectric constant of 32–35 and a leakage current less than 10⁻⁷–10⁻⁸ A/cm² at 1.5 V (SiO₂ equivalent thickness of 2.5–3 nm) are established. These specifications make the layers obtained suitable alternative to SiO₂ for high density DRAMs application.     

Breakdown fields and conduction mechanisms in thin Ta2O5 layers on Si for high density DRAMs

The conduction mechanisms and the microstructure of rf sputtered Ta₂O₅ on Si, before and after oxygen annealing at high temperatures (873, 1123 K; 30 min) have been investigated. The as-deposited and annealed at 873 K layers are amorphous whereas crystalline Ta₂O₅ (orthorhombic β-Ta₂O₅ phase) was obtained after O₂ treatment at 1123 K. The results (electrical, X-ray diffraction, transmission electron microscopy) reveal the formation of an interfacial ultrathin SiO₂ layer under all technological regimes used. The higher (493 K) substrate temperature during deposition stimulates the formation of amorphous rather than crystalline SiO₂. It is found that the oxygen heating significantly reduces the oxide charge (Q_f<10¹⁰ cm⁻²) and improves the breakdown characteristics (the effect is more pronounced for the higher annealing temperature). It is accompanied by an increase of the effective dielectric constant (up to 37 after 1123 K treatment). It is established that the influence of the oxygen treatment on the leakage current is different depending on the film thickness, namely: a beneficial effect for the thinner and a deterioration of leakage characteristics for thicker (80 nm) films. A leakage current density as low as 10⁻⁷ A/cm² at 1 MV/cm applied field for 26 nm annealed layers has been obtained. The current reduction is considered to be due to a removal by annealing of certain structural nonperfections present in the initial layers. Generally, the results are discussed in terms of simultaneous action of two opposite and competing processes taking place at high temperatures––a real annealing of defects and an appearance of a crystal phase and/or a neutral traps generation. The contribution of the neutral traps also is involved to explain the observed weaker charge trapping in the as-fabricated films compared to the annealed ones.The conduction mechanism of the as-deposited films is found to be of Poole–Frenkel (PF) type for a wide range of applied fields. A change of the conduction mechanism for the annealed films at medium fields (0.8–1.3 MV/cm) is established. This transition from PF process to the Schottky emission limited current is explained with an annealing of bulk traps (oxygen vacancies and nonperfect bonds). It is concluded that the dominant conduction mechanism in the intermediate fields can be effectively controlled by appropriate technological steps.     

Electrical properties of thin RF sputtered Ta2O5 films after constant current stress

Stress-induced leakage currents (SILCs) in thin Ta₂O₅ films after short- and long-term constant current stress (CCS) at both gate polarities at different levels of injected current were investigated. The behavior of the SILCs and the change of quasistatic C–V characteristics after the degradation confirmed the variations of gate voltage with time during CCS necessary to maintain the injected current density through the oxide.The conduction mechanisms were also investigated. Initially, normal Poole–Frenkel (PF) mechanism dominates in the oxide at medium fields (0.4– 1.7 MV/cm) independently of the deposition temperature or annealing steps. After the degradation modified PF with different compensation factors appears. After long-term degradation conduction mechanism goes back to PF.     

Comparison between the properties of amorphous and crystalline Ta2O5 thin films deposited on Si

In this study, the structural and electrical properties of amorphous and crystalline Ta₂O₅ thin films deposited on p-type Si by low pressure metalorganic chemical vapour deposition from a Ta(OC₂H₅)₅ source have been investigated. The as-deposited layers are amorphous, whereas crystalline Ta₂O₅ (hexagonal phase) was obtained after post-deposition O₂-annealing at 800°C. Physico-chemical analysis of our layers shows that the O₂-treatment leads to the growth of a thin (1 nm) interfacial SiO₂ layer between Ta₂O₅ and Si but, contrary to other studies, was not sufficient to reduce the level of carbon and hydrogen contaminants. Crystalline Ta₂O₅ shows better leakage current properties than amorphous Ta₂O₅. The conduction mechanism in amorphous Ta₂O₅ is clearly attributed to the Poole–Frenkel effect with a barrier height separating the traps from the conduction band of 0.8 eV. For crystalline Ta₂O₅, the situation remains unclear since no simple law can be invoked due to the presence of the SiO₂ interlayer: a double conduction process based on a tunnelling effect in SiO₂ followed by a trap-modulated mechanism in Ta₂O₅ may be invoked. From capacitance–voltage measurements, the permittivity was found to be 25 for amorphous samples, but values ranging from 56 to 59 were found for crystalline layers, suggesting a high anisotropic character.     

Investigation of Ta2O5/SiO2/4H-SiC MIS capacitors

Tantalum pentoxide (Ta₂O₅) deposited by pulsed DC magnetron sputtering technique as the gate dielectric for 4H-SiC based metal-insulator-semiconductor (MIS) structure has been investigated. A rectifying current-voltage characteristic was observed, with the injection of current occurred when a positive DC bias was applied to the gate electrode with respect to the n type 4H-SiC substrate. This undesirable behavior is attributed to the relatively small band gap of Ta₂O₅ of around 4.3 eV, resulting in a small band offset between the 4H-SiC and Ta₂O₅. To overcome this problem, a thin thermal silicon oxide layer was introduced between Ta₂O₅ and 4H-SiC. This has substantially reduced the leakage current through the MIS structure. Further improvement was obtained by annealing the Ta₂O₅ at 900 °C in oxygen. The annealing has also reduced the effective charge in the dielectric film, as deduced from high frequency C-V measurements of the Ta₂O₅/SiO₂/4H-SiC capacitors.     

Carrier mobility in inversion layers of Si–thin Ta2O5 structures

The behaviour of carrier mobility in the inversion channel of gateless p-MOSFETs with thin (7-50 nm) Ta₂O₅ layers, having a dielectric constant of (23-27) and prepared by rf sputtering of Ta in an Ar-O₂ mixture, has been investigated. It is shown that independently of the high dielectric constant of the layers, the transport properties in the channel are strongly affected by defects in Ta₂O₅/Si system in the form of oxide charge and interface states. These defects act as scattering centers and are responsible for the observed minority carrier mobility degradation. Both, the oxide and the interface state charges are virtually independent on the oxygen content (in the range 10-30%) during the sputtering process. A reduction of the oxide charge and the density of interface states with increasing Ta₂O₅ film thickness was found, which results in the observed increase of the inversion channel mobility with thickness. It is assumed that the bond defects (broken or strained Ta-bonds as well as weak Si-O bonds in the transition region between Ta₂O₅ and Si) are much more probable sources of defect centers rather than Ta and O vacancies or impurities.     

Thin RF sputtered and thermal Ta2O5 on Si for high density DRAM application

Tantalum pentoxide thin films on Si prepared by two conventional for modern microelectronics methods (RF sputtering of Ta in Ar + O₂ mixture and thermal oxidation of tantalum layer on Si) have been investigated with respect to their dielectric, structural and electric properties. It has been found that the formation of ultra thin SiO₂ film at the interface with Si, during fabrication implementing the methods used, is unavoidable as both, X-ray photoelectron spectroscopy and electrical measurements, have indicated. The initial films (as-deposited and as-grown) are not perfect and contain suboxides of tantalum and silicon which act as electrical active centers in the form of oxide charges and interface states. Conditions which guarantee obtaining high quality tantalum oxide with dielectric constant of 32–37 and leakage current density less than 10⁻⁷ A/cm² at 1.5 V applied voltage (Ta₂O₅ thickness equivalent to about 3.5 nm of SiO₂) have been established. These specifications make the layers obtained suitable alternative to SiO₂ for high density DRAM application.     

Conduction mechanisms in Ta2O5 stack in response to rapid thermal annealing

The influence of the rapid thermal annealing (RTA) in vacuum at 1000 °C on the leakage current characteristics and conduction mechanisms in thermal Ta₂O₅ (7-40 nm) on Si has been studied. It was established that the effect of RTA depends on both the initial parameters of the films (defined by the oxidation temperature and film thickness) and annealing time (15-60 s). The RTA tends to change the distribution and the density of the traps in stack, and this reflects on the dielectric and leakage properties. The thinner the film and the poorer the oxidation, the more susceptible the layer to heating. The short (15 s) annealing is effective in improving the leakage characteristics of poorly oxidized samples. The RTA effect, however, is rather deleterious than beneficial, for the thinner layers with good oxygen stoichiometry. RTA modifies the conduction mechanism of Ta₂O₅ films only in the high-field region. The annealing time has strong impact on the appearance of a certain type of reactions upon annealing resulting to variation of the ratio between donors and traps into Ta₂O₅, causing different degree of compensation, and consequently to domination of one of the two mechanisms at high fields (Schottky emission or Poole-Frenkel effect). Trends associated with simultaneous action of annealing and generation of traps during RTA processing, and respectively the domination of one of them, are discussed.     

Dependence of electrical properties on interfacial layer of Ta2O5 films

The change in the thickness and chemical states of the interfacial layer and the related electrical properties in Ta₂O₅ films with different annealing temperatures were investigated. The high-resolution transmission electron microscopy and X-ray photoelectron spectroscopy analyses revealed that the 700 °C-annealed Ta₂O₅ film remained to be amorphous and had the thinnest interfacial layer which was caused by Ta-silicate decomposition to Ta₂O₅ and SiO₂. In addition, the electrical properties were improved after annealing treatments. Our results suggest that an annealing treatment at 700 °C results in the highest capacitance and the lowest leakage current in Ta₂O₅ films due to the thinnest interfacial layer and non-crystallization.     

Evidence that N2O is a stronger oxidizing agent than O2 for both Ta2O5 and bare Si below 1000 °C and temperature for minimum low-K interfacial oxide for high-K dielectric on Si

N₂O is known to be the stronger oxidizing agent than O₂ for the post-deposition annealing of Ta₂O₅·N₂O should also be stronger than O₂ for Si oxidation. However, NO released from N₂O is also a nitridation agent which can produce silicon oxynitride at a temperature above 1000 °C and silicon oxynitride can be a diffusion barrier for oxygen. Below 1000 °C, SiO sublimation can make the comparison of N₂O oxidation and O₂ oxidation of Si difficult. Below 750 °C, N₂O is obviously the faster oxidizing agent than O₂ for bare Si. Furthermore, our results show that minimum interfacial SiO_x, which has a low dielectric constant, occurs at about 800 °C or 950 °C for high-K metallic oxide gate insulator for future generations of CMOS because rapid thermal oxidation at these two temperatures can help to reduce leakage current or charge trapping by suppressing oxygen vacancies without too much low-K interfacial SiO_x formation.     

Effects of the metal gate on the stress-induced traps in Ta2O5/SiO2 stacks

The degradation of Ta₂O₅-based (10 nm) stacked capacitors with different top electrodes, (Al, W, Au) under constant current stress has been investigated. The variation of electrical characteristics after the stress is addressed to gate-induced defects rather than to poor-oxidation related defects. The main wearout parameter in Ta₂O₅ stacks is bulk-related and a generation only of bulk traps giving rise to oxide charge is observed. The post-stress current–voltage curves reveal that stress-induced leakage current (SILC) mode occurs in all capacitors and the characteristics of pre-existing traps define the stress response. The results are discussed in terms of simultaneous action of two competing processes: negative charge trapping in pre-existing electron traps and stress-induced positive charge generation, and the domination of one of them in dependence on both the stress level and the gate used. The charge build-up and the trapping/detrapping processes modify the dominant conduction mechanism and the gate-induced defects are precursors for device degradation. It is concluded that the impact of the metal gate on the ultimate reliability of high-k stacked capacitors should be strongly considered.     

High-k HfO2-Ta2O5 mixed layers: Electrical characteristics and mechanisms of conductivity

Electrical properties of mixed HfO₂-Ta₂O₅ films (10;15 nm) deposited by rf sputtering on Si have been studied from the view point of their applications as high-k layers, by standard capacitance-voltage and temperature dependent current-voltage characteristics. The effect of HfO₂ addition to the Ta₂O₅ is thickness dependent and the thicker layers exhibit advantages over the pure Ta₂O₅ (higher dielectric constant, enhanced charge storage density and improved interface quality). The process of HfO₂ and Ta₂O₅ mixing introduces negative oxide charge, tends to creates shallow bulk traps and modifies the dominant conduction mechanisms in the stack capacitors as compared to the Ta₂O₅-based one (a contribution of tunneling processes through traps located below the conduction band of mixed layers to the leakage current in the HfO₂-Ta₂O₅ stacks is observed). The traps involved in both Poole-Frenkel and tunneling processes are identified.     

Challenges of Ta2O5 as high-k dielectric for nanoscale DRAMs

The present status, successes, challenges and future of Ta₂O₅, and mixed Ta₂O₅-based high-k layers as active component in storage capacitors of nanoscale DRAMs are discussed. The engineering of new Ta₂O₅-based dielectrics (doped Ta₂O₅ and multicomponent Ta₂O₅-based high-k dielectrics) as well as of metal/high-k interface in MIM capacitor configuration are identified as critical factors for further reduction of EOT value below 1 nm.     

Examination and evaluation of La2O3 as gate dielectric for sub-100 nm CMOS and DRAM technology

High-k gate dielectric La₂O₃ thin films have been deposited on Si(1 0 0) substrates by molecular beam epitaxy (MBE). Al/La₂O₃/Si metal-oxide–semiconductor capacitor structures were fabricated and measured. A leakage current of 3 × 10⁻⁹ A/cm² and dielectric constant between 20 and 25 has been measured for samples having an equivalent oxide thickness (EOT) 2.2 nm. The estimated interface state density D_it is around 1 × 10¹¹ eV⁻¹ cm⁻². EOT and flat-band voltage were calculated using the NCSU CVC program. The chemical composition of the La₂O₃ films was measured using X-ray photoelectron spectrometry and Rutherford backscattering. Current density vs. voltage curves show that the La₂O₃ films have a leakage current several orders of magnitude lower than SiO₂ at the same EOT. Thin La₂O₃ layers survive anneals of up to 900 °C for 30 s with no degradation in electrical properties.     

Influence of oxidation temperature on the microstructure and electrical properties of Ta2O5 on Si

The effect of the oxidation temperature (673-873 K) on the microstructural and electrical properties of thermal Ta₂O₅ thin films on Si has been studied. Auger electron spectroscopy and X-ray photoelectron spectroscopy results revealed that the films are non-stoichiometric in the depth; an interfacial transition layer between tantalum oxide and Si substrate, containing presumably SiO₂ was detected. It has been found by X-ray diffraction that the amorphous state of Ta₂O₅ depends on both the oxidation temperature and the thickness of the films—the combination of high oxidation temperature (>823 K) and thickness smaller than 50 nm is critical for the appearance of a crystal phase. The Ta₂O₅ layers crystallize to the monoclinic phase and the temperature of the phase transition is between 773 and 823 K for the thinner layers (<50 nm) and very close to 873 K for the thicker ones. The electrical characterization (current/voltage; capacitance/voltage) reveals that the optimal oxidation temperature for achieving the highest dielectric constant (∼32) and the lowest leakage current (10⁻⁸ A/cm² at 1 MV/cm applied field) is 873 K. The results imply that the poor oxidation related defects are rather the dominant factor in the leakage current than the crystallization effects.     

The characterization of retention properties of metal–ferroelectric (PbZr0.53Ti0.47O3)–insulator (Dy2O3, Y2O3)–semiconductor devices

Metal–ferroelectric–insulator–semiconductor (MFIS) capacitors and field effect transistors with the structures of Al/Pb (Zr_0.53, Ti_0.47) O₃ (PZT)/Dy₂O₃/Si and Al/PZT/Y₂O₃/Si were fabricated. The memory windows of Al/PZT/Dy₂O₃/Si and Al/PZT/Y₂O₃/Si capacitors with sweep voltage of 10 V are 1.03 V and 1.48 V, respectively. The effect of band offset on the memory window was discussed. The retention times of Al/PZT/Y₂O₃/Si and Al/PZT/Dy₂O₃/Si MFISFETs are 11.5 days and 11.1 h, respectively. The longer retention time of Al/PZT/Y₂O₃/Si field effect transistors is attributed to the larger conduction band offset at the Y₂O₃/Si interface (2.3 eV) compared to that of Dy₂O₃/Si (0.79 eV).     

Admittance spectroscopy of traps at the interfaces of (1 0 0)Si with Al2O3, ZrO2, and HfO2

Admittance (ac) measurements were carried out to determine the interface trap density (D_it) as a function of energy E in the Si bandgap at interfaces of Si with different insulating oxides (Al₂O₃, ZrO₂, HfO₂). The results are compared to those of the conventional thermal SiO₂/Si interface. The results show that a significant portion of the interface trap density in the as-deposited and de-hydrogenated samples is related to the amphoteric Si dangling bond defects (P_b0 -centers). The D_it is much enhanced for the Al-containing insulators as compared to Si/SiO₂ but can be reduced by annealing in O₂. As to annealing in H₂, efficient passivation of P_b0 centers by hydrogen is achieved for Si/ZrO₂ and Si/HfO₂ interfaces, yet it fails for Si/Al-containing oxide entities. Among the insulators studied, the results suggest HfO₂ to be the best choice of an alternative insulator.     

Effects of annealing conditions on the properties of tantalum oxide films on silicon substrates

The formation of a SiO₂ layer at the Ta₂O₅/Si interface is observed by annealing in dry O₂ or N₂ and the thickness of this layer increases with an increase in annealing temperature. Leakage current of thin (less than 40 nm thick) Ta₂O₅ films decreases as the annealing temperature increases when annealed in dry O₂ or N₂. The dielectric constant vs annealing temperature curve shows a maximum peak at 750 or 800° C resulting from the crystallization of Ta₂O₅. The effect is larger in thicker Ta₂O₅ films. But the dielectric constant decreases when annealed at higher temperature due to the formation and growth of a SiO₂ layer at the interface. The flat band voltage and gate voltage instability as a function of annealing temperature can be explained in terms of the growth of interfacial SiO₂. The electrical properties of Ta₂O₅ as a function of annealing conditions do not depend on the fabrication method of Ta₂O₅ but strongly depend on the thickness of Ta₂O₅ layer.     

Thermally stimulated current in SiO2

Thermally stimulated current (TSC) techniques provide information about oxide-trap charge densities and energy distributions in MOS (metal-oxide-semiconductor) capacitors exposed to ionizing radiation or high-field stress that is difficult or impossible to obtain via standard capacitance–voltage or current–voltage techniques. The precision and reproducibility of measurements through repeated irradiation/TSC cycles on a single capacitor is demonstrated with a radiation-hardened oxide, and small sample-to-sample variations are observed. A small increase in E′_δ center density may occur in some non-radiation-hardened oxides during repeated irradiation/TSC measurement cycles. The importance of choosing an appropriate bias to obtain accurate measurements of trapped charge densities and energy distributions is emphasized. A 10 nm deposited oxide with no subsequent annealing above 400°C shows a different trapped-hole energy distribution than thermally grown oxides, but a similar distribution to thermal oxides is found for deposited oxides annealed at higher temperatures. Charge neutralization during switched-bias irradiation is found to occur both because of hole-electron annihilation and increased electron trapping in the near-interfacial SiO₂. Limitations in applying TSC to oxides thinner than 5 nm are discussed.     

Electrical instability of sintered Ta films on (vacuum evaporated) polysilicon structures

High purity tantalum metal was deposited on finely polished single crystal, polycrystalline silicon substrates and on the thermally grown oxide layers as a combination of Si/SiO₂/poly-Si/Ta, under oil-free ultra-high vacuum conditions, of the order of 6.0 × 10⁻⁹ Torr, at a deposition rate of 2.0 Å s⁻¹, using an e-beam evaporator. The measured resistivity of the as-deposited tantalum films show relatively high resistivity values to that of the bulk. Thermal annealing of these poly-Si/Ta, under argon (with 10% H₂) ambient, shows the increase in the resistivity values at relatively low temperatures, and it was observed that the film's electrical conductivity ceases in the temperature range of 500–600°C. The oxidation properties of tantalum and the possible formation of TaSi₂ and Ta₂O₅ were analysed for from a reliability point of view.