GaAs MESFET平面型变容管高频特性分析

本文分析了用于GaAs MMIC调频器件MESFET平面型变容管的微波特性,讨论了器件几何结构与直流参数、S参数之间的关系.重点研究了器件串联电阻对微波特性的影响,给出了变容管变电容比与器件几何尺寸.     

采用负阻电路的大调频范围GaAs MMIC压控带通有源滤波器

采用负阻电路以及我们自行构造的模型设计的集成化平面肖特基变容管，用GaAsMMIC技术实现了L波段大调频范围压控带通滤波器该滤波器具有200MHk的3dB带宽，调频范围1．64GHz～1．0GHz、计约600MHz并具有足够的带外抑制比．全部偏置电路均在片上，芯片共占面积1．6×1．8mm2．     

基于平面肖特基二极管的太赫兹频段倍频器的研究

基于研究肖特基变容二极管的半导体层结构分析与建模,通过研究太赫兹平面肖特基势全二极管半导体材料的 物理层结构,分析二极管结构的电磁效应及其频率响应特性。研究D 频段变容二极管高效率倍频器技术,在太赫兹频段 倍频器的性能对整个接收机的性能有着至关重要的影响。要实现高频率,高功率,宽频带,高效率,低噪声太赫兹倍频 技术是太赫兹技术领域的核心研究方向之一。研究基肖特基二极管倍频器的关键技术,分析了国内外现状及发展动态。     

一种指数掺杂的砷化镓平面肖特基变容二极管的设计与制作

利用标准微电子工艺研制出了一种可以应用于微波倍频电路中的肖特基势垒变容二极管,采用平面结构的制作工艺,克服了传统制作工艺的不易集成的缺点.并且在N型层的掺杂浓度呈指数规律,使变容管的变容比高于传统的均匀掺杂结构,有利于提高倍频电路的工作频率和输出功率.采用台面隔离工艺以形成分别用于制作肖特基接触和欧姆接触的两个台面.经...     

GaAs MESRET平面型变容管高频特性分析

本文分析用于ＧａＡｓ ＭＭＩＣ调频器件ＭＥＳＦＥＴ平面型变容管的微波特性,讨论了器件几何结构与直流参数,Ｓ参数之间的关系,重点研究了器件串联电阻对微波特性的影响,给出了变容管变电容比与器件几何尺寸。     

常γ砷化镓电调变容二极管设计与实验研究

电调变容管的C—V特性取决于外延层掺杂浓度分布。为了获得常γC—V特性,外延层掺杂浓度分布应为幂函数。本文假设了一种与实际常γ外延材料掺杂浓度分布比较接近的浓度分布函数,导出了C—V计算公式,并给出器件设计方法。采用平面扩散管芯结构,制得了γ=1和1.25的GaAs电调变容二极管,在2～18GHz宽带线性压控振荡器中获得了满意的使用结果。     

GaAs MMUC或平面Schottky Diode的C—V特性解析模型

本文提出了一种采用ＧａＡｓ ＭＥＳＦＥＴ工艺制造的平面微波变容管Ｃ－Ｖ特性解析模型，该模型着跟于小尺寸、平面化工艺及离子注入工艺，充分考虑了由其产生的栅下沟道串联电阻及侧电容对平面Ｓｃｈｏｔｔｋｙ ｄｉｏｄｅＣ－Ｖ特性的影响，这些影响对平面变容管影响较显著而在已有的模型中是被忽略或示作详细讨论的，文中还给出了该模型的算例及与实验结果，已有的几种典型模型算例的比较。结果表明，本文模型中参数易确定，与     

GaAs MMIC中平面Schottky Diode的C－V特性解析模型

本文提出一种采用ＧａＡｓＭＥＳＦＥＴ工艺制造的平面微波变容管Ｃ－Ｖ特性解析模型，该模型着眼于小尺寸、平面化工艺及离子注入工艺，充分考虑了由其产生的栅下沟道串联电阻及侧电容对平面ＳｃｈａｔｔｋｙｄｉｏｄｅＣ－Ｖ特性的影响，这些影响对平面变容管影响较显著而在已有的模型中是被忽略或未作详细讨论的．文中还给出了该模型的算例及与实验结果，已有的几种典型模型算例的比较．结果表明，本文模型中参数易确定，与实验亦附合得很好．     

用弹道电子发射显微术研究超薄金属硅化物/硅肖特基接触

采用弹道电子发射显微术 ( BEEM)技术对超薄 Pt Si/Si、Co Si2 /Si肖特基接触特性进行了研究 ,并与电流 -电压 ( I- V)及电容 -电压 ( C- V)测试结果进行了对比 .研究了 Ar离子轰击对超薄Pt Si/n- Si肖特基接触特性的影响 .BEEM、I- V/C- V技术对多种样品的研究结果表明 ,I- V/C- V测试会由于超薄硅化物层串联电阻的影响而使测试结果产生严重误差 ;BEEM测试则不受影响 .随着离子轰击能量增大 ,肖特基势垒高度降低 ,且其不均匀性也越大 .用 BEEM和变温 I- V对超薄 Co Si2 /n- Si肖特基二极管的研究结果表明 ,变温 I- V测试可在一定程度上获得肖特基势垒     

平面扩散砷化镓变容管

本文根据一个旋转体模型,分析了平面型变容管的P-N结电容参数和串联电阻,得出了一些近似计算公式.成功地制成了砷化镓平面参放变容管和微波电调变容管,前者零偏压截止频率达到了400—600GHz,后者达到了120GHz,电容调谐比T_R≈4.在实际应用中,它们分别在常温参放中获得了50K的噪声温度和在三公分集成固体源调谐中得到了700MHz的电调带宽。     

Physical equivalent circuit model for planar Schottky varactordiode

A physical equivalent circuit model for the planar GaAs Schottky varactor diode is presented. The model takes into account the distributed resistance and capacitance of the active layer, the sidewall capacitance, and the parasitic resistances and accurately accounts for the high series resistance observed near the pinch-off voltage. The dependence of the maximum series resistance on varactor size, frequency, and doping profile has been theoretically investigated, and the results agree well with experimental data. The proposed model can be easily used for optimization of planar Schottky varactor diodes with regard to broadband monolithic VCO constraints     

应用于三维IC的积累型NMOS变容二极管

基于TSV技术,提出了一种应用于三维集成电路的积累型NMOS变容二极管。通过与传统积累型NMOS变容二极管对比,证明了基于TSV的积累型NMOS变容二极管具有电容密度大、集成度高的优点。分析了TSV高度、TSV直径、源区和漏区结深、源区和漏区宽度对所提出变容二极管性能的影响。结果表明,通过增加TSV高度或增大TSV直径都可以提高电容密度;通过减小源、漏区的结深可以提升电压灵敏度;通过增大源、漏区的宽度可以提高空穴对沟道中产生的电子抑制能力。在上述比较中加入了解析模型。最后给出了该变容二极管的工艺流程。     

A millimeter wave large-signal model of GaAs planar Schottky varactor diodes

A millimeter wave large-signal model of GaAs planar Schottky varactor diodes based on a physical analysis is presented.The model consists of nonlinear resistances and capacitances of the junction region and external parasitic parameters.By analyzing the characteristics of the diode under reverse and forward bias,an extraction procedure of all of the parameters is addressed.To validate the newly proposed model,the PSVDs were fabricated based on a planar process and were measured using an automatic network analyzer.Measurement shows that the model exactly represents the behavior of GaAs PSVDs under a wide bias condition from -10 to 0.6 V and for frequencies up to 40 GHz.     

Accurate Determination of Varactor Resistance at UHF and Its Relation to Parametric Amplifier Noise Temperature

A thorough investigation is made on the frequency-dependent properties of a varactor diode loss resistance at UHF. The variation of the losses with frequency in a varactor diode mounted cavity has been theoretically investigated, and it is shown that the previously reported inverse-squared frequency dependence of the varactor loss resistance can be attributed to the distributed cavity losses transformed across the varactor diode. A new measurement technique is introduced in which the circuit losses are first matched to the input line instead of the varactor loss resistance as an application of the relative impedance method. Measurements carried out with this technique for five different varactor diodes showed that the loss resistances of these diodes are not frequency dependent. It is also shown that the choice of the varactor diode capacitance plays an important role on the parametric amplifier noise temperature at UHF. In an experimental parametric amplifier the effect of varactor diode capacitance on the noise temperature has been demonstrated. It has been theoretically and experimentally shown that, generally, varactor diodes having higher capacitances result in better noise temperature at UHF.     

变容二极管调谐体效应振荡器的CAD

本文建立了一种新的 Gunn VCO 的电路模型,计算了 Gunn 管和变容二极管之间的径向盘耦合电容。首次利用谐波平衡法对 Gunn VCO 进行了非线性分析,设计并制作了一 Ka 波段混合集成 Gunn VCO,实验结果与 CAD 结果进行了比较,证明了该种电路模型与分析方法的有效性。此外利用该分析程序研究了Gunn 管和变容二极管之间的耦合与调谐带宽的关系。在分析的基础上,利用线性拟合误差函数作为 Gunn VCO 频率调谐线性度的优化目标函数,对 VCO 的频率调谐特性进行了优化,确定了此种电路在最佳线性调谐时 PN 结幂指数γ的值,从而在理论上对满足线性调谐的变容二极管提出了要求。     

Ion implanted GaAs varactor diodes: capacitance uniformity

Gallium arsenide varactor diodes with low series resistance (~0.25 ?) for u.h.f. t.v. tuners are developed. Uniformity and reproducibility of diode capacitance is improved markedly by using improved ion implantation and l.p.e. techniques. The standard deviation of diode capacitance distribution is 0.74% at V = 3.0 V within a wafer. A good r.f. tracking characteristic can be obtained in varactor tuners.     

p+?n hyperabrupt GaAs varactors grown by molecular-beam epitaxy

Gallium-arsenide p?n junction hyperabrupt varactor diodes have been grown by molecular-beam epitaxy. Near the junction the donor profile at depth x tracked x?1.2. A capacitance ratio C0/C12 of 10 is observed for bias voltages of 0 and 12 V.     

一种新型的砷化镓平面肖特基变容管大信号模型

A millimeter wave large-signal model of GaAs planar Schottky varactor diodes based on a physical analysis is presented.The model consists of nonlinear resistances and capacitances of the junction region and external parasitic parameters.By analyzing the characteristics of the diode under reverse and forward bias,an extraction procedure of all of the parameters is addressed.To validate the newly proposed model,the PSVDs were fabricated based on a planar process and were measured using an automatic network...     

Development of large-area 200-volt planar voltage-variable capacitance diodes

A research and development program resulted in fabrication of high-capacitance voltage-variable capacitance diodes for electronic tuning. Devices were fabricated by epitaxial and planar technology, with the diode prepared by diffusion into n-type silicon to approximate an abrupt junction. Objective specifications required devices with capacitance of 250 pF and 1000 pF (-8V), breakdown voltageV_{(BR)} > 200V, capacitance change ratio of > 5.6 (-4 to -200 V), and quality factorQ > 200(10 MHz). The principal problem was theV_{(BR)}limitation of planar diodes, which results in part from the tendency of thermally oxidized n-type Si to form an accumulation layer in the Si at the Si-SiO2interface. The planar process was refined to achieve large-area 200-V planar diodes, while maintaining the other essential diode characteristics, by the introduction of modifications to lower the electrical field of the p-n junction at the surface. Both structural modifications and processing changes were found to result in an increase in the level ofV_{(BR)}of planar diodes.     

On Estimating and Canceling Parasitic Capacitance in Submillimeter-Wave Planar Schottky Diodes

The equivalent circuit model of a submillimeter planar diode is investigated. In particular, the parasitic finger to pad capacitance that shunts the diode junction severely degrades the performance of frequency multiplier. Therefore, precise estimation of its value is crucial to circuit design in the submillimeter wave range. In this letter, a parallel diode structure is analyzed, and symmetry is utilized to remove parasitic elements external to the finger loop. This analytical approach is verified through measurement on a 200 GHz planar diode circuit. To increase the diode junction capacitance modulation ratio, one possible solution is also suggested.