A digital long pulse integrator for EAST Tokamak

A digital integrator has been developed to be compatible with the long pulse plasma discharges on the Experimental Advanced Superconductor Tokamak (EAST), in which the induced signal is modulated by a chopper, and a field programmable gate array (FPGA) in the 16-bit digitizer is used to realize the digital integration in real time. After rectification and integration, the drift is almost linear and stable in controlled temperature, so a period of 50 s is used to determine the linear drift rate for drift compensation. The integration data can be directly transferred to the reflective memory (RFM) card, which is installed in the same PCI eXtensions for Instrumentation (PXI) chassis, so the data transmission can be also done in real time. The test results show that the real time data transmission rate is up to 10 kHz, the integration drift is typically less than 0.4 uVs/s and drift performance is a little worse in real long pulse discharge, which can be reduced further by using more precise data acquisition.     

脉冲调制器稳定性监控中的数据采集与处理

设计采用反馈控制的方法改善脉冲调制器输出高压脉冲幅度稳定性,分析了实现稳定性目标对数据采集系统软、硬件的要求,介绍了相关的实验测试和信号处理方法。数据采集系统由Stratix ii FPGA开发板、AD6645、上位PC机组成,借用差分放大器提高测量分辨率。数据处理采用脉冲采样样本均值作为表征幅度的特征量,并采用平均、插值、数字滤波、BP神经网络等方法来提高幅度监测值的分辨率能力和抗干扰能力。     

Design of FPGA based high-speed data acquisition and real-time data processing system on J-TEXT tokamak

Tokamak experiment requires high-speed data acquisition and processing systems. In traditional data acquisition system, the sampling rate, channel numbers and processing speed are limited by bus throughput and CPU speed. This paper presents a data acquisition and processing system based on FPGA. The data can be processed in real-time before it is passed to the CPU. It provides processing ability for more channels with higher sampling rates than the traditional data acquisition system while ensuring deterministic real-time performance. A working prototype is developed for the newly built polarimeter–interferometer diagnostic system on the Joint Texas Experimental Tokamak (J-TEXT). It provides 16 channels with 120 MHz maximum sampling rate and 16 bit resolution. The onboard FPGA is able to calculate the plasma electron density and Faraday rotation angel. A RAID 5 storage device is adopted providing 700 MB/s read–write speed to buffer the data to the hard disk continuously for better performance.     

基于FPGA+DSP的核信号数字时间谱仪设计

针对核电子学中核脉冲信号的高速实时数字化处理,设计了基于FPGA+DSP的两通道核信号数字时间谱仪。该实验平台基于数字恒比定时(dCFD)原理,采用高速运放和ADC进行模拟信号成型采样,数字信号送入FPGA完成波形判选、数据缓冲、FIR滤波和基线恢复,利用DSP实时信号重构和函数定时,通过USB2.0接口与上位机通信。该系统的主要特点是具有模数电路的高度集成、数字信号的实时运算,接近模拟定时的精度。     

High-speed,multi-input,multi-output control using GPU processing in the HBT-EP tokamak

We report on the design of a new plasma control system for the HBT-EP tokamak that utilizes a graphical processing unit (GPU) to magnetically control the 3D perturbed equilibrium state [1] of the plasma. The control system achieves cycle times of 5 μs and I/O latencies below 10 μs for up to 96 inputs and 64 outputs. The number of state variables is in the same order. To handle the resulting computational complexity under the given time constraints, the control algorithms are designed for massively parallel processing. The necessary hardware resources are provided by an NVIDIA Tesla M2050 GPU, offering a total of 448 computing cores running at 1.3 GHz each. A new control architecture allows control input from magnetic diagnostics to be pushed directly into GPU memory by a D-TACQ ACQ196 digitizer, and control output to be pulled directly from GPU memory by two D-TACQ AO32 analog output modules. By using peer-to-peer PCI express connections, this technique completely eliminates the use of host RAM and central processing unit (CPU) from the control cycle, permitting single-digit microsecond latencies on a standard Linux host system without any real-time extensions.     

基于导频的储存环束流位置测量处理器研制

稳定的束流轨道对于同步辐射光源的性能至关重要,规划中的合肥先进光源是第四代衍射极限储存环,其亚微米级的束流轨道稳定度需要束流位置测量精度达到100 nm级别。本文基于国产化芯片,研制了带有导频补偿机制的束流位置测量处理器,主要包括导频模块、模拟前端模块、数字处理模块和嵌入式工控模块。输入信号经过导频模块和模拟前端模块调理,在数字处理模块通过带通欠采样原理实现模数转换,数字信号在现场可编程门阵列（FPGA）内经过下变频、滤波抽取、坐标旋转数字计算（CORDIC）模块以及差比和算法等处理后获得束流位置信息,嵌入式工控模块实时传输束流位置信号,与加速器控制系统通信。目前设计的束流位置处理器完成了实验室离线测试和束流测试,测试结果表明,当输入信号幅度在-55～5 dBm范围时,束流位置测量处理器的快获取数据（FA data）和慢获取数据（SA data）分辨率分别好于120 nm和70 nm,满足设计要求。     

基于软核的数字化多道脉冲幅度分析器

介绍了一种数字化多道脉冲幅度分析器(DMCA),该系统采用数字梯形滤波成形等数字信号处理方法进行核脉冲信号处理,采用NOISII软核处理器进行数据处理,所有数字功能均在单片FPGA中实现。测试表明,该系统转换增益可达4 096道,最大脉冲通过率可达200 kcps以上。     

EPICS interface to Libera electron beam position monitor

SSRF diagnostics system will adopt a new generation digital electron beam position processor,Libera,as the signal condition,signal processing and data acquisition device for beam position monitor.In order to provide a uniform data and control interface for users,we developed an EPICS interface based on Control System Programming Interface(CSPI)layer,allowing the performance of the electron beam to be monitored through EPICS channels.In this interface a new record type for BPM was defined and its associated support routines were implemented.     

Erratum to “Thomson scattering upgrade on Tore Supra” [Fusion Eng. Des. 85 (2010) 335–339]

The Thomson scattering diagnostic supplies the electron temperature and density of Tore Supra plasmas from the spectrum analysis of scattered light of a very short laser pulse. A new spectrometer has been realized to improve the signal to noise ratio. In order to obtain an efficient noise reduction, a real time calculation is necessary. The current analogue integration of the signal is inadequate. A fast digitalization must be used with a sampling rate of 1 GSamples by second, a bandwidth of 150 MHz and a 12 bit dynamic range. In a first step, fast analogue data acquisition boards for 4 channels were added in 2009 to the VME acquisition system in place. A MATACQ (Matrix for acquisition) board was chosen for sampling analogue data up to 2 GSamples/s over 4 channels with a large bandwidth of 300 MHz and a 14 bit dynamic range. This solution offers a low cost acquisition system that is not available in any other commercial board with this dynamic range. The first results will be obtained on calibration period with a light emitted diode before the summer 2009. This article will present the new data acquisition system and the coming first results.     

A compact data acquisition system for TOHR multidetectors: time encoding for both time and energy measurements

TOHR is a high-resolution nuclear tomography system dedicated to imaging small live animals. We describe a fast PC-based data acquisition system used to acquire, assess, and store TOHR data. The system can handle high event rates (200 K quadruple-coincidence events/s) from the 15 TOHR photodetectors. High-level system control is provided by a Labview program running on a PC, while a fast, flexible data acquisition protocol is micromanaged by a digital signal processor (DSP) board housed in a PC. Essential hardware components, including detector-mounted charge-to-time converters, a data-routing multiplexer (FPGA based), and fast time-to-digital converters (225-ps resolution), are described in detail. This data acquisition system could be used in physics experiments.     

Design of neutral beam injection system for KSTAR tokamak

The neutral beam injection (NBI-1) system has been designed for providing a 300 s deuterium beam of 120 kV/65 A as an auxiliary heating and current drive system of the KSTAR (Korea Superconducting Tokamak Advanced Research) tokamak. The deuterium beam is produced from a long pulse ion source composed of a bucket-type plasma generator and a multi-aperture tetrode accelerator with the help of discharge power supplies and high voltage (HV) power supplies. The beamline components (BLCs) include a neutralizer with an optical multi-channel analyzer (OMA) section, a bending magnet (BM), an ion dump assembly, a movable calorimeter, beam scrapers, and a cryo-sorption pump system in a rectangular vacuum tank. A beam duct equipped with bellows and a voltage break is placed between the NBI vacuum tank and the KSTAR vacuum vessel. All data and parameters of the NBI system are controlled by a control and data acquisition (CODAQ) system through the EPICS based Ethernet interface.     

A DSP-based multichannel analyzer for simultaneous acquisition of coincidence and anticoincidence spectra

A digital signal processor (DSP) based multichannel analyzer (MCA) has been developed for simultaneous acquisition of coincidence and anticoincidence γ-ray spectra. The shaped pulse from the spectroscopy amplifier is digitized by a flash analog-to-digital converter and then processed by a DSP. The coincidence mode operation is implemented by an external gate signal from a coincidence module. Fundamental performance was tested using NaI(Tl) detectors and compared with that of a standard NIM module. The new MCA is currently used for in vivo neutron activation analysis. Further development is in preparation toward full digital processing, which is free from the remaining analog component, that is the spectroscopy amplifier.     

Digital pulse processor for ion beam microprobe imaging

Capabilities of spectroscopic ion beam analysis (IBA) techniques that are available in ion microprobe facilities can be greatly improved by the use of digital pulse processing. We report here development of a digital multi parameter data acquisition system suitable for IBA imaging applications. Input signals from charge sensitive preamplifier are conditioned by using a simple circuit and digitized with fast ADCs. The digitally converted signals are processed in real time using FPGA. Implementation of several components of the system is presented.     

Architecture of SPIDER control and data acquisition system

The ITER Heating Neutral Beam injectors will be implemented in three steps: development of the ion source prototype, development of the full injector prototype, and, finally, construction of up to three ITER injectors. The first two steps will be carried out in the ITER neutral beam test facility under construction in Italy. The ion source prototype, referred to as SPIDER, which is currently in the development phase, is a complex experiment involving more than 20 plant units and operating with beam-on pulses lasting up to 1 h. As for control and data acquisition it requires fast and slow control (cycle time around 0.1 ms and 10 ms, respectively), synchronization (10 ns resolution), and data acquisition for about 1000 channels (analogue and images) with sampling frequencies up to tens of MS/s, data throughput up to 200 MB/s, and data storage volume of up to tens of TB/year. The paper describes the architecture of the SPIDER control and data acquisition system, discussing the SPIDER requirements and the ITER CODAC interfaces and specifications for plant system instrumentation and control.     

Development and testing of a flash analog-to-digital converterbased system for pulse shape discrimination of nuclear radiation pulses

A digital signal processor (DSP) based system is under development for analyzing and processing pulses produced by radiation detectors. The system is designed to replace conventional pulse-type, analog-to-digital converters. It is capable of capturing the complete radiation induced pulse in digital form. Subsequently, all the pulse features can be analyzed digitally (e.g., pulse validation, energy information, dynamic threshold determination, pulse duration, pulse shape analysis, and noise reduction). A prototype system has been built and performance parameters have been evaluated     

Test bed for real-time image acquisition and processing systems based on FlexRIO,CameraLink, and EPICS

Image diagnostics are becoming standard ones in nuclear fusion. At present, images are typically analyzed off-line. However, real-time processing is occasionally required (for instance, hot-spot detection or pattern recognition tasks), which will be the objective for the next generation of fusion devices. In this paper, a test bed for image generation, acquisition, and real-time processing is presented. The proposed solution is built using a Camera Link simulator, a Camera Link frame-grabber, a PXIe chassis, and offers software interface with EPICS. The Camera Link simulator (PCIe card PCIe8 DVa C-Link from Engineering Design Team) generates simulated image data (for example, from video-movies stored in fusion databases) using a Camera Link interface to mimic the frame sequences produced with diagnostic cameras. The Camera Link frame-grabber (FlexRIO Solution from National Instruments) includes a field programmable gate array (FPGA) for image acquisition using a Camera Link interface; the FPGA allows for the codification of ad-hoc image processing algorithms using LabVIEW/FPGA software. The frame grabber is integrated in a PXIe chassis with system architecture similar to that of the ITER Fast Controllers, and the frame grabber provides a software interface with EPICS to program all of its functionalities, capture the images, and perform the required image processing. The use of these four elements allows for the implementation of a test bed system that permits the development and validation of real-time image processing techniques in an architecture that is fully compatible with that of the ITER Fast Controllers. This paper provides a specific example of a pattern search in a movie, its real-time implementation, and a performance analysis of the entire platform.