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HDMI标准在高清视频编码SoC设计中的应用 总被引:1,自引:1,他引:0
介绍了HDMI接口标准的基本原理及传输过程中的TMDS视频数据的编解码算法.以H.264硬件编码器为例说明了HDMI接口在高清视频编码SoC设计和验证中的应用. 相似文献
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一、编解码算法和标准
1.视频编码
标清:H.261、H.263/H.263+/H.263++;高清:H.264等标准。
03年ITU和ISO推出了H.264,H.264经过短短几年的发展已经非常广泛的应用到标清和高清的视频中。主要有以下几个方面原因:同样的质量下H.264能够提供非常高的压缩率;满足不同场合的应用;设... 相似文献
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Steve Leibson 《电子设计技术》2007,14(9):94-94,96
尽管视频编解码过程非常复杂,但是,Tensilica公司的钻石系列标准音频和视频引擎允许SoC设计团队将视频编解码简化成低功耗黑盒进行处理.因此,设计人员不必精通H.264/AVC、MPEG-4和数字音频就可以将视频编解码集成到其便携式多媒体和手持式设备芯片中. 相似文献
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北京金昆瑞达科技有限公司是致力于可伸缩视频编解码技术研发及应用研究的公司。公司已完成基于H.264编码技术的高清编解码技术以及一整套视频解决方案,能轻松地实现25G的数字高清电影,在不改变AC-3音频格式和1080P高清画质的前体下压缩为3G。 相似文献
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Jia-Ming Chen Chun-Nan Liu Jen-Kuei Yang Shau-Yin Tseng Wei-Kuan Shih An-Yeu Wu 《Journal of Signal Processing Systems》2011,62(3):383-402
Two representative multimedia applications—AAC and H.264/AVC decoders on the parallel architecture core (PAC) SoC are introduced
in the second part of the two introductory papers. The applications have been programmed on the PACDSP core and the PAC SoC
to demonstrate the high-performance, low-power DSP computations and the effectiveness of the dynamic voltage and frequency
scaling (DVFS) capability on the heterogeneous multicore SoC. First, techniques to exploit data- and instruction-level parallelisms
existing in the application kernels are described for performance optimizations on the clustered VLIW architecture of PACDSP
with the distributed register organization. Next, two variation techniques of asymmetric programming model are introduced
by examples of decoders. Then, the energy efficiency of the programmable multimedia SoC is demonstrated using an innovative
power-aware H.264/AVC decoder. Finally, a DVFS-aware framework for soft real-time video playback is provided by extending
the power-aware decoding scheme. The work provides practical references of realizing multimedia applications on PAC SoC suitable
for rich-function and resource constraint portable devices. 相似文献
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《Journal of Visual Communication and Image Representation》2014,25(7):1686-1703
With recent advances in computing and communication technologies, ubiquitous access to high quality multimedia content such as high definition video using smartphones, netbooks, or tablets is a fact of our daily life. However, power consumption is still a major concern for portable devices. One approach to address this concern is to control and optimize power consumption using a power model for each multimedia application, such as a video decoder. In this paper, a generic, comprehensive and granular decoder complexity model for the baseline profile of H.264/AVC decoder has been proposed. The modeling methodology was designed to ensure a platform and implementation independent complexity model. Simulation results indicate that the proposed model estimates decoder complexity with an average accuracy of 92.15% for a wide range of test sequences using both the JM reference software and the x264 software implementation of H.264/AVC, and 89.61% for a dedicated hardware implementation of the motion compensation module. It should be noted that in addition to power consumption control, the proposed model can be used for designing a receiver-aware H.264/AVC encoder, where the complexity constraints of the receiver side are taken into account during compression. To further evaluate the proposed model, a receiver-aware encoder has been designed and implemented. Our simulation results indicate that using the proposed model the designed receiver aware encoder performs similar to the original encoder, while still being able to satisfy the complexity constraints of various decoders. 相似文献
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新一代的压缩标准H.264以其高压缩率与高图像质量而备受青睐,将H.264集成于SoC(片上系统Sys-tern on chip)已成为必然的发展趋势.基于开源免费的32位OpenRISC1200 CPU,设计了H.264解码器SoC系统,系统以OpenRISC1200为核心控制模块,其他所有外围模块包括H.264解码... 相似文献
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提出了H.264/AVC硬件编码器的一种3级流水结构,以此来提高硬件加速电路的处理能力和利用效率。鉴于H.264编码芯片验证的复杂性,还提出了一种基于ADSP-BF537的新型多媒体SoC验证平台,并讨论了如何利用BF537,对H.264编码芯片进行全面、高效的软硬件协同验证。 相似文献
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指数哥伦布编码是H.264/AVC标准和AVS标准中熵编码的重要组成部分,其硬件实现好坏直接决定了编码器熵编码的性能。文中根据哥伦布编码和解码的特点,设计了一种高速的哥伦布编解码器。首先,用查找表的方式代替了首1检测等复杂操作,通过查找直接得出要编解码码字的长度;直接取出特定的要操作的数据,同时进行相应的操作,代替了传统的先移位,再进行相应操作的方式,使得指数哥伦布编解码器的关键路径变短,速度变快。其次,对哥伦布编解码器采用了多级流水的方式,进一步提升了主频。最后,在virtex5平台上进行测试,该编解码器的吞吐率均可达到400MPixel/s。这将远胜于当今图像解码专用芯片的编解码速度,也为图像高速压缩提供了硬件实现基础。 相似文献
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《Signal Processing: Image Communication》2005,20(2):193-204
For streaming of pre-encoded bitstreams over constant bit rate (CBR) channels, the channel bandwidth, the receiver buffer capacity as well as the latency requirement vary greatly from application to application. In this paper, we attempt to determine the minimum buffer size and the minimum start-up delay required for streaming a pre-encoded bitstream over CBR channels at any specific bit rate. The proposed method employs geometric operations to derive the optimal determination for low or high bit rates and sub-optimal determination for medium bit rates. The algorithm developed requires little extra information from the encoder and is easy to implement. Our algorithm is implemented in a H.264/AVC video encoder and its performance is compared with that of H.264/AVC hypothetical reference decoder. Our approach provides new theoretical insight and an excellent solution for determining the leaky bucket parameters for video streaming over CBR channels. 相似文献
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提出一种在H.264/AVC基本档次编码器中实现时域可伸缩编码的方案,该方案通过H.264/AVC标准所提供的多参考帧和内存管理控制操作机制来实现。对于现有的H.264/AVC解码器,不需任何修改,即可直接解码由本方案生成的时域可伸缩码流。 相似文献