基准电压波动对Σ-Δ A/D转换性能的影响

Σ-ΔA/D转换器需要一个基准电压作为参照进行模/数转换,因此,基准电压上的任何变化都会直接影响到A/D转换的结果。文章推导分析了基准电压的DC及AC波动对Σ-ΔA/D转换结果的影响机制,并用一个三阶Σ-ΔA/D转换器实例,在Matlab仿真环境中验证了分析结果。文章的结论可用于指导Σ-ΔA/D转换器芯片中带隙基准源模块的电源抑制比设计。     

从8位扩展至10位的A／D转换器

这是一个采用功能扩展的方法而组成的10位A/D转换器实用线路,其工作原理框图示于图1。被转换的输入电压V_(?)首先加到一个2位A/D转换器,该转换器位数少,容易用中小规模电路组成。我们知道,对于一个2位二进制A/D转换器而言,其分辨率仅为V_(im)/4(V_(im)指规定的满度输入值),所以,输出的2位数A、B与对应的模拟量V_D,以及实际输入的电压V_(?)三者之间的关系符合下表:     

逐次逼近型(SAR)模数转换器在马达控制中的应用

引言 在一个典型的马达控制系统中(图1),马达相位线圈的电流和电压经由微控制器(μC)或DSP来测量和转换成数字信号.由于有高电压在马达相位线圈上,隔离的霍尔效应闭环传感器将马达的场信号转换成在A/D的输入范围内的电压信号.多通道SAR(逐次逼近)A/D转换器被用来做同步取样以得到正确相位信号.本文将分析闭环电流传感器及如何从A/D转换器实现最佳的信燥比.在此,我们采用ADS7864(6通道、12位、500KSPS)逐次逼近型A/D转换器.     

一种12位D/A转换器的技术研究

介绍了一种12位带内基准的电压输出型D/A转换器的电路实现原理、线路设计及其制作工艺特点.通过采用优化设计的R-2R电阻开关网络、温度补偿齐纳基准源和带JFET输入级的输出运算放大器等模拟电路单元,基于一种P阱5 μm LC2MOS工艺,研制出该12位D/A转换器.它具有转换精度高、线性及微分误差小、功耗低、转换速度快、使用方便等优点.     

基于模拟余差的7位200MS/s分级折叠式A/D转换器

提出一种基于模拟余差的分级折叠式A/D转换器,对其原理和电路结构进行了分析,阐述了提高A/D转换器性能的关键问题.测试结果表明,设计的A/D转换器转换速率为200 MS/s;在输入信号为6.0 MHz时,信噪谐波比(SINAD)为45.1 dB,有效位数(ENOB)为7.2位.给出了A/D转换器电路的具体结构,以及测试波形和动态性能参数测试结果.     

JSM—T_(300)扫描电镜物镜电路分析

扫描电镜的物焦镜距与加速电压和物镜电流有关。扫描电镜要求物镜电流具有较大的变化范围。T_300扫描电镜物镜电路如图所示。IC8为D/A转换器。波段开关S_3、二极管矩阵电路(D_10～D_27)、R_52～R_60、R_B_(23)组成了二进制码编码电路,为D/A转换器提供八位二进制码。D_8、R_(50)、IC9_1组成的电路为D/A转换器提供参考模拟电压V_REF。D_8(IS2192)的稳压值为8.2V,即A点的电压为8.2V。电压跟随器IC9_1输出的电压V_B=V_REF=V_A=8.2V。D/A转换器的输出电压Vout=-(V_REF/R_49)·R_51(A_8/2~1+A_7/2~2+A_6/2~3+A_5/2~4+A_4/2~5+A_3/2~6+A_2/2~7+A_1/2~8)。若当S_3的刀与第一掷相接时,D_10导通,D_11～D_27均不导通,D/A转换器的数字输入端A_8=0,A_7～A_1,均为1。因此D/A转换器的输出电压Vout=4V。D/A转换器的输入状态和输出电压与S_3对应关系如表1所示。从中可看到D/A转换器的输出电压范围为-4～-8.1V。D/A转换     

电容保持式多路D／A转换器及其定时刷新

目前,国内采用的多路D/A转换器,各路间大都是相互独立的。如图1所示,每路都有一片D/A转换芯片和一个电流-电压变换器(I/V变换器)。微处理器CPU只需向相应的口地址送入需要转换的数字量,D/A转换就可以进行。由于输入端数字锁存器的锁存功能,模拟输出电压可以一直保持下去,直到送入下一个不同的数字量。这种转换器的优点是各通道间互相独立互不影响,通道间无干扰,转换精度高,占用CPU时间少,在实时过程软件中编程     

集成电路

THS0842 A/D转换器有同步采样的双输入和带一个A/D转换器核的单或双8位总线,这个A/D转换器核在两倍的采样率下工作,对两个输入进行内部多路复用,与使用两个A/D转换器的器件相比减少了失配。这个8位、40M采样/秒转换器使设计者能够在包括同步同相和正交基带采样的系统中精确地匹配来自两个通道的转换。     

嵌入式微控制器片内A/D转换器的应用研究

介绍了微控制器片内A/D转换器的结构特点,深入分析了模拟输入信号源内阻对采样过程的影响、模拟输入信号源的大小与极性是否符合A/D转换器对输入信号的要求以及工作电源变化对转换精度的影响等方面问题,并提出解决方法.     

数字电压电流表的软件设计

主要采用ATMEGA8芯片和一些外设电路来完成数字电压电流表的设计,能够对输入的0～20 V电压及0～5A电流进行测量,并通过一个四位一体的8段LED数码管进行动态显示.测量精度为0.1％,还可以与PC进行串行通信.设计主要由五大模块组成:量程自动转换模块、A/D模数转换模块、单片机控制模块、显示模块和通信模块.采用ATmega8单片机主控,内设A/D转换器,可直接对输入量进行A/D转换控制.     

A monolithic charge-balancing successive approximation A/D technique

A new multiple-differential-voltage input, MOS, sampled-data, `charge-balance' comparator which can `weight' or scale each of many input voltage pairs has been developed. This comparator easily allows a differential analog input voltage capability on a monolithic A/D converter and greatly reduces the required number of resistors and decoding switches of a potentiometric successive approximation register (SAR) A/D design. An 8 bit converter has been built which uses 20 Rs and 32 switches as compared to the 256 Rs and 512 switches of a standard 2/SUP N/R ladder design. Measurements made on the 8 bit A/D converter are reported and indicate that at least 12 bit converters are possible with this technique. Therefore, a 13 bit converter has been designed which exhibits even greater component reductions-33 Rs and 64 switches instead of 8192 Rs and 16384 switches. A simple interface to microprocessors is provided for both converters which makes use of the standard logic signals of the control bus where the A/D is designed to appear as memory or an I/O port to the microprocessor. A new flexible reference voltage circuit is presented which, in combination with the analog differential input voltage feature, can accommodate arbitrary analog input voltage spans with any desired zero scale offset.     

9位100 MSPS流水线结构A/D转换器的设计

提出一种采用三级流水线型结构的9位100 MSPS折叠式A/D转换器,具体分析了其内部结构。电路使用0.6 μm Bipolar工艺实现, 由5 V/3.3 V双电源供电, 经优化设计后, 实现了9位精度,100 MSPS的转换速度,功耗为650 mW,差分输入范围2.2 V。给出了在Cadence Spectre的仿真结果,讨论了流水线A/D转换器设计的关键问题。     

基于USB接口的数据采集与控制系统设计

利用ADuC845单片数据采集器件和CH341USB接口器件构成的数据采集与控制系统．具有10个24位的MD转换器输入通道,60Hz范围内有20位有效分辨率,失调漂移10nV／℃,12位电压输出D／A转换器,双16位PWM输出,8路开关量输入,输出,支持全速设备接口USBV1．1,通讯波特率可达50b／s～2Mb／s,适用于医疗设备、工业控制系统等数据采集与控制领域。     

一种用于半并行A/D转换器的比较器设计

简要介绍了半并行结构的A/D转换器原理。针对该结构的A/D转换器,提出了一种能自动校零、迟滞、全差分输入及多级前置放大的比较器。解决了输入失调电压、噪声环境下单转换、电荷注入、带宽、转换速度等问题。给出了应用该比较器的0.6μm CMOS半并行A/D转换器的性能。结果表明,设计的比较器能使丰并行ADC的DNL和INL小于±0.5 LSB,SNR大于48dB。     

一种新型单级功率因数校正AC/DC变换器的研究

文章研究了一种新型单级单开关PFC反激变换器。该变换器负载变轻时其储能电容电压不会飘升,应用于宽范围交流输入电压,储能电容电压低于450V。变换器用其变压器中的一个附加绕组实现了升压功能。由于省去了大电感,减小了变换器的体积和重量,在中小功率应用场合下,变换器符合IEC61000-3-2class D谐波标准,并且具有输出电压快速调节能力。     

基于CPLD的高分辨率AD转换电路设计

本文从仪器仪表应用领域对温控的需求方面出发,设计了具有高精度、低温漂的16位AD转换电路。模拟输入电压为0-100mV,通过精准的放大和偏置后送给AD652进行V/F变换,转换出来的频率信号由CPLD进行测量,结果送交控制器,产生16位AD转换结果。同时系统可提供0-100mV连续可调的高精度测试用基准源。     

A high-density 1 kW resonant power converter with a transient boostfunction

A series/parallel resonant DC-DC converter with secondary-side resonance and a novel input boosting feature is described. In order to greatly reduce the conduction loss (factor of four) due to circulating currents in the resonant components, the boost circuit, which requires no additional active switches, operates only when needed during transient input voltage dips. This reduces the effective input voltage range over which the converter must operate and allows optimization at the steady-state input voltage. The converter employs highly efficient resonant inductors and novel Z-folded thin flex circuit transformer windings to meet a density of greater than 50 W/in³ with an efficiency approaching 95%. The DC-DC converter was developed for use as a 270 to 50 V line converter for distributed power applications     

An NMOS Microcomputer Peripheral Interface Unit Incorporating an Analog-to-Digital Converter

A peripheral interface unit for a microcomputer control system fabricated by a standard n-channel silicon-gate enhancement/depletion MOS process is described. This unit can accept analog and digital inputs, generate pulse outputs, and multiply. The analog input capability is made possible by an on-chip A/D converter using a constant slope approach with an external capacitor. This converter can perform a 10 bit conversion in 5 ms and has an input voltage range of 0-5 V with only one 8 V power supply for the analog circuits. The die area required by the converter is small and the precision analog specifications needed for the process and devices are few. The die area of the converter is 3 mm/sup 2/, out of a total unit area of 35 mm/sup 2/.     

A High-Quality Rectifier Based on Sheppard–Taylor Converter Operating in Discontinuous Capacitor Voltage Mode

This paper presents a single-phase soft-switched high power factor (PF) Sheppard-Taylor rectifier suitable for applications requiring low-voltage and high-current output. The proposed rectifier is designed to operate at discontinuous capacitor voltage mode. The Sheppard-Taylor converter in this mode of operation provides zero-voltage turnoff switching, as well as natural input PF correction over a wide range of input voltage, which makes the converter suitable for universal input applications. Due to its simplified control circuitry and reduced switch current stress, this converter presents better efficiency and higher reliability. In addition, the presented converter features continuous input-output currents, which result in low electromagnetic interference emission. Principle of operation, theoretical analysis, and experimental results from a laboratory prototype rated at 45 W/10 Vdc output voltage are presented. The measured efficiency and total harmonic distortion of the input line current were 85% and 3.2%, respectively. The input current harmonics meet the EN61000-3-2 Class D requirements.     

一种双电桥非线性校正方法

传感器的非线性校正,通常需要设计一个非线性校正电路来试验.现设计了一组双电桥电路,用于铂电阻温度传感器数显电路的非线性校正.由双电桥电路输出两组电压,其中一组提供随被测温度变化而变化的信号电压送给A/D变换电路的信号输入端,另一组是带有非线性补偿的基准电压送给A/D变换电路的基准电压输入端,调整其负反馈的大小,使温度显示器显示温度的非线性误差在-50℃～199.9℃,范围仅小于0.1℃.