程序自动并行化工具FAK

该文介绍了大规模并行处理系统程序自动并行化工具ＦＡＸ（Ｆｏｒｔｒａｎ Ａｕｔｏｍａｔｅｄ Ｘｌａｔｏｒ）的系统概况。重点阐述了ＦＡＸ中所采用的先进技术。测试结果表明,ＦＡＸ已具备一定的可用性及有效性,作为面向分布主存并行机系统的程序自动并行化工具,基本达到了设计目标。     

程序自动并行化工具FAX

该文介绍了大规模并行处理系统程序自动并行化工具FAX（FortranAutomatedXlator）的系统概况。重点阐述了FAX中所采用的先进技术。测试结果表明,FAX已具备一定的可用性及有效性,作为面向分布主存并行机系统的程序自动并行化工具,基本达到了设计目标。     

并行化软件环境KD-PASTE

并行化软件环境是超级计算领域内的前沿研究课题,它对充分发挥巨型机系统并行计算的巨大潜力具有至关重要的作用。本文所介绍的并行化软件环境KD—PASTE以相关分析理论为基础,充分挖掘应用程序的向量成份,并同时对程序的微任务化进行了探索。该系统功能齐全,使用方便,可移植性强。系统的并行化手段和综合效能达到了国际上80年代后期水平,填补了国内在该项领域里的空白。     

自动并行化系统AFP的设计与实现

有效的自动并行化系统帮助用户充分利用并行计算机的硬件资源,文中介绍了我所研制的自动并行化系统ＡＦＰ,其特色及所解决的关键技术,使用结果表明,ＡＦＰ一个高效实用型的自动并行化系统。     

并行计算机

本文概述了并行计算机的种类、结构及影响并行机效率的因素，阐述了并行计算机的发展现状和趋势，众所周知，目前世界各国都在争相发展并行计算机，研究开发新型高速的并行机已成为各国争夺高性能计算机霸主地位的主要目标，各国均不异投入大量人力物力和财力，因此基发展极为迅速，竞争极为激烈。随着神经网络的再度兴起以及其应用的日益广泛，神经计算机的研究日显重要。由于神经网络本质上的并行性，因此它的实现与并行处理技术和     

基于曙光5000并行机的远程并行调试器

并行调试对并行程序开发非常重要，然而传统的远程并行调试方式是采用登录(telnet)命令通过命令行的文本界面进行，非常繁杂。本文介绍了为曙光3000系统设计实现的远程并行调试器RPB(Remote Parallel Debugger)。RPB实现了完全并行调试等功能，并且具备图形用户界面．用户界面采用Java语言和Swing工具包实现，具备平台独立的特点。RPB采用客户端／服务器模式，客户端和服务器之间的通信采用当今流行的CORBA中问件技术。RPB支持通过局域网或广域网远程调试并行机上的程序，屏蔽了客户平台的差异和并行机地理位置上的差异，因而大大提高了并行机的好用性。     

网络协议并行实现系统

析网络协议并行实现的必要性，探讨端系统与互连设备并行协议系统的实现体系结构和开发途径，通过示例展示了协议并行化技术的应用前景。     

一个交互式的Fortran77并行化系统

并行化编译器可以把现有的串行程序自动或半自动地转换为并行程序.现有并行化系统的自动并行化效果与手工并行化的效果相比还有一定的差距,这是由于并行化工具的分析能力不足以及程序中所固有的语义信息无法被并行化工具所理解而造成的.TIPS(Tsinghua interactive parallelizing system)系统通过提供一些友好的交互式工具,使用户与编译器紧密协作,是提高并行化系统的能力和效率的一条有效途径.     

一种高速数字信号并行处理机的结构方案

现代数字满号处理技术对处理速度的要求越来越高，单个处理机已难以满足赛集运算的速度要求．本文在采用并行机虚拟实现神经网络的应用背景下，简要介绍了TMS320C40的待点和用它为成并行处理机时并行机系统拓扑结构上的优化考虑．     

并行程序设计的模型,语言及编译技术

并行程序设计的研究对并行机性能的发挥和推广应用都具有重要的作用。本文介绍了并行计算机的结构、并行程序设计模型和并行语言的一些基本概念，讨论了并行程序设计的方法，分析了大规模并行处理中编译技术的若干问题和研究方向。     

JavaPIE：在Internet上延伸并行编程交互环境研究

ＪａｖａＰＩＥ是并行程序设计交互环境在Ｉｎｔｅｒｎｅｔ上的延伸,其设计目标是并行程序设计交互环境Ｐａｒａ－ＰＩＥ和自动并行化编译工程ＡＦＰ的底层支持,通过Ｊａｖａ实现的交互工具达到更理想的移植性、开放性和及共享性。它将并行化编译方法、程序语义分析技术、交互信息可视化工具、实验分析脚本文档有机地结合在一起,并在Ｉｎｔｅｒｎｅｔ上延伸出来,为蓬勃地开展并行程序设计交互环境的国际化合作研究开辟了广阔的前     

静态程序分析并行化研究进展

静态程序分析发展至今,已在多个方面取得了长足的进步,应用于软件开发的众多方面.但对现代大规模复杂软件系统(如千万行代码规模的Linux操作系统、分布式大数据处理系统Hadoop等)进行高精度的静态分析,因其极大规模数据量的计算,仍有一定难度.精度、效率和可扩展性相互制约,是静态分析技术在工业界应用的主要障碍.对此,近年来,随着多核、众核架构的兴起,研究人员提出了静态分析的各种并行化解决方案.首先梳理了静态分析的发展历程,然后针对当前静态分析面临的挑战,在分析了传统算法优化研究的不足后,对利用硬件资源进行并行优化的方法进行了充分讨论,包括单机的CPU并行、分布式和GPU实现这3个方面;在此基础上,对一些使用较为广泛的支持并行的静态分析工具进行了评估;最后,对未来如何从算法和算力角度对静态分析进行并行优化作了讨论和展望.     

Run-Time Data-Flow Analysis

Parallelizing compilers have made great progress in recent years.However,there still remains a gap between the current ability of parallelizing compilers and their final goals.In order to achieve the maximum,parallelism,run-time techniques were used in parallelizing compilers during last few years.First,this paper presents a basic run-time prviation method.The definition of run-time dead code,backward data-flow information must be used.Proteus Test,which can use backward information in run-time,is then presented to exploit more dynamic parallelism.Also.a variation of Protus Test,the Advanced Proteus Test,is offered to achieve partial parallelism.Proteus Test was implemented on the parallelizing compiler AFT.In the end of this paper the program fppp.f of Spec95fp Benchmark is taken as an example,to show the effectiveness of Proteus Test.     

PORT：并行优化重构工具集

ＰＯＲＴ是以ＦＯＲＴＲＡＮ７７源程序为象的并行优化重构工具集，它以自动并行重构程序为主体，辅以一组优化，静态分析，动态分析和程序执行过程视化工具，通过良好的用户界面和统一的的内部数据结构将它们集成为一个整体，本文介绍ＰＯＲＴ系统的特点，结构和若干关键技术。     

Efficient interprocedural array data-flow analysis for automaticprogram parallelization

Since sequential languages such as Fortran and C are more machine-independent than current parallel languages, it is highly desirable to develop powerful parallelization tools which can generate parallel codes, automatically or semi-automatically, targeting different parallel architectures. Array data-flow analysis is known to be crucial to the success of automatic parallelization. Such an analysis should be performed interprocedurally and symbolically and it often needs to handle the predicates represented by IF conditions. Unfortunately, such a powerful program analysis can be extremely time-consuming if it is not carefully designed. How to enhance the efficiency of this analysis to a practical level remains an issue largely untouched to date. This paper presents techniques for efficient interprocedural array data-flow analysis and documents experimental results of its implementation in a research parallelizing compiler. Our techniques are based on guarded array regions and the resulting tool runs faster, by one or two orders of magnitude, than other similarly powerful tools     

A sorting classification of parallel rendering

We describe a classification scheme that we believe provides a more structured framework for reasoning about parallel rendering. The scheme is based on where the sort from object coordinates to screen coordinates occurs, which we believe is fundamental whenever both geometry processing and rasterization are performed in parallel. This classification scheme supports the analysis of computational and communication costs, and encompasses the bulk of current and proposed highly parallel renderers - both hardware and software. We begin by reviewing the standard feed-forward rendering pipeline, showing how different ways of parallelizing it lead to three classes of rendering algorithms. Next, we consider each of these classes in detail, analyzing their aggregate processing and communication costs, possible variations, and constraints they may impose on rendering applications. Finally, we use these analyses to compare the classes and identify when each is likely to be preferable     

Parallelizing a Level 3 BLAS Library for LAN-Connected Workstations

LAN-connected workstations are a heterogeneous environment, where each workstation provides time-varying computing power, and thus dynamic load balancing mechanisms are necessary for parallel applications to run efficiently. Parallel basic linear algebra subprograms (BLAS) have recently shown promise as a means of taking advantage of parallel computing in solving scientific problems. Most existing parallel algorithms of BLAS are designed for conventional parallel computers; they do not take the particular characteristics of LAN-connected workstations into consideration. This paper presents a parallelizing method of Level 3 BLAS for LAN-connected workstations. The parallelizing method makes dynamic load balancing throughcolumn-blockingdata distribution. The experiment results indicate that this dynamic load balancing mechanism really leads to a more efficient parallel level 3 BLAS for LAN-connected workstations.     

KD-PARPRO:一个基于知识的并行化工具——总体设计与功能描述

并行处理系统结构的发展要求相应的软件工具的支持,目前,国际上对并行化工具正开展广泛深入的研究,但由于过程间相关性分析难,最优化判别标准过分依赖于机器特性,同步通讯问题及调度开销大等原因,使得现有技术所能开发的并行性极为有限,另外,对软件工具的要求不但是正确性,还要有友好的用户界面和良好的可移植性,可扩充性。本文讨论了基于知识的并行化工具KD—PARPRO的设计思想,对启发式转换器进行了功能描述,并介绍了动态控制技术。     

Models of parallel data processing in multiprocessor computing systems

Models of parallel computations are considered for a wide class of data processing programs. Properties of programs are investigated and approaches to parallelizing sequential data processing programs and designing parallel programs are proposed. Computation optimizing problems are formulated.Translated from Kibernetika, No. 4, pp. 1–8, 42, July–August, 1989.