一种移动设备视频全景并行生成技术*

通过移动摄像机合成视频全景图,由于视频中存在时间冗余以及现有合成技术对大角度旋转存在失配,提出一种鲁棒性较好的视频全景并行合成方法。该方法首先对选取的关键帧采用并行线程提取可重复性特征,并利用特征估计透视运动模型,从而对相邻关键帧进行全局配准;然后对重叠区域进行双线性融合,以减少视差对重叠场景的影响,同时并行优化提高了视频全景的合成速度。不同条件下移动合成实验表明,在大角度移动旋转以及视差等情况下仍能较好地合成视图。     

A multi-protocol real-time monitoring and validation system for distributed fieldbus-based automation applications

This work describes BR-Tool (Bus Real-Time Monitoring Tool), an on-line monitoring and validation system to evaluate timing characteristics of automation systems implemented as a distributed network of fieldbus devices. BR-Tool supports several industrial communication protocol standards. It includes a programmable messages logger module and a validation toolset that allows timing requirements specification, validation, and graphical visualization of results. In order to illustrate the main system characteristics, two industrial case studies are presented: a Profibus-DP-based manufacturing system and an energy systems application (a multitap-transformers position control system) based on the CANOpen protocol.     

A hardware supported operating system kernel for embedded hard real-time applications

The concept of the kernel, i.e. the time critical part of a real-time operating system, and its dedicated co-processor, especially tailored for embedded applications, are presented. The co-processor acts as a system controller and operates in conjunction with one or more conventional processors in hard real-time environments. It is composed of three physically and clearly separated layers which vary with regard to implementation, speed and complexity. Correspondingly, the model of the operating system kernel is hierarchically structured, and functions are mapped to these layers, observing the inherent parallelism of recognition and handling of different kinds of events expected in such environments and higher level kernel functions such as tasking operations. The operating system functions are supported by the high level real-time programming language constructs. Since many embedded systems are safety related, the software employed must be highly dependable. Therefore, the kernel was proven correct with formal methods, which represents a major innovation in software technology.     

An efficient motion magnification system for real-time applications

The human eye cannot see subtle motion signals that fall outside human visual limits, due to either limited resolution of intensity variations or lack of sensitivity to lower spatial and temporal frequencies. Yet, these invisible signals can be highly informative when amplified to be observable by a human operator or an automatic machine vision system. Many video magnification techniques have recently been proposed to magnify and reveal these signals in videos and image sequences. Limitations, including noise level, video quality and long execution time, are associated with the existing video magnification techniques. Therefore, there is value in developing a new magnification method where these issues are the main consideration. This study presents a new magnification method that outperforms other magnification techniques in terms of noise removal, video quality at large magnification factor and execution time. The proposed method is compared with four methods, including Eulerian video magnification, phase-based video magnification, Riesz pyramid for fast phase-based video magnification and enhanced Eulerian video magnification. The experimental results demonstrate the superior performance of the proposed magnification method regarding all video quality metrics used. Our method is also 60–70% faster than Eulerian video magnification, whereas other competing methods take longer to execute than Eulerian video magnification.     

大面阵CCD图像实时显示系统中的SDRAM控制器设计

在分析了同步动态随机存储器(SDRAM)的存储原理之后,针对大面阵CCD图像实时显示系统中的数据缓存问题,应用参数化设计思想,采用VHDL硬件描述语言在Xilinx公司的ISE开发环境下设计了一种较为通用的、接口简单的SDRAM控制器,并成功运用在大面阵CCD图像实时显示系统中,很好地完成了图像的存取任务。     

海战场态势实时三维显示系统研究与实现

针对当前舰载指挥控制系统只能基于二维图形、图标显示战场态势的问题,提出和开发了基于UDP的海战场态势实时三维显示系统,将虚拟现实技术应用到作战指挥控制系统中,用三维视景实时显示战场态势变化过程、战场态势发展以及双方兵力对抗过程。系统对战场实体位置进行了从经纬度坐标到直角坐标的转换,并为战场实体建立了简单的行为模型。为满足实时渲染和实时显示的需要,系统对模型、场景范围、显示方式等都做了优化处理,减少计算量,同时减少对硬件的依赖。     

高速CMOS图像存储与实时显示系统设计

针对遥测系统图像单元存在数据量大、速度快、无法直接存储显示等问题,设计了一种高速图像存储与实时显示系统。系统以Spartan 6系列现场可编程门阵列(FPGA)作为核心处理器,使用Full模式Camera Link接口采集CMOS相机输出的图像数据,利用DDR3乒乓缓存技术将图像数据写入由SATA控制器组成的磁盘阵列中,并且通过千兆以太网接口将处理后的数据上传至计算机;图像数据采用抽帧以及降低分辨率的形式,将其转换为1 024×768像素的VGA分辨率格式,最后通过VGA接口对图像进行实时显示。实验结果表明,该系统能够对分辨率为2 048×2 048像素、帧频为150 f/s的高速图像数据进行长时间存储与实时显示。     

A parallel neural processor for real-time applications

Training and testing artificial neural networks can be challenging and time-consuming. Experiments with two real-time applications were performed to compare three approaches for implementing a multilayer perceptron neural network. In both applications, the special-purpose processor performed best     

面向实时应用的时态数据库系统体系结构

提出了面向实时应用的时态数据库系统 Agilor-TDB,详细介绍了系统的体系结构。针对实时应用 ,实现了实时任务调度。在数据存储方面介绍了基于时间区间的多级文件索引结构和高效的内存数据管理机制 ;在数据查询方面提出了高速查询缓存优化策略。此外 ,用 PN模型对系统并发控制进行了详细描述。     

基于双层调度框架的开放式实时系统非实时应用调度

在开放式实时系统中,多类型实时和非实时应用同时并存,这给系统调度机制带来了新的需求和挑战。对一种开放式实时系统调度机制进行了简单的介绍,指出了非实时应用调度时不可抢占区可能影响系统可调度性,并提出了一种解决方案,弥补了原有调度机制的缺点,完善了开放式实时系统的双层调度框架,保证了开放式实时系统并存多类型实时及非实时应用的可调度性。     

A robust real-time facial alignment system with facial landmarks detection and rectification for multimedia applications

Face detection often plays the first step in various visual applications. Large variants of facial deformations due to head movements and facial expression make it difficult to identify appropriate face region. In this paper, a robust real-time face alignment system, including facial landmarks detection and face rectification, is proposed. A facial landmarks detection model based on regression tree is utilized in the proposed system. In face rectification framework, 2-D geometrical analysis based on pitch, yaw and roll movements is designed to solve the misalignment problem in face detection. The experiments on the two datasets verify the performance significantly improved by the proposed method in the facial recognition task and outperform than those obtained by other alignment methods. Furthermore, the proposed method can achieve robust recognition results even if the amount of training images is not large.

     

A framework for mapping periodic real-time applications onmulticomputers

This short paper presents a framework for periodic execution of task-flow graphs that enables schedulability analysis of the communication requirements. The analysis performs the steps of segmenting messages, assigning the segments to specific links and time intervals, and ordering them within the intervals to generate node switching schedules that provide contention-free message routing at run-time. The analysis is also used to integrate task allocation with message routing using a contention-based objective function. Usefulness of the proposed scheme in ensuring guaranteed communication performance is demonstrated by an appropriate example     

A data collection protocol for real-time sensor applications

The nature of many sensor applications as well as continuously changing sensor data often imposes real-time requirements on wireless sensor network protocols. Due to numerous design constraints, such as limited bandwidth, memory and energy of sensor platforms, and packet collisions that can potentially lead to an unbounded number of retransmissions, timeliness techniques designed for real-time systems and real-time databases cannot be applied directly to wireless sensor networks. Our objective is to design a protocol for sensor applications that require periodic collection of raw data reports from the entire network in a timely manner. We formulate the problem as a graph coloring problem. We then present TIGRA (Timely Sensor Data Collection using Distributed Graph Coloring) — a distributed heuristic for graph coloring that takes into account application semantics and special characteristics of sensor networks. TIGRA ensures that no interference occurs and spatial channel reuse is maximized by assigning a specific time slot for each node. Although the end-to-end delay incurred by sensor data collection largely depends on a specific topology, platform, and application, TIGRA provides a transmission schedule that guarantees a deterministic delay on sensor data collection.     

A composable real-time architecture for replicated railway applications

Triple-modular-redundant applications are widely used for fault-tolerant safety–critical computation. They have strict timing requirements for correct operation. We present an architecture which provides composability and mixed-criticality to support integration and to ease certification of such safety–critical applications. In this architecture, an additional layer is required for the sharing/partitioning of resources. This potentially jeopardizes the synchronization necessary for the triple-modular-redundant applications.We investigate the effects of different (unsynchronized) scheduling methods for the resource-sharing layer in this architecture and conclude that an out-of-the-box solution, which guarantees the technical separation between applications with fast reaction time requirements is only feasible when executing at most one instance of a triple-modular-redundant application per CPU-core for single and multi-core CPUs. Only when accepting changes in the applications or the applications’ synchronization mechanisms, are more flexible solutions with good performance and resource utilization available.     

Tools and applications for large-scale display walls

Increased processor and storage capacities have supported the computational sciences, but have simultaneously unleashed a data avalanche on the scientific community. As a result, scientific research is limited by data analysis and visualization capabilities. These new bottlenecks have been the driving motivation behind the Princeton scalable display wall project. To create a scalable and easy-to-use large-format display system for collaborative visualization, the authors have developed various techniques, software tools, and applications.     

基于FPGA的彩色图像实时采集显示系统设计

设计并实现了一种基于FPGA硬件平台的Bayer到RGB格式图像数据转换实时采集显示系统。该系统能够对前端Camera Link接口的CMOS相机采集的分辨率为1 920×1 080、帧率100 f/s以上的Bayer格式图像进行实时处理,并且将处理得到的RGB彩色图像数据通过DVI显示器以60 f/s的帧率实时显示。根据FPGA并行处理能力强的特点,采用像素矩阵模板实现了Bayer到RGB的彩色图像插值算法,实现了高分辨率、高帧率彩色图像的实时采集显示。     

Collaborative real-time traffic information generation and sharing framework for the intelligent transportation system

Real-time traffic information collection and data fusion is one of the most important tasks in the advanced traffic management system (ATMS), and sharing traffic information to users is an essential part of the advance traveler information system (ATIS) among the intelligent transportation systems (ITS). Traditionally, sensor-based schemes or probing-vehicle based schemes have been used for collecting traffic information, but the coverage, cost, and real-time issues have remained unsolved. In this paper, a wiki-like collaborative real-time traffic information collection, fusion and sharing framework is proposed, which includes user-centric traffic event reacting mechanism, and automatic agent-centric traffic information aggregating scheme. Smart traffic agents (STA) developed for various front-end devices have the location-aware two-way real-time traffic exchange capability, and built-in event-reporting mechanism to allow users to report the real-time traffic events around their locations. In addition to collecting traffic information, the framework also integrates heterogeneous external real-time traffic information data sources and internal historical traffic information database to predict real-time traffic status by knowledge base system technique.     

DICOS: a real-time distributed industrial control system for embedded applications

The Fault-tolerant Systems Research Group of the Technical University of Valencia has developed the distributed industrial control system (DICOS) system. This paper describes DICOS nodes. The architecture of DICOS nodes and the error detection mechanisms used are presented. These mechanisms are based on the internal capabilities of the 16-bit microcontroller used and control flow checking and deadlines control with the aid of a second 8-bit microcontroller. Experimental results about the effectiveness of those mechanisms are shown in this paper.