具有混合反馈的高Q和/或高f_s开关电容带通滤波器

本文提出了一种减少电容分布和总电容的高Q和/或高f_s开关电容(SC)带通滤波器。在传统的双二次SC滤波器结构中,引入部分正反馈并改变前馈网络可使总电容和电容分布得到大幅度的减少。举例说明了二阶高Q(=50)SC带通滤波器设计,并比较了不同滤波器结构的性能参数。     

单一单位增益放大器的Q增强SC滤波器

本文阐述了采用单位增益放大器的SC滤波器的设计方法。基于无源Q增强技术,由Sallew Key有源RC电路导出了一系列Q增强的二阶SC低通、高通和带通滤波器。设计表明,本文提出的Q增强SC电路比文献给出的电路需要小得多的电容分散度。本文考察了这些电路灵敏度和有限GB对SC电路的影响。用分立元件做了实验,实验结果与理论计算相吻合。     

对寄生电容不灵敏的开关电容有源滤波器的设计

采用单位缓冲器设计对寄生电容不灵敏的开关电容(SC)频率相关负电阻(FDNR)元件，利用该元件对椭圆函数式LC低通滤波器进行SC模拟。为了获得电容最佳值，提出了一种简单的最优化方法；并采用寄生电阻预畸变与SC负电阻相结合的办法，设计的SC滤波器对寄生电容不灵敏，且电路简单。在电子工作平台(EWB)上进行五阶椭圆低通SC-FDNR滤波器仿真，测量数据最大相对误差为0．948％，仿真结果表明该方法实用可行，效果明显。     

对寄生电容不灵敏的开关电容有源FDNR滤波器的设计

采用单位缓冲器设计对寄生电容不灵敏的开关电容(SC)频率相关负电阻(FDNR)元件，利用该元件对椭园函数式LC低通滤波器进行SC模拟。为了获得电容最佳值，提出了一种简单的最优化方法；并采用寄生电阻预畸变与SC负电阻相结合的办法，设计的SC滤波器对寄生电容不灵敏，且电路简单。在电子工作平台(EWB)上进行五阶椭园低通SC-FDNR滤波器仿真，测量数据最大相对误差为0．948％，仿真结果表明该方法实用可行，效果明显。     

用于高频的新颖开关电容积分器

本文研究了用于开关电容(SC)滤波器的离散积分器,所推荐的积分器是由无耗离散积分器(LDI)和双线性离散积分器的最佳线性结合而成,因此,称之为组合离散积分器(CDI)。由于这个积分器使正常转折频率增加一倍,并使高频离散积分器误差减少到最低限度,所以它对高频应用是理想的。文中给出了组合离散积分器的几种SC实现,并且还给出了以组合离散积分器为基础,模拟一般一阶和二阶的模拟滤波器单元的SC电路。     

基于FPGA的高速高阶FIR数字滤波器的设计

在数字滤波器设计与应用当中,相比于以牺牲线性相位频率特性为代价的无限冲击响应(IIR)数字滤波器,有限冲击响应(FIR)数字滤波器不仅保证了精确严格的线性相位特性,并且结构简单稳定。但在实现相同的设计指标时,有限冲击响应需要更高的阶数,为满足高速高阶数字滤波器设计,文章提出一种改进的分布式算法。该算法利用主流现场可编程逻辑门阵列(FPGA)芯片的多相分解结构和流水线技术,采用多路复用加法器对数据进行预相加,减少传统分布式结构的查找表规模。利用Matalb仿真设计,Quartus II编译测试,并下载到现场可编程门阵列(FPGA)中进行运行分析,结果显示文章的方法有效地减少了滤波器对硬件资源的消耗,能够较好地实现高阶的FIR滤波器。     

开关电容双二次滤波器发展综述

本文综述了开关电容（SC）双二次滤波器的发展，评价了这些电路的性能，比较了它们的优缺点。最后简要介绍了SC滤波器电容面积效益的设计技术。     

一种适用于数字音频的Δ-ΣD/A转换器

设计了一种适于数字音频应用的18位48 kHz Δ-Σ D/A转换器.其内插滤波器采用时分复用和无需乘法器的设计,降低了硬件开销.Δ-Σ调制器采用5阶单环单比特量化结构,经FPGA平台验证,可实现100 dB的带内信噪比.开关电容(SC)重建滤波器采用CSMC 0.6 μm CMOS工艺实现,核心芯片面积为1.73 mm×1.11 mm,在5 V工作电源下,其功耗小于22 mW.     

一种S波段LTCC带通滤波器的改进设计

设计了一种小型化的低温共烧陶瓷(LTCC)滤波器,该滤波器电路由电容耦合的二阶谐振腔组成。设计了该滤波器的三维多层结构,利用组件间的耦合效应,产生一个传输零点,提高了滤波器性能。仿真结果表明,该滤波器中心频率为3.41GHz,相对带宽为5.9%(200MHz),体积为3.8mm×2.8mm×0.8mm,在S波段的通讯,雷达等射频系统有广泛的应用。     

Band 40波段体声波滤波器的设计北大核心

射频(RF)滤波器在4G移动通信(如Band 40波段)中具有广泛应用。描述了基于薄膜体声波谐振器(FBAR)技术的RF滤波器的设计和制作方法。体声波滤波器是由FBAR以T型结构级联的方式实现的。在滤波器的设计过程中,为了使仿真结果更接近于实际情况,采用考虑电极和衬底间耦合效应的改进的Mason模型对FBAR进行性能仿真和优化。最后,在8英寸(1英寸=2.54 cm)CMOS工艺线上对此滤波器进行了流片。测试结果表明,Band 40波段的体声波滤波器具有低的通带插入损耗(小于3 dB)、高的带外抑制(大于40 dB)和快速滚降特性。     

NEW STRUCTURE OF SC FILTERS WITH REDUCED GB EFFECT

In this paper, the problem how to reduce the GB effect in SC filters is discussed. A new generalbiquadratic SC structure in which the GB effect is reduced is developed. The structure is stray-insensitiveand has very low W_0 and Q sensitivities. Using the low-pass SC filter for an example, method of reducingthe GB effect has been shown in detail.     

A new simple method for analysing of thermal noise in switched-capacitor filters

Thermal noise is one of the most important challenges in analogue integrated circuits design. This problem is more crucial in switched-capacitor (SC) filters due to the aliasing effect of wide-band thermal noise. In this article, a new simple method is proposed for estimating the power spectrum density of output thermal noise in SC filters, which have acceptable accuracy and short running time. In the proposed method, first using HSPICE simulator, accurate value of accumulated sampled noise on sampler capacitors in each clock state is achieved. Next, using difference equations of the SC filter, frequency response of the SC filter is shaped by time domain analysis. Based on the proposed method, a SC low-pass filter and a second-order SC band-pass filter are analysed. The results are validated by comparing to the previously measured data.     

Compact formulation for exact analysis of nonideal SC circuits

A systematic analysis procedure to obtain closed-form expressions for the z-domain transfer functions of SC circuits with finite GB product op-amps is presented. This method allows exact frequential analysis of a general class of SC circuits, without imposing any restriction in the ratio between GB and clock frequencies.     

A micropower fourth-order elliptical switched-capacitor low-pass filter

A micropower fourth-order elliptical switched-capacitor (SC) low-pass filter for biomedical applications has been designed and measured. The charge transfer error of an SC integrator using a transconductance amplifier is discussed. Also first-order noise and PSRR calculations are performed and compared with the results of simulations and measurements. The measurements show that by careful optimization of the gain bandwidth, slew rate, and gain of the amplifiers, high-performance low-power SC filters can be constructed. The cutoff frequency of the filter is 5 kHz, the ripple in the passband is 0.27 dB, and stopband rejection is 49 dB. The power consumption of the filter is 190 /spl mu/W with /spl plusmn/2.5-V power supplies. The dynamic range of the filter is 75 dB, and the total harmonic distortion over the whole passband range is below 0.25% for a 2-V/SUB pp/ input signal. The PSRR of the filter is above 40 dB at frequencies below 3 kHz.     

An optimum CMOS switched-capacitor antialiasing decimating filter

An optimum switched-capacitor (SC) decimating filter is capable of achieving a high input sampling frequency while the time period for the setting of the operational amplifiers can be maximized with respect to the lower output sampling frequency. Thus, for the same speed of the operational amplifiers, the oversampling ratio of the input signal in optimum SC decimating filters is much larger than in conventional SC filtering circuits, yielding a significant relaxation of the continuous-time prefiltering requirements. This is demonstrated by considering the design of a second-order SC antialiasing decimating filter with a threefold sampling rate reduction, which has been realized in a 1.8-μm CMOS double-poly technology. The experimental evaluation of prototype samples confirms the expected operation of the circuit     

基于信号流图的开关电流滤波器设计

开关电流（SI）是有望取代开关电容（SC）的一种新型的取样数据技术，鉴于SC技术发展的成熟性及其与SI技术的紧密联系，即SC和SI滤波电路具有互易性，可采用信号流图转置的方法，将SC综合法直接用于SI滤波器设计，而无须提出新的设计方法。本文以二阶巴特沃思开关电容带通滤皮器为例给出了该方法的具体应用。     

An integrated CMOS switched-capacitor bandpass filter based on N-path and frequency-sampling principles

A new combined switched-capacitor (SC) frequency-sampling N-path filter is presented, which allows the implementation of very narrow bandpass filters. The included frequency-sampling (FS) filter suppresses undesirable passbands of the SC N-path filter. The center frequency f/SUB m/ of the bandpass filter is identical to the circuit clock frequency f/SUB c/. Experimental results are presented for a CMOS SC frequency-sampling four-path filter with second-order filter cells, a center frequency of 1 kHz, and -3-dB passband bandwidth of 11.5 Hz.     

Fully differential stray-insensitive bilinear-z switched-capacitor highpass filter

A fully differential charge-domain bilinear-z SC highpass filter is proposed. This technique not only solves the stray-sensitive problem mentioned by Lee et al. but also provides some other advantages which are inherent in the differential structure.     

HIGH SELECTIVITY SC BANDPASS FILTERS WITH LESS CAPACITOR SPREAD

Two novel switched-capacitor(SC)bandpass filters using a single operational am-plifier(op amp)are presented.Optimal designs for minimizing capacitor spread are also given.Gain-bandwidth product(GB)effects of op amps on the proposed SC circuits are taken intoconsideration.Comparisons with the proposed circuits and the circuits given by the literatureshow that the new circuits require less chip area in monolithic integration and are less sensitiveto the GB effects.