一种新的应用于降压式DC-DC变换器电流采样电路的设计

在分析了传统的应用于大负载电流降压式DC-DC变换器电流采样电路主要缺点的基础上,提出一种新的应用于降压式DC-DC变换器的电流采样电路。该方法通过一个电阻电容网络来消除电感寄生电阻的影响,并利用开关电容积分器来实现降压式DC-DC变换器的电流采样,在Chartered 0.35μm CMOS工艺下实现该电路并流片验证。最终的测试结果显示,提出的电流采样电路实现了对降压式DC-DC变换器精确的电流采样。     

一种宽负载高效率Buck转换器设计

本文提出了一种双模式调制技术,以提高宽负载范围内降压型DC-DC转换器的转换效率。采用自适应导通时间电路(AOT)和斜坡信号V_RAMP产生电路来维持转换器连续导通时间(CCM)工作模式下开关频率基本稳定;利用过零检测电路来检测电感电流,当电感电流过零时,能及时关断续流管,降低开关损耗,进一步提升轻载转换效率。该DC-DC基于SMIC 0.18 um BCD工艺进行电路仿真验证,该电路可在0～3A宽负载范围内正常工作,在输入电压3～5V范围内,PFM模式下输出电压纹波小于5.2mV,1m A负载下转换效率为87.37%。在PWM模式下输出电压纹波小于2.8mV,3A负载下最低转换效率为84.24%。峰值效率可达94.91%,全负载范围内转换效率大于84%。     

用于降压型DC-DC转换器的新颖过零检测电路

针对降压型DC-DC转换器需要工作在电感电流不连续导通模式(DCM)下的场合,设计了一个输出电压自适应的过零检测方案。该方案通过采集输出电压信息来调整检测到电感零电流后的响应时间,使其在输出电压很大时倒灌电流仍然很小。采用0.5μm BCD工艺,在8V输出电压下进行芯片级仿真,结果显示,与传统过零检测电路相比,新电路的倒灌电流减小了66%。     

一种带自适应斜坡补偿的PCM控制Boost变换器

设计了一种带自适应斜坡补偿的峰值电流模式(PCM)控制Boost变换器。采用一种低功耗自适应斜坡补偿电路,使得升压(Boost)变换器能够实现宽输出范围和高带载能力。在此基础上,提出了一种应用于Boost变换器的电感电流采样电路,该电路实现了高采样速度和高采样精度,且具备全周期的电感电流采样特点。变换器基于SMIC 180 nm BCD CMOS工艺设计。仿真结果表明,该带自适应斜坡补偿的PCM控制Boost变换器输入电压转换范围为2.8 V～5.5 V,输出电压转换范围为4.96 V～36.1 V,最大输出负载电流高达5 A。     

一种宽频应用的自适应计时电路

针对传统自适应导通时间控制DC-DC变换器工作频率范围窄的问题,提出了一种宽频应用的自适应计时电路.在锁相环调制DC-DC变换器的基础上,采用全CMOS电流乘法器,将振荡器的电流引入计时电路,使计时电路的中心频率跟随振荡器的基准频率变化,从而使自适应导通时间控制DC-DC变换器工作在较宽频率范围.基于0.18 μm B...     

基于电容ESR和预测调制的DC-DC变换器双环控制策略研究

针对boost型DC-DC变换器,研究基于输出电容ESR纹波电压的预测调制控制策略.首先提出了无需电流采样,并采用输出电容ESR纹波电压的双环控制系统.其次,为了提升DC-DC变换器系统性能,引入了预测调制策略,可以提高变换器瞬态响应速度,减小由输入电压及负载变化引起的扰动.同时,为避免次谐波振荡,采用谷值后缘预测调制技术.最后,对该变换器进行Simulink仿真,结果表明,采用基于输出电容ESR纹波电压的双环控制,结合谷值后缘预测调制技术,可以稳定变换器输出电压,提升瞬态响应性能.该策略无需电流采样以及谐波补偿等模块,能够有效降低硬件成本.     

基于LM2679多路输出DC-DC变换器

发现并证明了在设计多路大电流DC-DC变换器时,如果对每个工作模块进行有效隔离可避免自激情况发生。这个发现可更好地指导设计大电流多路DC-DC变换器。文中实现了一个三路大电流DC-DC变换器,输入电压19～31 V,输出电压15 V/5 A、5 V/3 A、3.3 V/3 A。实验结果证明,文中方法达到了设计要求。     

Buck型DC-DC电路振铃现象的抑制

Buck型DC-DC电路在负载较大时,外接电感电流在一个调制周期内会出现减小到零的情况。为了防止电路进入强制连续导通模式(FCCM),电感电流反向,导致负载电容通过续流NMOS管放电,降低DC-DC的转换效率,需要设计保护电路在电感电流减小到零时检测电感前端电压,当电压大于零时强制关断NMOS管,使电路工作于断续导通模式(DCM)。由于开关管寄生电容与外接电感LC形成振荡回路,电感残余电流产生振铃现象。为了抑制振铃现象,通过控制电路在LXC与地之间接入阻尼电阻,减小电容的等效并联电阻,加快振荡衰减。     

集成于电流模降压型DC-DC变换器的电流采样电路

针对电流模降压型DC-DC变换器,提出了一种新颖的CMOS片上电流采样电路.该电路结构简单,易于集成,功率损耗小,且通过MOSFET的匹配使采样比例几乎不受温度、模型以及电源电压变化影响.并通过进一步的优化设计,使得响应速度更快,工作电压进一步降低.提出的采样电路在一款基于0.5μm CMOS工艺没计的单片电流模降压型DC-DC变换器中进行了验证.在2.5～5.5V的电压范围,0～2A的负载范围内芯片工作稳定,瞬态响应良好,且效率高达96%.     

一种Boost软开关变换器的改进方法

为了减小Boost软开关变换器高频工作状态下开关管的功率损耗,文中提出了一种改进调制策略,传统调制策略下主开关管只能实现零电流开通,通过改变主开关管的开通时刻和辅助开关管的关断时刻可实现主开关管零电压零电流开通,辅助开关管可提前实现零电压零电流关断,提高了电路工作效率。仿真波形中观察到改进调制策略下主开关管实现了零电压零电流开通,辅助开关管提前实现了零电压零电流关断。     

On-chip CMOS current-sensing circuit for DC-DC buck converter

An on-chip CMOS current-sensing circuit for a DC-DC buck converter is presented. The circuit can measure the inductor current through sensing the voltage of the switch node during the converter on-state. By matching the MOSFETs, the achieved sense ratio is almost independent of temperature, model and supply voltage. The proposed circuit is suitable for low power DC-DC applications with high load current.     

Adaptive current-threshold detector for an adaptive on-time Buck converter at light load

The adaptive on-time control technique has been tremendously utilized in DC–DC converters for its fast transient response, easier design and high efficiency at light load. In some applications the output voltage ripple of DC–DC converters has to be maintained within an acceptable level to achieve superior performance, which depends largely on the load current for adaptive on-time buck converters when operating in discontinuous conduction mode. This paper proposes an adaptive current-threshold detection method for reducing the output voltage ripple. An actual detector circuit is presented to implement the method. This circuit monitors the relationship between the peak inductor current and the load current at light load. Then it outputs a logic signal which controls the turn-on time of the main power MOSFET and hence the peak inductor current. Therefore, the magnitude of the output voltage ripple is controlled. The current-threshold detection method has been verified in an adaptive on-time buck converter by simulation and experimental results. The proposed method can also be used in other constant on-time converters.     

A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique

A monolithic current-mode CMOS DC-DC converter with integrated power switches and a novel on-chip current sensor for feedback control is presented in this paper. With the proposed accurate on-chip current sensor, the sensed inductor current, combined with the internal ramp signal, can be used for current-mode DC-DC converter feedback control. In addition, no external components and no extra I/O pins are needed for the current-mode controller. The DC-DC converter has been fabricated with a standard 0.6-/spl mu/m CMOS process. The measured absolute error between the sensed signal and the inductor current is less than 4%. Experimental results show that this converter with on-chip current sensor can operate from 300 kHz to 1 MHz with supply voltage from 3 to 5.2 V, which is suitable for single-cell lithium-ion battery supply applications. The output ripple voltage is about 20 mV with a 10-/spl mu/F off-chip capacitor and 4.7-/spl mu/H off-chip inductor. The power efficiency is over 80% for load current from 50 to 450 mA.     

Designing a compact soft-start scheme for voltage-mode DC-DC switching converters

In this paper, a compact soft-start scheme is proposed and successfully applied to typical voltage-mode DC-DC switching converters. The adaptive current limitation implemented through DAC control will largely reduce the overshoot voltage under a wide range of output current. Proven experimentally by a buck converter implemented in a 0.5 μm CMOS technology, the post-simulation results show that when the converter starts up, the maximum overshoot (2.7% at I_LOAD=0 A) by the proposed soft-start scheme is less than that with the conventional scheme by 5% under the same condition. The start-up time can be adaptively adjustable depending on load current and the maximum start-up time is around 760 μs with 22 μF output capacitor. The circuits which realize the soft-start scheme can also be fully integrated into the control chip of DC-DC switching converter resulting in low cost.     

Fuzzy Switching Technique Applied to PWM Boost Converter Operating in Mixed Conduction Mode for PV Systems

Due to the variation of the maximum power point (MPP) of photovoltaic (PV) generators with solar radiation and temperature, boost DC-DC converters placed between PV modules and inverters in grid-connected PV systems have to be controlled in a variable operating-point condition. In addition, inductor current dynamics changes suddenly when moving from continuous to discontinuous conduction mode. The previous difficulties make the design of reliable and fast control laws for the input voltage of boost converters complicated. The aim of this paper is to propose a control algorithm based on cascaded-loop control. The input voltage is controlled by the outer loop. The inductor current is controlled by an inner loop strategy which is able to perform in mixed conduction mode, owing to the fuzzy switching technique. Simulation and experimental results for a 10-kW boost converter show that the proposed strategy achieves an accurate and robust performance at every operating point, even if the inductor value varies in a wide range; thus, fast MPP tracking techniques can be implemented. An additional advantage is that constant switching frequency is achieved.     

Design and implementation of a 0.8 V input, 84% duty cycle, variable frequency step-up converter

A 0.8 V input, 84% duty cycle, variable frequency CMOS DC-DC step-up converter with integrated power switches has been presented in this paper. The converter has the properties of both the current mode and hysteric control mode operations. The inductor charging time of the topology is designed to be inversely proportional to the input voltage and as a result the inductor current disturbance dies out immediately. Hence, no external components and extra I/O pins are required for the compensation of the current loop. The step-up converter has been fabricated with a standard pseudo BiCMOS process. Special MOS device of threshold voltage 0.5 V and start-up circuitries enable the converter to start from a voltage as low as 0.8 V. The real time data show that the converter can boost 0.8 V to as high as 5 V, which makes it suitable for low voltage applications. The efficiency of the chip has been found over 75 % for the entire load range from 10 to 100 mA.     

单片集成直流-直流转换器的效率提高方法

采用SMIC 0.13μm CMOS工艺,设计实现了开关频率达到250 MHz,单片集成的降压型电源转换器。为了提高电源转换效率,该转换器中的片上电感采用非对称性设计方法,提高了电感的品质因数。采用了高密度片上滤波电容来稳定输出电压,同时对单位电容尺寸的优化设计减小了电容的等效串联电阻以及输出电压纹波。测试结果表明,芯片输入电压为3.3 V,当输出2.5 V电压时,峰值效率达到了80%,最大输出电流达到270 mA;当输出1.8 V电压时,峰值效率达到了70%,最大输出电流达到400 mA。     

A single-switch flyback-current-fed DC-DC converter

This work presents a novel DC-DC converter, whose significant advantages are the single power switch, single-input inductor, purely capacitive output filter, isolation, low current ripple through the output capacitor, and operation at constant frequency in a conventional pulse-width-modulation scheme. The new converter operates over a wide input-voltage range and can be employed in power factor correction and multiple-output power supplies. Theoretical analysis is presented along with experimental results taken from a laboratory prototype rated at 300 W/50 kHz     

一种恒压输出的DC-DC升压电路设计

针对DC-DC升压器存在效率低,纹波电压较大,输出电压不稳定等问题,文中开发和设计了一种具有恒定输出电压的DC-DC升压转换器的方法。通过升压电路和电压反馈技术,将波动的输入电压变成恒定的直流电压输出。该设计通过将转换器的输出电压与参考电压相比较,两者的差值会产生一个PWM信号控制升压器的通断时间,从而达到恒定电压输出。仿真结果显示,该实验电路能在频率为20 kHz的连续导通模式中工作,产生24 V的恒定输出电压,输出功率为100 W。