电解质对液体钽电容器闪火电压影响的研究

研究了电解质对高压液体钽电容器电性能的影响。通过对液体钽电容 阳极界面处和阴极界面处的电极过程的研究，结合实验发现，阴离子电子发射及电致伸缩作用引起的Ta2O5介质膜强度下降是导致闪火发生的根本原因。该文研究了电解质中的负离子浓度及有机物的含量对液体钽电解电容器闪火电压的影响。     

工作电解液闪火电压的计算机测试系统

通过取样控制电路,利用A/D转换技术,建立了工作电解液闪火电压的计算机自动测试系统。系统测试程序采用VB编写,人机界面友好,操作简便。该系统将工作电解液形成电压与时间的关系曲线实时记录下来,从而准确地找到闪火点,避免了人工目测铝箔闪火的人为误差,测得的数据重复性好。给出了该系统测试电解液闪火电压的实例,比较了测试电流密度与温度对闪火电压值的影响。     

纳米SiO2对铝电解电容器闪火电压的影响研究

应用纳米材料改进铝电解电容器的性能将成为一条新途径。通过在工作电解液中添加纳米SiO2溶胶,研究了纳米SiO2对乙二醇体系工作电解液电导率和闪火电压的影响。结果表明,在研究体系中添加2%(质量分数)的纳米SiO2可以提高工作电解液的电导率10%、闪火电压提高20V,这与传统材料相比具有明显的优点。     

交流铝电解电容器工作电解质的研究

本文提出了降低工作电解质的电阻率和提高闪火电压的途径,介绍所研制的适用于电压系列110伏和220伏交流起动铝电解电容器的工作电解质。这些工作电解质的溶质采用五硼酸铵、已二酸三乙胺盐、五硼酸铵硼酸盐及硼酸三乙胺盐,溶剂采用乙二醇。     

硼酸聚酯对铝电解电容器工作电解液性能的影响

选用乙二醇、二甘醇、聚乙二醇(200,400)和硼酸为原料,制备了一系列硼酸聚酯。考察了所制样品对铝电解电容器工作电解液的闪火电压、电导率、热稳定性及含水量的影响,并从机理方面进行了分析。结果表明:所制硼酸聚酯可以明显提高工作电解液的闪火电压和热稳定性,并能降低工作电解液的含水量;以硼酸乙二醇聚酯对工作电解液闪火电压提高贡献最大,其添加质量分数为6%时,可提高37.8V,电导率由1422×10–6S/cm降至1057×10–6S/cm,含水量(质量分数)降低51.3%;经过氨解后的硼酸聚酯的水解稳定性优于未氨解的产品。     

有机添加剂对己二酸铵/乙二醇加水体系工作电解液性能的改善

在传统磷酸盐添加剂工艺的基础上，采用聚乙烯吡咯烷酮等有机添加剂改善工作电解液的高温稳定性，提高闪火电压。通过电解液组分的优化，降低电阻率，使传统的己二酸铵／乙二醇加水体系的适用范围从－２５～＋８５℃拓宽到＋１０５℃，工作电压从４～１００Ｖ拓宽到２５０Ｖ。由于中压电解液的电阻率ρ３０℃降至２００～２５０Ω·ｃｍ，低压电解液的电阻率ρ３０℃降至５０～７０Ω·ｃｍ，也可用于高频低阻抗品。     

电解质对高压(160 V)液体钽电容器电性能的影响

研究了有机物对液钽电容器工作电解质闪火电压及电导率的影响。试验表明,适当的有机物加入工作电解质中,可以吸附在Ta2O5介质膜表面,减少阳极界面处阴离子的有效浓度,使工作电解质闪火电压适当提高。利用所研制的工作电解质浸渍装配成160 V/47μF的液钽电容器,经1 000 h高温负荷实验,测试结果表明电容器电性能良好。     

n沟6H-SiC MOSFET阈值电压的温度特性模拟与分析

分析了n沟6H—SiCMOSFET的杂质不完全离化和SiO2—SiC界面存在大量界面陷阱等问题，研究了影响6H—SiCMOSFET器件阅值电压温度特性的诸因素。通过解析式计算和MEDICI软件模拟，得到了多种因素共同作用下的器件闪值电压的温度特性。研究表明，体内杂质的不完全离化、表面空间电荷层中的杂质离化程度和特定分布的界面电荷，对阅值电压的温度特性有显著的影响。     

超高压工作电解液闪火电压提升机理及应用研究

电解液是铝电解电容器的关键组元,其性能特征直接决定了电容器的性能发挥。本文通过傅里叶红外光谱(IR)、阳极氧化曲线等研究了电解液电导率和水含量对铝电解电容器用羧酸铵盐体系电解液性能的影响,并探讨了相关作用机理。研究结果表明:电解液电导率是影响闪火电压大小的重要因素,闪火电压随电导率的降低呈非线性增加,电导率降低到(500~700)×10~(–6) S/cm时,闪火电压可高达650 V以上;水含量仅影响电解液的氧化效率,水含量越高,其氧化效率越高。通过将电导率调控至668×10~(–6)S/cm,水含量(质量分数)调控至3.62%,开发了适用于600 V超高压铝电解电容器的电解液,且电容器85℃寿命长达3000 h。     

含磷化合物对电解液形成曲线的影响

通过对各种含磷化合物形成曲线的比较,研究了含磷化合物对电解液闪火电压的影响。着重对比了含水和非含水体系形成曲线的差异,就曲线的形成原因进行了分析。     

四价添加剂掺杂ZnO压敏电阻器的性能

基于理论研究的结果,用固相法研究了四价添加剂对ZnO压敏电阻器性能的影响和作用机理.结果表明,优选的四价添加剂掺杂能有效降低ZnO晶粒的电阻率和残压比;通过提高晶界氧的电离度,可使晶界势垒高度上升,提高了ZnO的压敏电压梯度.     

On multiplication and avalanche breakdown in exponentially retrograded silicon P-N junctions

An analysis of avalanche breakdown in exponentially retrograded p-n junctions results in simple criteria for avoiding breakdown in such structures. Breakdown voltages are shown to be extremely dependent on the surface concentration and grading constant of the retrograded region. The effect of background resistivity on breakdown is also analyzed. Unusual saturation effects in the multiplication voltage curves of retrograded p-n diodes are predicted theoretically. Experimental results point towards a confirmation of this theory.     

Design optimization of high breakdown voltage AlGaN-GaN power HEMT on an insulating substrate for R/sub ON/A-V/sub B/ tradeoff characteristics

High breakdown voltage AlGaN-GaN power high-electron mobility transistors (HEMTs) on an insulating substrate were designed for the power electronics application. The field plate structure was employed for high breakdown voltage. The field plate length, the insulator thickness and AlGaN layer doping concentration were design parameters for the breakdown voltage. The optimization of the contact length and contact resistivity reduction were effective to reduce the specific on-resistance. The tradeoff characteristics between the on-resistance and the breakdown voltage can be improved by the optimization of the above design parameters, and the on-resistance can be estimated to be about 0.6 m/spl Omega//spl middot/cm/sup 2/ for the breakdown voltage of 600 V. This on-resistance is almost the same as that for the device on a conductive substrate.     

Avalanche breakdown characteristics of punchthrough diodes

A theoretical investigation of the avalanche breakdown characteristics of punchthrough diodes is carried out and a comparison made with the nonpunchthrough diodes. It is shown that the former have harder breakdown characteristics and a sharper knee for a given breakdown voltage. In addition, punchthrough diodes have a lower temperature coefficient of breakdown voltage, a lower space-charge resistance, a negligible sensitivity of breakdown voltage to resistivity striations in single crystal wafers, and breakdown due to avalanche mechanism up to lower breakdown voltages. Though these positive features suggest that punchthrough diodes are superior in performance to nonpunchthrough diodes for applications such as voltage regulators etc., the final assessment will depend on a more critical evaluation of the reliability against burn out and instability.     

薄型双漂移区高压器件新结构的耐压分析

提出与CMOS工艺兼容的薄型双漂移区(TD)高压器件新结构.通过表面注入掺杂浓度较高的N-薄层,形成不同电阻率的双漂移区结构,改变漂移区电流线分布,降低导通电阻;沟道区下方采用P离子注入埋层来减小沟道区等位线曲率,在表面引入新的电场峰,改善横向表面电场分布,提高器件击穿电压.结果表明:TD LDMOS较常规结构击穿电压提高16%,导通电阻下降31%.     

元素V掺杂对ZnO压敏效应的影响机理研究

研究了掺杂不同V_2O_5对ZnO陶瓷压敏特性的影响.实验表明,ZnO压敏电压随V元素掺杂量增加而随之升高,非线性系数随元素V掺杂量增加而先增大后减小,漏电流先减小后增大.分析认为,V元素掺杂对ZnO压敏材料电性能的影响不仅与电子的能级有关,与其自旋特性也紧密相关.ZnO陶瓷中掺杂的V元素在晶界偏析,其V元素都会产生局域磁矩,会对与其取向不同的自旋电子产生强的散射,这样可增大ZnO压敏陶瓷电阻率,使晶界产生非线性特性.     

Calculation of the diffusion curvature related avalanche breakdown in high-voltage planar p-n junctions

Avalanche multiplication calculations are performed in high-voltage planar p-n junctions to determine breakdown voltage limitations imposed by curvature effects. The issue of choice of ionization coefficient for avalanche multiplication is discussed. From the calculations, a series of design curves and equations are generated which relate the breakdown voltage and peak electric field to those of an ideal junction of the same doping profile, the critical parameters being the substrate doping concentration, the diffusion profile, and the ratio of the radius of curvature to the substrate depletion width for the ideal one-dimensional case. With appropriate distance normalization, these curves and equations can be reduced to a single curve and a single equation. The agreement between theory and experiment is consistently good provided the correct ionization coefficients are used in the theory.     

Theory of conduction in polysilicon: Drift-diffusion approach in crystalline-amorphous-crystalline semiconductor system—Part I: Small signal theory

A theory of conduction in polycrystalline silicon is presented. The present approach fundamentally differs from previous theories in its treatment of the grain boundary. This theory regards the grain boundary as amorphous semiconductor in equilibrium contact with crystalline grain. The model explains the electrical properties of polysilicon in terms of the electronic and structural parameters of the material and is in excellent agreement with the experimental data. The formulation is applicable for arbitrary grain size, temperature, doping concentration, and applied voltage. Specifically, the temperature dependence of resistivity is explained in terms of conduction channels inherent in the amorphous grain boundary. Also, this paper explicitly compares the previous emission theories with the present model in terms of voltage partition scheme and I - V predictions.     

低压ZnO压敏陶瓷晶界特性的研究

借助 HP4192 A低频阻抗分析仪 ,分析了低压 Zn O压敏陶瓷的 C- V特性及介电和损耗特性、添加物对Zn O压敏瓷晶界电学特性的影响。探讨了热处理气氛对 Zn O晶粒边界电性能的作用机理。实验结果表明 :Na+ 掺杂量增加时 ,施主浓度基本保持不变 ,而势垒高度、界面态密度和耗尽层宽度增加 ;在空气中退火 ,样品的施主浓度减少 ,势垒高度降低 ;在 Ar气中退火样品的施主浓度基本保持不变 ,而势垒高度下降较大 ;在音频范围内 ,Zn O压敏瓷具有很高的介电常数 (εr约 130 0 ) ;在 10 5～ 10 6 Hz范围内 ,εr下降较明显 ,与此对应 ,介质损耗角正切 tgδ在 10 5～ 10 6 Hz范围内出现一个峰值 ,该峰具有扩展的德拜驰豫峰特征     

A power MOSFET design methodology considering epi parametervariations

An optimum design method for power MOSFETs that maximizes the number of good dies is presented. From the device specification of the maximum voltage and current given, the target design value of the breakdown voltage required for the maximum number of good dies it determined by considering the variations of parameters such as thickness and resistivity of the epitaxial layer, chip area, and defect density during the manufacturing process. In the case of a 650-V/5-A power MOSFET, the optimum design target of the breakdown voltage is found to be 710 V, which gives 1213 good dies from a 5-in wafer with the defect density of 5/cm² when ideal junction termination is assumed. This maximum number of good dies is reduced to 855 in practice due to the nonideal junction termination with 80% of the ideal breakdown voltage, resulting in the target design voltage of 890 V