Design of Wideband Fractional-Order Differentiator Using Interlaced Sampling Method

In this paper, the design of a wideband digital fractional-order differentiator (FOD) is investigated. First, conventional FOD designs are reviewed, and the reconstruction formula of the interlaced sampling method is used to design the proposed wideband FOD by index substitution and the Grünwald–Letnikov fractional derivative. Because a closed-form window design is obtained, the filter coefficients are easily computed. Then, the weighted least squares and convex optimization methods are applied to design non-sparse digital FODs that are optimal in the least squares or min–max sense. Next, the iterative hard thresholding and orthogonal matching pursuit methods are used to design sparse digital FODs to reduce the implementation complexity. Finally, several numerical examples are presented to show that the proposed FODs have smaller design errors in the high-frequency band than conventional digital FODs that do not use the auxiliary interlaced sampling signal.     

Closed-Form Design of Digital IIR Integrators Using Numerical Integration Rules and Fractional Sample Delays

In this paper, the numerical integration rules and fractional sample delays will be used to obtain the closed-form design of infinite-impulse response (IIR) digital integrators. There are two types of numerical integration rules to be investigated. One is Newton-Cotes quadrature rule, the other is Gauss-Legendre integration rule. Although the proposed IIR digital integrators will involve the implementation of fractional sample delays, this problem is easily solved by applying well-documented design techniques of the finite-impulse response Lagrange and IIR allpass fractional delay filters. Several design examples are illustrated to demonstrate the effectiveness of the proposed method     

Digital integrator design using Simpson rule and fractional delay filter

The IIR digital integrator is designed by using the Simpson integration rule and fractional delay filter. To improve the design accuracy of a conventional Simpson IIR integrator at high frequency, the sampling interval is reduced from T to 0.5T. As a result, a fractional delay filter needed to be designed in the proposed Simpson integrator. However, this problem can be solved easily by applying well-documented design techniques of the FIR and all-pass fractional delay filters. Several design examples are illustrated to demonstrate the effectiveness of the proposed method.     

Efficient Design of Discrete Fractional-Order Differentiators Using Nelder–Mead Simplex Algorithm

Applications of fractional-order operators are growing rapidly in various branches of science and engineering as fractional-order calculus realistically represents the complex real-world phenomena in contrast to the integer-order calculus. This paper presents a novel method to design fractional-order differentiator (FOD) operators through optimization using Nelder–Mead simplex algorithm (NMSA). For direct discretization, Al-Alaoui operator has been used. The numerator and the denominator terms of the resulting transfer function are further expanded using binomial expansion to a required order. The coefficients of z-terms in the binomial expansions are used as the starting solutions for the NMSA, and optimization is performed for a minimum magnitude root-mean-square error between the ideal and the proposed operator magnitude responses. To demonstrate the performance of the proposed technique, six simulation examples for fractional orders of half, one-third, and one-fourth, each approximated to third and fifth orders, have been presented. Significantly improved magnitude responses have been obtained as compared to the published literature, thereby making the proposed method a promising candidate for the design of discrete FOD operators.     

Fractional delay compensated discrete-time SMC for networked control system

Time-varying network induced delay in the communication channel severely affects the performance of closed loop network control systems. In this paper, a novel idea of compensating the fractional time varying communication delay in the sliding surface is presented. The fractional time delay in the sensor to controller and controller to actuator channel is approximated using the Thiran approximation technique to design the sliding surface. A discrete-time sliding mode control law is derived using the proposed surface that compensates fractional time delay in sensor to controller and controller to actuator channels for uncertain network control systems. The sufficient condition for closed loop stability of the system is derived using the Lyapunov function. The efficacy of the proposed strategy is supported by the simulation results.     

低复杂度的可变分数时延滤波器设计

为实现低复杂度、高精度的可变分数时延滤波器设计,该文提出一种截止频率可控的高效设计法。该方法将全相位滤波器的解析设计与三次样条插值和泰勒级数展开相结合,既可以通过设置时延参数精确地调整滤波器的分数时延,又可以通过设置截止频率参数快速配置Farrow结构中各子滤波器的抽头系数,从而灵活地调整滤波器的截止频率。仿真实验表明,所提方法适用于设计具有中、低截止频率的可变分数时延滤波器,其设计复杂度相比于现有的加权最小二乘设计法低1个数量级。     

Design of 1-D Stable Variable Fractional Delay IIR Filters

In this brief, a two-stage approach for the design of 1-D stable variable fractional delay infinite-impulse response (IIR) digital filters is proposed. In the first stage, a set of fixed delay stable IIR filters are designed by minimizing a quadratic objective function, which is defined by integrating error criterion with IIR filter stability constraint condition. Then, the final design is determined by fitting each of the fixed delay filter coefficients as a 1-D polynomial. Two design examples are given to show the effectiveness of the proposed design method     

A simple and efficient design of variable fractional delay FIR filters

In this paper, a simple and efficient approach for designing one-dimensional variable fractional delay finite impulse response digital filters is proposed. Two matrix equations, based respectively on the weighted least-squares function of the optimum fixed fractional delay filter and the filter coefficient polynomial fitting, are formulated in tandem to form the design algorithm, which only has the computation complexity comparable with that of designing fixed finite impulse response digital filters. A design example is also given to justify the effectiveness and advantages of the proposed design method.     

Identification and tuning fractional order proportional integral controllers for time delayed systems with a fractional pole

First order plus time delay model is widely used to model systems with S-shaped reaction curve. Its generalized form is the model with a single fractional pole replacing the integer order pole, which is believed to better characterize the reaction curve. In this paper, using time delayed system model with a fractional pole as the starting point, fractional order controllers design for this class of fractional order systems is investigated. Integer order PID and fractional order PI and [PI] controllers are designed and compared for these class of systems. The simulation comparison between PID controller and fractional order PI and [PI] controllers show the advantages of the properly designed fractional order controllers. Experimental results on a heat flow platform are presented to validate the proposed design method in this paper.     

Efficient tunable IIR and allpass filter structures

A new recursive filter structure is proposed which can be controlled on-line using a single parameter. The structure can be used for interpolation in timing synchronisation of digital communications receivers. The technique is illustrated with an example of the implementation of a tunable fractional delay allpass filter using the Thiran design technique     

基于分数低阶矩的非整数时间延迟估计方法

依据信号的噪声特性和分数低阶矩理论,提出一种基于最小平均p范数的非整数时间延迟估计方法(称为LMPFTDE算法)。该算法是对直接估计非整数采样间隔的时间延迟估计算法(ETDGE)的广义化,运用最小分散系数准则,通过使误差的p阶矩最小得到非整数时间延迟估计值。理论分析和计算机仿真结果都表明该方法不仅可以在高斯噪声环境下工作,而且在脉冲噪声下也具有良好的健壮性。     

一种实时语音采样率转换的延迟线算法

提出了一种有效的FIR时变分数延迟线算法,可用于实时语音采样率转换.算法中采用离散正交多项式插值,使得在相同逼近阶下插值平方误差最小;并讨论了利用延迟线实现延迟的方法.Matalb仿真结果表明了所提算法的有效性.     

Optimal Design of All-Pass Variable Fractional-Delay Digital Filters

This paper presents a computational method for the optimal design of all-pass variable fractional-delay (VFD) filters aiming to minimize the squared error of the fractional group delay subject to a low level of squared error in the phase response. The constrained optimization problem thus formulated is converted to an unconstrained least-squares (LS) optimization problem which is highly nonlinear. However, it can be approximated by a linear LS optimization problem which in turn simply requires the solution of a linear system. The proposed method can efficiently minimize the total error energy of the fractional group delay while maintaining constraints on the level of the error energy of the phase response. To make the error distribution as flat as possible, a weighted LS (WLS) design method is also developed. An error weighting function is obtained according to the solution of the previous constrained LS design. The maximum peak error is then further reduced by an iterative updating of the error weighting function. Numerical examples are included in order to compare the performance of the filters designed using the proposed methods with those designed by several existing methods.     

Using fractional delay to control the magnitudes and phases of integrators and differentiators

The use of fractional delay to control the magnitudes and phases of integrators and differentiators has been addressed. Integrators and differentiators are the basic building blocks of many systems. Often applications in controls, wave-shaping, oscillators and communications require a constant 90deg phase for differentiators and -90deg phase for integrators. When the design neglects the phase, a phase equaliser is often needed to compensate for the phase error or a phase lock loop should be added. Applications to the first-order, Al-Alaoui integrator and differentiator are presented. A fractional delay is added to the integrator leading to an almost constant phase response of -90deg. Doubling the sampling rate improves the magnitude response. Combining the two actions improves both the magnitude and phase responses. The same approach is applied to the differentiator, with a fractional sample advance leading to an almost constant phase response of 90deg. The advance is, in fact, realised as the ratio of two delays. Filters approximating the fractional delay, the finite impulse response (FIR) Lagrange interpolator filters and the Thiran allpass infinite impulse response (IIR) filters are employed. Additionally, a new hybrid filter, a combination of the FIR Lagrange interpolator filter and the Thiran allpass IIR filter, is proposed. Methods to reduce the approximation error are discussed.     

Robustness evaluation of fractional order control for varying time delay processes

In this paper, we investigate the robustness of a methodology to design fractional order PI controllers combined with Smith Predictors, for varying time delay processes. To overcome the drawback of possible instability associated with Smith Predictor control structures, mainly due to the changes in the time delay, the design focuses on ensuring robustness of the closed loop system against time delay uncertainties. The proposed method is based on time-domain performance specifications??more accessible to the process engineer, rather than the more abstract notions related to the frequency domain. A second advantage of the proposed method relies on additional robustness to plant uncertainties, achieved by maximizing open-loop gain margin. The convergence problems associated with optimization techniques, previously used in fractional order controller designs, are eliminated by an iterative procedure in computing the gain margin. The simulation example provided demonstrates the efficiency of the proposed method, in comparison to classical integer order PI controller.     

Splitting the unit delay [FIR/all pass filters design]

A fractional delay filter is a device for bandlimited interpolation between samples. It finds applications in numerous fields of signal processing, including communications, array processing, speech processing, and music technology. We present a comprehensive review of FIR and allpass filter design techniques for bandlimited approximation of a fractional digital delay. Emphasis is on simple and efficient methods that are well suited for fast coefficient update or continuous control of the delay value. Various new approaches are proposed and several examples are provided to illustrate the performance of the methods. We also discuss the implementation complexity of the algorithms. We focus on four applications where fractional delay filters are needed: synchronization of digital modems, incommensurate sampling rate conversion, high-resolution pitch prediction, and sound synthesis of musical instruments     

Wideband Parallel-Strip Bandpass Filter Using Phase Inverter

A new wideband parallel-strip bandpass filter using phase inverter with stubs is proposed. With the wideband phase inverter in the parallel-strip line structure, the measured fractional passband bandwidth is 123% with a flat group delay response. Also, over 90% impedance bandwidth is obtained for the return loss higher than 20 dB. The theoretical simulation, electromagnetic simulation, and measured results show good agreement with this proposed design.      

LTE中变速率FIR滤波器的FPGA实现

基于ALTERA公司提供高级数字信号处理模块,对LTE通信系统的信号采样率进行变速率滤波。由于FIR滤波器存在较大的群时延和硬件时延,信号经过滤波后有可能产生分数时延,使相位发生旋转。提出了一种新的时延补偿方法,对每一级滤波器进行时延补偿。板级测试结果表明,基带信号通过该滤波器后,星座图恢复完好,EVM小于1%,且与Matlab定点仿真结果一致。     

FIR, Allpass, and IIR Variable Fractional Delay Digital Filter Design

This paper presents two-step design methodologies and performance analyses of finite-impulse response (FIR), allpass, and infinite-impulse response (IIR) variable fractional delay (VFD) digital filters. In the first step, a set of fractional delay (FD) filters are designed. In the second step, these FD filter coefficients are approximated by polynomial functions of FD. The FIR FD filter design problem is formulated in the peak-constrained weighted least-squares (PCWLS) sense and solved by the projected least-squares (PLS) algorithm. For the allpass and IIR FD filters, the design problem is nonconvex and a global solution is difficult to obtain. The allpass FD filters are directly designed as a linearly constrained quadratic programming problem and solved using the PLS algorithm. For IIR FD filters, the fixed denominator is obtained by model reduction of a time-domain average FIR filter. The remaining numerators of the IIR FD filters are designed by solving linear equations derived from the orthogonality principle. Analyses on the relative performances indicate that the IIR VFD filter with a low-order fixed denominator offers a combination of the following desirable properties including small number of denominator coefficients, lowest group delay, easily achievable stable design, avoidance of transients due to nonvariable denominator coefficients, and good overall magnitude and group delay performances especially for high passband cutoff frequency ( ges 0.9pi) . Filter examples covering three adjacent ranges of wideband cutoff frequencies [0.95, 0.925, 0.9], [0.875, 0.85, 0.825], and [0.8, 0.775, 0.75] are given to illustrate the design methodologies and the relative performances of the proposed methods.     

深亚微米工艺中场氧器件静电防护能力的研究

研究了FOD在输入、输出和电源箝位部分ESD的工作特点,在0.18μm5V EEPROM CMOS工艺下流片、测试并分析了针对输入、输出和电源箝位的三种主流的ESD保护FOD器件,通过传输线脉冲测试仪的测量,重点分析了特征尺寸对器件ESD特性的影响及其设计方法。结果表明:影响FOD的ESD性能的主要因素是沟道长度、漏极长度和漏极接触孔到有源区的距离;增加沟道长,可适当提高FOD的ESD开启电压,但是会降低ESD防护性能;增加FOD的漏极长度和漏极接触孔到有源区的距离,可以提高FOD的ESD防护性能。提出了一种新型的浮体多晶硅岛屿型FOD结构,该结构不但结构简单,而且具有良好的ESD防护性能。