Sub‐3 V ZnO Electrolyte‐Gated Transistors and Circuits with Screen‐Printed and Photo‐Crosslinked Ion Gel Gate Dielectrics: New Routes to Improved Performance

A facile, high‐resolution patterning process is introduced for fabrication of electrolyte‐gated transistors (EGTs) and circuits using a photo‐crosslinkable ion gel and stencil‐based screen printing. The photo‐crosslinkable gel is based on a triblock copolymer incorporating UV‐sensitive terminal azide functionality and a common ionic liquid. Using this material in conjunction with conventional photolithography and stenciling techniques, well‐defined 0.5–1 μm thick ion gel films are patterned on semiconductor channels as narrow as 10 μm. The resulting n‐type ZnO EGTs display high electron mobility (>2 cm² Vs^?1) and on/off current ratios (>10⁵). Further, EGT‐based inverters exhibit static gains >23 at supply voltages below 3 V, and five‐stage EGT ring oscillator circuits display dynamic propagation delays of 50 μs per stage. In general, the screen printing and photo‐crosslinking strategy provides a clean room‐compatible method to fabricate EGT circuits with improved sensitivity (gain) and computational power (gain × oscillating frequency). Detailed device analysis indicates that significantly shorter delay times, of order 1 μs, can be obtained by improving the ion gel conductance.     

Cellulose‐Based Ionogels for Paper Electronics

A new class of biofriendly ionogels produced by gelation of microcellulose thin films with tailored 1‐ethyl‐3‐methylimidazolium methylphosphonate ionic liquids are demonstrated. The cellulose ionogels show promising properties for application in flexible electronics, such as transparency, flexibility, transferability, and high specific capacitances of 5 to 15 μF cm^?2. They can be laminated onto any substrate such as multilayer‐coated paper and act as high capacitance dielectrics for inorganic (spray‐coated ZnO and colloidal ZnO nanorods) and organic (poly[3‐hexylthiophene], P3HT) electrolyte‐gated field‐effect transistors (FETs), that operate at very low voltages (<2 V). Field‐effect mobilities in ionogel‐gated spray‐coated ZnO FETs reach 75 cm² V^?1 s^?1 and a typical increase of mobility with decreasing specific capacitance of the ionogel is observed. Solution‐processed, colloidal ZnO nanorods and laminated cellulose ionogels enable the fabrication of the first electrolyte‐gated, flexible circuits on paper, which operate at bending radii down to 1.1 mm.     

Reusable Cellulose‐Based Hydrogel Sticker Film Applied as Gate Dielectric in Paper Electrolyte‐Gated Transistors

A new concept for reusable eco‐friendly hydrogel electrolytes based on cellulose is introduced. The reported electrolytes are designed and engineered through a simple, fast, low‐cost, and eco‐friendly dissolution method of microcrystalline cellulose at low temperature using an aqueous LiOH/urea solvent system. The cellulose solution is combined with carboxymethyl cellulose, followed by the regeneration and simultaneous ion incorporation. The produced free standing cellulose‐based electrolyte films exhibit interesting properties for application in flexible electrochemical devices, such as biosensors or electrolyte‐gated transistors (EGTs), because of their high specific capacitances (4–5 µF cm^?2), transparency, and flexibility. Indium–gallium–zinc‐oxide EGTs on glass with laminated cellulose‐based hydrogel electrolytes (CHEs) as the gate dielectric are produced presenting a low working voltage (<2 V), showing an on–off current ratio (I _on/off) of 10⁶, a subthreshold swing lower than 0.2 V dec^?1, and saturation mobility (μ_Sat) reaching 26 cm² V^?1 s^?1. The flexible CHE‐gated transistors on paper are also demonstrated, which operate at switching frequencies up to 100 Hz. Combining the flexibility of the EGTs on paper with the reusability of the developed CHEs is a breakthrough toward biodegradable advanced functional materials allied with disposable/recyclable and low‐cost electronic devices.     

Insulator Polarization Mechanisms in Polyelectrolyte‐Gated Organic Field‐Effect Transistors

Electrolyte‐gated organic field‐effect transistors (OFETs) hold promise for robust printed electronics operating at low voltages. The polarization mechanism of thin solid electrolyte films, the gate insulator in such OFETs, is still unclear and appears to limit the transient current characteristics of the transistors. Here, the polarization response of a thin proton membrane, a poly(styrenesulfonic acid) film, is controlled by varying the relative humidity. The formation of the conducting transistor channel follows the polarization of the polyelectrolyte, such that the drain transient current characteristics versus the time are rationalized by three different polarization mechanisms: the dipolar relaxation at high frequencies, the ionic relaxation (migration) at intermediate frequencies, and the electric double‐layer formation at the polyelectrolyte interfaces at low frequencies. The electric double layers of polyelectrolyte capacitors are formed in ～1 µs at humid conditions and an effective capacitance per area of 10 µF cm^?2 is obtained at 1 MHz, thus suggesting that this class of OFETs might operate at up to 1 MHz at 1 V.     

High‐Transconductance Organic Thin‐Film Electrochemical Transistors for Driving Low‐Voltage Red‐Green‐Blue Active Matrix Organic Light‐Emitting Devices

Switching and control of efficient red, green, and blue active matrix organic light‐emitting devices (AMOLEDs) by printed organic thin‐film electrochemical transistors (OETs) are demonstrated. These all‐organic pixels are characterized by high luminance at low operating voltages and by extremely small transistor dimensions with respect to the OLED active area. A maximum brightness of ≈900 cd m^?2 is achieved at diode supply voltages near 4 V and pixel selector (gate) voltages below 1 V. The ratio of OLED to OET area is greater than 100:1 and the pixels may be switched at rates up to 100 Hz. Essential to this demonstration are the use of a high capacitance electrolyte as the gate dielectric layer in the OETs, which affords extremely large transistor transconductances, and novel graded emissive layer (G‐EML) OLED architectures that exhibit low turn‐on voltages and high luminescence efficiency. Collectively, these results suggest that printed OETs, combined with efficient, low voltage OLEDs, could be employed in the fabrication of flexible full‐color AMOLED displays.     

Printable Organic‐Inorganic Nanoscale Multilayer Gate Dielectrics for Thin‐Film Transistors Enabled by a Polymeric Organic Interlayer

Here, a new approach to the layer‐by‐layer solution‐processed fabrication of organic/inorganic hybrid self‐assembled nanodielectrics (SANDs) is reported and it is demonstrated that these ultrathin gate dielectric films can be printed. The organic SAND component, named P‐PAE, consists of polarizable π‐electron phosphonic acid‐based units bound to a polymeric backbone. Thus, the new polymeric SAND (PSAND) can be fabricated either by spin‐coating or blade‐coating in air, by alternating P‐PAE, a capping reagent layer, and an ultrathin ZrOx layer. The new PSANDs thickness vary from 6 to 15 nm depending on the number of organic‐ZrOx bilayers, exhibit tunable film thickness, well‐defined nanostructures, large electrical capacitance (up to 558 nF cm^?2), and good insulating properties (leakage current densities as low as 10^?6 A cm^?2). Organic thin‐film transistors that are fabricated with representative p‐/n‐type organic molecular/polymeric semiconducting materials, function well at low voltages (<3.0 V). Furthermore, flexible TFTs fabricated with PSAND exhibit excellent mechanical flexibility and good stress stability, offering a promising route to low operating voltage flexible electronics. Finally, printable PSANDs are also demonstrated and afford TFTs with electrical properties comparable to those achieved with the spin‐coated PSAND‐based devices.     

Printed and Electrochemically Gated,High‐Mobility,Inorganic Oxide Nanoparticle FETs and Their Suitability for High‐Frequency Applications

Solution‐processed or printed n‐channel field‐effect transistors (FETs) with high performance are not reported very often in the literature due to the scarcity of high‐mobility n‐type organic semiconductors. On the other hand, low‐temperature processed n‐channel metal oxide semiconductor (NMOS) transistors from electron conducting inorganic‐oxide nanoparticles show reduced‐performance and low mobility because of large channel roughness at the channel‐dielectric interface. Here, a method to produce ink‐jet printed high performance NMOS transistor devices using inorganic‐oxide nanoparticles as the transistor channel in combination with a 3D electrochemical gating (EG) via printed composite solid polymer electrolytes is presented. The printed FETs produced show a device mobility value in excess of 5 cm² V^?1 s^?1, even though the root mean square (RMS) roughness of the nanoparticulate channel exceeds 15 nm. Extensive studies on the frequency dependent polarizability of composite polymer electrolyte capacitors show that the maximum attainable speed in such printed, long channel transistors is not limited by the ionic conductivity of the electrolytes. Therefore, the approach of combining printable, high‐quality oxide nanoparticles and the composite solid polymer electrolytes, offers the possibility to fully utilize the large mobility of oxide semiconductors to build all‐printed and high‐speed devices. The high polarizability of printable polymer electrolytes brings down the drive voltages to ≤1 V, making such FETs well‐suited for low‐power, battery compatible circuitry.     

High‐Performance,Low‐Operating‐Voltage Organic Field‐Effect Transistors with Low Pinch‐Off Voltages

Organic field‐effect transistors suffer from ultra‐high operating voltages in addition to their relative low mobility. A general approach to low‐operating‐voltage organic field‐effect transistors (OFETs) using donor/acceptor buffer layers is demonstrated. P‐type OFETs with acceptor molecule buffer layers show reduced operating voltages (from 60–100 V to 10–20 V), with mobility up to 0.19 cm² V^?1 s^?1 and an on/off ratio of 3 × 10⁶. The subthreshold slopes of the devices are greatly reduced from 5–12 V/decade to 1.68–3 V/decade. This favorable combination of properties means that such OFETs can be operated successfully at voltages below 20 V (|V_DS| ≤ 20 V, |V_GS| ≤ 20 V). This method also works for n‐type semiconductors. The reduced operating voltage and low pinch‐off voltage contribute to the improved ordering of the polycrystalline films, reduced grain boundary resistance, and steeper subthreshold slopes.     

3D Micro‐Extrusion of Graphene‐based Active Electrodes: Towards High‐Rate AC Line Filtering Performance Electrochemical Capacitors

A facile one‐step printing process by 3D micro‐extrusion affording binder‐free thermally reduced graphene oxide (TRGO) based electrochemical capacitors (ECs) that display high‐rate performance is presented. Key intermediates are binder‐free TRGO dispersion printing inks with concentrations up to 15 g L^?1. This versatile printing technique enables easy fabrication of EC electrodes, useful in both aqueous and non‐aqueous electrolyte systems. The as‐prepared TRGO material with high specific surface area (SSA) of 593 m² g^?1 and good electrical conductivity of ≈16 S cm^?1 exhibits impressive charge storage performances. At 100 and 120 Hz, ECs fabricated with TRGO show time constants of 2.5 ms and 2.3 ms respectively. Very high capacitance values are derived at both frequencies ranging from 3.55 mF cm^?2 to 1.76 mF cm^?2. Additionally, these TRGO electrodes can be charged and discharged at very high voltage scan rates up to 15 V s^?1 yielding 4 F cm^?3 with 50% capacitance retention. Electrochemical performance of TRGO electrodes in electrolyte containing tetraethyl ammonium tetrafluoroborate and acetonitrile (TEABF4‐ACN) yields high energy density of 4.43 mWh cm^?3 and power density up to 42.74 kW cm^?3, which is very promising for AC line filtering application and could potentially substitute state of the art electrolytic capacitor technology.     

Effects of the Ionic Currents in Electrolyte‐gated Organic Field‐Effect Transistors

Polyelectrolytes are promising materials as gate dielectrics in organic field‐effect transistors (OFETs). Upon gate bias, their polarization induces an ionic charging current, which generates a large double layer capacitor (10–500 µF cm^?2) at the semiconductor/electrolyte interface. The resulting transistor operates at low voltages (<1 V) and its conducting channel is formed in ～50 µs. The effect of ionic currents on the performance of the OFETs is investigated by varying the relative humidity of the device ambience. Within defined humidity levels and potential values, the water electrolysis is negligible and the OFETs performances are optimum.     

Printed Neuromorphic Devices Based on Printed Carbon Nanotube Thin‐Film Transistors

Hardware implementation of artificial synapse/neuron by electronic/ionic hybrid devices is of great interest for brain‐inspired neuromorphic systems. At the same time, printed electronics have received considerable interest in recent years. Here, printed dual‐gate carbon‐nanotube thin‐film transistors with very high saturation field‐effect mobility (≈269 cm² V^?1 s^–1) are proposed for artificial synapse application. Some important synaptic behaviors including paired‐pulse facilitation (PPF), and signal filtering characteristics are successfully emulated in such printed artificial synapses. The PPF index can be modulated by spike width and spike interval of presynaptic impulse voltages. The results present a printable approach to fabricate artificial synaptic devices for neuromorphic systems.     

Optimal Structure for High‐Performance and Low‐Contact‐Resistance Organic Field‐Effect Transistors Using Contact‐Doped Coplanar and Pseudo‐Staggered Device Architectures

A low contact resistance achieved on top‐gated organic field‐effect transistors by using coplanar and pseudo‐staggered device architectures, as well as the introduction of a dopant layer, is reported. The top‐gated structure effectively minimizes the access resistance from the contact to the channel region and the charge‐injection barrier is suppressed by doping of iron(III)trichloride at the metal/organic semiconductor interface. Compared with conventional bottom‐gated staggered devices, a remarkably low contact resistance of 0.1–0.2 kΩ cm is extracted from the top‐gated devices by the modified transfer line method. The top‐gated devices using thienoacene compound as a semiconductor exhibit a high average field‐effect mobility of 5.5–5.7 cm² V^?1 s^?1 and an acceptable subthreshold swing of 0.23–0.24 V dec^?1 without degradation in the on/off ratio of ≈10⁹. Based on these experimental achievements, an optimal device structure for a high‐performance organic transistor is proposed.     

Fully Transparent p‐MoTe2 2D Transistors Using Ultrathin MoOx/Pt Contact Media for Indium‐Tin‐Oxide Source/Drain

Since transition metal dichalcogenide (TMD) semiconductors are found as 2D van der Waals materials with a discrete energy bandgap, many 2D‐like thin field effect transistors (FETs) and PN diodes are reported as prototype electrical and optoelectronic devices. As a potential application of display electronics, transparent 2D FET devices are also reported recently. Such transparent 2D FETs are very few in report, yet no p‐type channel 2D‐like FETs are seen. Here, 2D‐like thin transparent p‐channel MoTe₂ FETs with oxygen (O₂) plasma‐induced MoO_x/Pt/indium‐tin‐oxide (ITO) contact are reported for the first time. For source/drain contact, 60 s short O₂ plasma and ultrathin Pt‐deposition processes on MoTe₂ surface are sequentially introduced before ITO thin film deposition and patterning. As a result, almost transparent 2D FETs are obtained with a decent mobility of ≈5 cm² V^?1 s^?1, a high ON/OFF current ratio of ≈10⁵, and 70% transmittance. In particular, for normal MoTe₂ FETs without ITO, O₂ plasma process greatly improves the hole injection efficiency and device mobility (≈60 cm² V^?1 s^?1), introducing ultrathin MoO_x between Pt source/drain and MoTe₂. As a final device application, a photovoltaic current modulator, where the transparent FET stably operates as gated by photovoltaic effects, is integrated.     

Large‐Area Chemical Vapor Deposited MoS2 with Transparent Conducting Oxide Contacts toward Fully Transparent 2D Electronics

2D semiconductors are poised to revolutionize the future of electronics and photonics, much like transparent oxide conductors and semiconductors have revolutionized the display industry. Herein, these two types of materials are combined to realize fully transparent 2D electronic devices and circuits. Specifically, a large‐area chemical vapor deposition process is developed to grow monolayer MoS₂ continuous films, which are, for the first time, combined with transparent conducting oxide (TCO) contacts. Transparent conducting aluminum doped zinc oxide contacts are deposited by atomic layer deposition, with composition tuning to achieve optimal conductivity and band‐offsets with MoS₂. The optimized process gives fully transparent TCO/MoS₂ 2D electronics with average visible‐range transmittance of 85%. The transistors show high mobility (4.2 cm² V^?1 s^?1), fast switching speed (0.114 V dec^?1), very low threshold voltage (0.69 V), and large switching ratio (4 × 10⁸). To our knowledge, these are the lowest threshold voltage and subthreshold swing values reported for monolayer chemical vapor deposition MoS₂ transistors. The transparent inverters show fast switching properties with a gain of 155 at a supply voltage of 10 V. The results demonstrate that transparent conducting oxides can be used as contact materials for 2D semiconductors, which opens new possibilities in 2D electronic and photonic applications.     

Controllable Shifts in Threshold Voltage of Top‐Gate Polymer Field‐Effect Transistors for Applications in Organic Nano Floating Gate Memory

Organic field‐effect transistor (FET) memory is an emerging technology with the potential to realize light‐weight, low‐cost, flexible charge storage media. Here, solution‐processed poly[9,9‐dioctylfluorenyl‐2,7‐diyl]‐co‐(bithiophene)] (F8T2) nano floating gate memory (NFGM) with a top‐gate/bottom‐contact device configuration is reported. A reversible shift in the threshold voltage (V_Th) and reliable memory characteristics was achieved by the incorporation of thin Au nanoparticles (NPs) as charge storage sites for negative charges (electrons) at the interface between polystyrene and cross‐linked poly(4‐vinylphenol). The F8T2 NFGM showed relatively high field‐effect mobility (µ_FET) (0.02 cm² V^?1 s^?1) for an amorphous semiconducting polymer with a large memory window (ca. 30 V), a high on/off ratio (more than 10⁴) during writing and erasing with an operation voltage of 80 V of gate bias in a relatively short timescale (less than 1 s), and a retention time of a few hours. This top‐gated polymer NFGM could be used as an organic transistor memory element for organic flash memory.     

Air‐Stable n‐Type Organic Field‐Effect Transistors Based on Carbonyl‐Bridged Bithiazole Derivatives

An electronegative conjugated compound composed of a newly designed carbonyl‐bridged bithiazole unit and trifluoroacetyl terminal groups is synthesized as a candidate for air‐stable n‐type organic field‐effect transistor (OFET) materials. Cyclic voltammetry measurements reveal that carbonyl‐bridging contributes both to lowering the lowest unoccupied molecular orbital energy level and to stabilizing the anionic species. X‐ray crystallographic analysis of the compound shows a planar molecular geometry and a dense molecular packing, which is advantageous to electron transport. Through these appropriate electrochemical properties and structures for n‐type semiconductor materials, OFET devices based on this compound show electron mobilities as high as 0.06 cm² V^?1 s^?1 with on/off ratios of 10⁶ and threshold voltages of 20 V under vacuum conditions. Furthermore, these devices show the same order of electron mobility under ambient conditions.     

Capacitively Coupled Hybrid Ion Gel and Carbon Nanotube Thin‐Film Transistors for Low Voltage Flexible Logic Circuits

The lamination of a high‐capacitance ion gel dielectric layer onto semiconducting carbon nanotube (CNT) thin‐film transistors (TFTs) that are bottom‐gated with a low‐capacitance polymer dielectric layer drastically reduces the operating voltage of the devices resulting from the capacitive coupling effect between the two dielectric layers sandwiching the CNT channel. As the CNT channel has a network structure, only a compact area of ion gel is required to make the capacitive coupling effect viable, unlike the planar channels of previously reported transistors that required a substantially larger area of ion gel dielectric layer to induce the coupling effect. The capacitively coupled CNT TFTs possess superlative electrical characteristics such as high carrier mobilities (42.0 cm² (Vs)^?1 for holes and 59.1 cm² (Vs)^?1 for electrons), steep subthreshold swings (160 mV dec^?1 for holes and 100 mV dec^?1 for electrons), and low gate leakage currents (<1 nA). These devices can be further integrated to form complex logic circuits on flexible substrates with high mechanical resilience. The layered geometry of the device coupled with scalable solution‐based fabrication has significant potential for large‐scale flexible electronics.     

High‐Speed,Low‐Voltage,and Environmentally Stable Operation of Electrochemically Gated Zinc Oxide Nanowire Field‐Effect Transistors

Single‐crystal, 1D nanostructures are well known for their high mobility electronic transport properties. Oxide‐nanowire field‐effect transistors (FETs) offer both high optical transparency and large mechanical conformability which are essential for flexible and transparent display applications. Whereas the “on‐currents” achieved with nanowire channel transistors are already sufficient to drive active matrix organic light emitting diode (AMOLED) displays; it is shown here that incorporation of electrochemical‐gating (EG) to nanowire electronics reduces the operation voltage to ≤2 V. This opens up new possibilities of realizing flexible, portable, transparent displays that are powered by thin film batteries. A composite solid polymer electrolyte (CSPE) is used to obtain all‐solid‐state FETs with outstanding performance; the field‐effect mobility, on/off current ratio, transconductance, and subthreshold slope of a typical ZnO single‐nanowire transistor are 62 cm²/Vs, 10⁷, 155 μS/μm and 115 mV/dec, respectively. Practical use of such electrochemically‐gated field‐effect transistor (EG FET) devices is supported by their long‐term stability in air. Moreover, due to the good conductivity (≈10^?2 S/cm) of the CSPE, sufficiently high switching speed of such EG FETs is attainable; a cut‐off frequency in excess of 100 kHz is measured for in‐plane FETs with large gate‐channel distance of >10 μm. Consequently, operation speeds above MHz can be envisaged for top‐gate transistor geometries with insulator thicknesses of a few hundreds of nanometers. The solid polymer electrolyte developed in this study has great potential in future device fabrication using all‐solution processed and high throughput techniques.     

Fabrication of Releasable Single‐Crystal Silicon–Metal Oxide Field‐Effect Devices and Their Deterministic Assembly on Foreign Substrates

A new class of thin, releasable single‐crystal silicon semiconductor device is presented that enables integration of high‐performance electronics on nearly any type of substrate. Fully formed metal oxide–semiconductor field–effect transistors with thermally grown gate oxides and integrated circuits constructed with them demonstrate the ideas in devices mounted on substrates ranging from flexible sheets of plastic, to plates of glass and pieces of aluminum foil. Systematic study of the electrical properties indicates field‐effect mobilities of ≈710 cm² V^?1 s^?1, subthreshold slopes of less than 0.2 V decade^?1 and minimal hysteresis, all with little to no dependence on the properties of the substrate due to bottom silicon surfaces that are passivated with thermal oxide. The schemes reported here require only interconnect metallization to be performed on the final device substrate, which thereby minimizes the need for any specialized processing technology, with important consequences in large‐area electronics for display systems, flexible/stretchable electronics, or other non‐wafer‐based devices.     

The Effects of Moisture in Low‐Voltage Organic Field‐Effect Transistors Gated with a Hydrous Solid Electrolyte

The concept of using ion conducting membranes (50–150 μm thick) for gating low‐voltage (1 V) organic field‐effect transistors (OFETs) is attractive due to its low‐cost and large‐area manufacturing capabilities. Furthermore, the membranes can be tailor‐made to be ion conducting in any desired way or pattern. For the electrolyte gated OFETs in general, the key to low‐voltage operation is the electrolyte “insulator” (the membrane) that provides a high effective capacitance due to ionic polarization within the insulator. Hydrous ion conducting membranes are easy to process and readily available. However, the role of the water in combination with the polymeric semiconductor has not yet been fully clarified. In this work electrical and optical techniques are utilized to carefully monitor the electrolyte/semiconductor interface in an ion conducting membrane based OFET. The main findings are that 1) moisture plays a major part in the transistor operation and careful control of both the ambient atmosphere and the potential differences between the electrodes are required for stable and consistent device behavior, 2) the obtained maximum effective capacitance (5 μF cm^?2) of the membrane suggests that the electric double layer is distributed over a broad region within the polyelectrolyte, and 3) electromodulation spectroscopy combined with current–voltage characteristics provide a method to determine the threshold gate voltage from an electrostatic field‐effect doping to a region of (irreversible) electrochemical perturbation of the polymeric semiconductor.