Skin‐Like Oxide Thin‐Film Transistors for Transparent Displays

Flexible transparent display is a promising candidate to visually communicate with each other in the future Internet of Things era. The flexible oxide thin‐film transistors (TFTs) have attracted attention as a component for transparent display by its high performance and high transparency. The critical issue of flexible oxide TFTs for practical display applications, however, is the realization on transparent and flexible substrate without any damage and characteristic degradation. Here, the ultrathin, flexible, and transparent oxide TFTs for skin‐like displays are demonstrated on an ultrathin flexible substrate using an inorganic‐based laser liftoff process. In this way, skin‐like ultrathin oxide TFTs are conformally attached onto various fabrics and human skin surface without any structural damage. Ultrathin flexible transparent oxide TFTs show high optical transparency of 83% and mobility of 40 cm² V^?1 s^?1. The skin‐like oxide TFTs show reliable performance under the electrical/optical stress tests and mechanical bending tests due to advanced device materials and systematic mechanical designs. Moreover, skin‐like oxide logic inverter circuits composed of n‐channel metal oxide semiconductor TFTs on ultrathin, transparent polyethylene terephthalate film have been realized.     

Gate Capacitance‐Dependent Field‐Effect Mobility in Solution‐Processed Oxide Semiconductor Thin‐Film Transistors

Solution‐processed oxide semiconductors (OSs) used as channel layer have been presented as a solution to the demand for flexible, cheap, and transparent thin‐film transistors (TFTs). In order to produce high‐performance and long‐sustainable portable devices with the solution‐processed OS TFTs, the low‐operational voltage driving current is a key issue. Experimentally, increasing the gate‐insulator capacitances by high‐k dielectrics in the OS TFTs has significantly improved the field‐effect mobility of the OS TFTs. But, methodical examinations of how the field‐effect mobility depends on gate capacitance have not been presented yet. Here, a systematic analysis of the field‐effect mobility on the gate capacitances in the solution‐processed OS TFTs is presented, where the multiple‐trapping‐and‐release and hopping percolation mechanism are used to describe the electrical conductivity of the nanocrystalline and amorphous OSs, respectively. An intuitive single‐piece expression showing how the field‐effect mobility depends on gate capacitance is developed based on the aforementioned mechanisms. The field‐effect mobility, depending on the gate capacitances, of the fabricated ZnO and ZnSnO TFTs clearly follows the theoretical prediction. In addition, the way in which the gate insulator properties (e.g., gate capacitance or dielectric constant) affect the field‐effect mobility maximum in the nanocrystalline ZnO and amorphous ZnSnO TFTs are investigated.     

Highly Sensitive,Photocontrolled, Organic Thin‐Film Transistors Using Soluble Star‐shaped Conjugated Molecules

The highly photosensitive characteristics of organic thin‐film transistors (OTFTs) made using soluble star‐shaped oligothiophenes with four‐armed π‐conjugation paths, 4(HPBT)‐benzene and 4(HP3T)‐benzene molecules having a relatively high quantum yield, are reported. 4(HPBT)‐benzene‐based organic phototransistors (OPTs) exhibited high photosensitivity (～2500–4300 A W^?1) even with low optical powers (～6.8–30 µW cm^?2) at zero gate bias. The measured photosensitivity of the devices was much higher than that of inorganic single‐crystal Si‐based phototransistors, as well as that of other OPTs reported earlier. With the highly photosensitive characteristics of the 4(HPBT)‐benzene‐based OPTs, a high ratio of the on and off current switching of ～4 × 10⁴ with low optical power and low gate bias was observed. The slow relaxation of the photoinduced charges and charge‐trapping phenomena at the interface could lead to a reproducible memory operation for 4(HPBT)‐benzene‐based OPTs.     

Solubility‐Induced Ordered Polythiophene Precursors for High‐Performance Organic Thin‐Film Transistors

With the aim of enhancing the field‐effect mobility of self‐assembled regioregular poly(3‐hexylthiophene), P3HT, by promoting two‐dimensional molecular ordering, the organization of the P3HT in precursor solutions is transformed from random‐coil conformation to ordered aggregates by adding small amounts of the non‐solvent acetonitrile to the solutions prior to film formation. The ordering of the precursor in the solutions significantly increases the crystallinity of the P3HT thin films. It is found that with the appropriate acetonitrile concentration in the precursor solution, the resulting P3HT nanocrystals adopt a highly ordered molecular structure with a field‐effect mobility dramatically improved by a factor of approximately 20 depending on the P3HT concentration. This improvement is due to the change in the P3HT organization in the precursor solution from random‐coil conformation to an ordered aggregate structure as a result of the addition of acetonitrile. In the good solvent chloroform, the P3HT molecules are molecularly dissolved and adopt a random‐coil conformation, whereas upon the addition of acetonitrile, which is a non‐solvent for aromatic backbones and alkyl side chains, 1D or 2D aggregation of the P3HT molecules occurs depending on the P3HT concentration. This state minimizes the unfavorable interactions between the poorly soluble P3HT and the acetonitrile solvent, and maximizes the favorable π–π stacking interactions in the precursor solution, which improves the molecular ordering of the resulting P3HT thin film and enhances the field‐effect mobility without post‐treatment.     

Ultrathin,Organic, Semiconductor/Polymer Blends by Scanning Corona‐Discharge Coating for High‐Performance Organic Thin‐Film Transistors

A new thin‐film coating process, scanning corona‐discharge coating (SCDC), to fabricate ultrathin tri‐isopropylsilylethynyl pentacene (TIPS‐PEN)/amorphous‐polymer blend layers suitable for high‐performance, bottom‐gate, organic thin‐film transistors (OTFTs) is described. The method is based on utilizing the electrodynamic flow of gas molecules that are corona‐discharged at a sharp metallic tip under a high voltage and subsequently directed towards a bottom electrode. With the static movement of the bottom electrode, on which a blend solution of TIPS‐PEN and an amorphous polymer is deposited, SCDC provides an efficient route to produce uniform blend films with thicknesses of less than one hundred nanometers, in which the TIPS‐PEN and the amorphous polymer are vertically phase‐separated into a bilayered structure with a single‐crystalline nature of the TIPS‐PEN. A bottom‐gate field‐effect transistor with a blend layer of TIPS‐PEN/polystyrene (PS) (90/10 wt%) operated at ambient conditions, for example, indeed exhibits a highly reliable device performance with a field‐effect mobility of approximately 0.23 cm² V^?1 s^?1: two orders of magnitude greater than that of a spin‐coated blend film. SCDC also turns out to be applicable to other amorphous polymers, such as poly(α‐methyl styrene) and poly(methyl methacrylate) and, readily combined with the conventional transfer‐printing technique, gives rise to micropatterned arrays of TIPS‐PEN/polymer films.     

Fully Patterned Low‐Voltage Transparent Metal Oxide Transistors Deposited Solely by Chemical Spray Pyrolysis

All‐inorganic transparent thin‐film transistors deposited solely by the solution processing method of spray pyrolysis are reported. Different precursor materials are employed to create conducting and semiconducting species of ZnO acting as electrodes and active channel material, respectively, as well as zirconium oxide as gate dielectric layer. Additionally, a simple stencil mask system provides sufficient resolution to realize the necessary geometric patterns. As a result, fully functional low‐voltage n‐type transistors with a mobility of 0.18 cm² V^?1 s^?1 can be demonstrated via a technique that bears the potential for upscaling. A detailed microscopic evaluation of the channel region by electron diffraction, high‐resolution and analytical TEM confirms the layer stacking and provides detailed information on the chemical composition and nanocrystalline nature of the individual layers.     

Patterning of Flexible Transparent Thin‐Film Transistors with Solution‐Processed ZnO Using the Binary Solvent Mixture

Flexible transparent thin‐film transistors (TTFTs) have emerged as next‐generation transistors because of their applicability in transparent electronic devices. In particular, the major driving force behind solution‐processed zinc oxide film research is its prospective use in printing for electronics. Since the patterning that prevents current leakage and crosstalk noise is essential to fabricate TTFTs, the need for sophisticated patterning methods is critical. In patterning solution‐processed ZnO thin films, several points require careful consideration. In general, as these thin films have a porous structure, conventional patterning based on photolithography causes loss of film performance. In addition, as controlling the drying process is very subtle and cumbersome, it is difficult to fabricate ZnO semiconductor films with robust fidelity through selective printing or patterning. Therefore, we have developed a simple selective patterning method using a substrate pre‐patterned through bond breakage of poly(methyl methacrylate) (PMMA), as well as a new developing method using a toluene–methanol mixture as a binary solvent mixture.     

Water‐Induced Scandium Oxide Dielectric for Low‐Operating Voltage n‐ and p‐Type Metal‐Oxide Thin‐Film Transistors

Solution‐processed metal‐oxide thin films based on high dielectric constant (k) materials have been extensively studied for use in low‐cost and high‐performance thin‐film transistors (TFTs). Here, scandium oxide (ScO_x) is fabricated as a TFT dielectric with excellent electrical properties using a novel water‐inducement method. The thin films are annealed at various temperatures and characterized by using X‐ray diffraction, atomic‐force microscopy, X‐ray photoelectron spectroscopy, optical spectroscopy, and a series of electrical measurements. The optimized ScO_x thin film exhibits a low‐leakage current density of 0.2 nA cm^?2 at 2 MV cm^?1, a large areal capacitance of 460 nF cm^?2 at 20 Hz and a permittivity of 12.1. To verify the possible applications of ScO_x thin films as the gate dielectric in complementary metal oxide semiconductor (CMOS) electronics, they were integrated in both n‐type InZnO (IZO) and p‐type CuO TFTs for testing. The water‐induced full oxide IZO/ScO_x TFTs exhibit an excellent performance, including a high electron mobility of 27.7 cm² V^?1 s^?1, a large current ratio (I_on/I_off) of 2.7 × 10⁷ and high stability. Moreover, as far as we know it is the first time that solution‐processed p‐type oxide TFTs based on a high‐k dielectric are achieved. The as‐fabricated p‐type CuO/ScO_x TFTs exhibit a large I_on/I_off of around 10⁵ and a hole mobility of 0.8 cm² V^?1 at an operating voltage of 3 V. To the best of our knowledge, these electrical parameters are among the highest performances for solution‐processed p‐type TFTs, which represents a great step towards the achievement of low‐cost, all‐oxide, and low‐power consumption CMOS logics.     

Organic Thin‐Film Transistors Based on Tolyl‐Substituted Oligothiophenes

Thin films based on the tolyl‐substituted oligothiophenes 5,5′′‐bis(4‐methylphenyl)‐2,2′:5′,2′′‐terthiophene ( 1 ), 5,5′′′‐bis(4‐methylphenyl)‐2,2′:5′,2′′:5′′,2′′′‐quaterthiophene ( 2 ) and 5,5′′′′‐bis(4‐methylphenyl)‐2,2′:5′,2′′:5′′,2′′′:5′′′,2′′′′‐quinqethiophene ( 3 ) exhibit hole‐transport behavior in a thin‐film transistor (TFT) configuration, with reasonable mobilities and high current on/off (I_on/I_off) ratios. Powder X‐ray diffraction (PXRD) reveals that these films, grown by vacuum deposition onto the thermally grown silicon oxide surface of a TFT, are highly crystalline, a characteristic that can be attributed to the general tendency of phenyl groups to promote crystallinity. Atomic force microscopy (AFM) reveals that the films grow layer by layer to form large domains, with some basal domain areas approaching 1000 μm². The PXRD and AFM data are consistent with an “end‐on” orientation of the molecules on the oxide substrate. Variable‐temperature current–voltage (I–V) measurements identified the activation regime for hole transport and revealed shallow level traps in thin films of 1 and 2 , and both shallow and deep level traps in thin films of 3 . The activation energies for thin films of 1 , 2 , and 3 were similar, with values of E_a = 121, 100, and 109 meV, respectively. The corresponding trap densities were N_trap/N_v = 0.012, 0.023, and 0.094, where N_trap is the number of trap states and N_v is the number of conduction states. The hole mobilities for the three compounds were similar (μ ? 0.03 cm² V^–1 s^–1), and the I_on/I_off ratios were comparable with the highest values reported for organic TFTs, with films of 2 approaching I_on/I_off = 10⁹ at room temperature.     

Microstructural Control of Charge Transport in Organic Blend Thin‐Film Transistors

The charge‐transport processes in organic p‐channel transistors based on the small‐molecule 2,8‐difluoro‐5,11‐bis(triethylsilylethynyl)anthradithiophene (diF‐TES ADT), the polymer poly(triarylamine)(PTAA) and blends thereof are investigated. In the case of blend films, lateral conductive atomic force microscopy in combination with energy filtered transmission electron microscopy are used to study the evolution of charge transport as a function of blends composition, allowing direct correlation of the film's elemental composition and morphology with hole transport. Low‐temperature transport measurements reveal that optimized blend devices exhibit lower temperature dependence of hole mobility than pristine PTAA devices while also providing a narrower bandgap trap distribution than pristine diF‐TES ADT devices. These combined effects increase the mean hole mobility in optimized blends to 2.4 cm²/Vs – double the value measured for best diF‐TES ADT‐only devices. The bandgap trap distribution in transistors based on different diF‐TES ADT:PTAA blend ratios are compared and the act of blending these semiconductors is seen to reduce the trap distribution width yet increase the average trap energy compared to pristine diF‐TES ADT‐based devices. Our measurements suggest that an average trap energy of <75 meV and a trap distribution of <100 meV is needed to achieve optimum hole mobility in transistors based on diF‐TES ADT:PTAA blends.     

Room‐Temperature Printing of Organic Thin‐Film Transistors with π‐Junction Gold Nanoparticles

Printing semiconductor devices under ambient atmospheric conditions is a promising method for the large‐area, low‐cost fabrication of flexible electronic products. However, processes conducted at temperatures greater than 150 °C are typically used for printed electronics, which prevents the use of common flexible substrates because of the distortion caused by heat. The present report describes a method for the room‐temperature printing of electronics, which allows thin‐film electronic devices to be printed at room temperature without the application of heat. The development of π‐junction gold nanoparticles as the electrode material permits the room‐temperature deposition of a conductive metal layer. Room‐temperature patterning methods are also developed for the Au ink electrodes and an active organic semiconductor layer, which enables the fabrication of organic thin‐film transistors through room‐temperature printing. The transistor devices printed at room temperature exhibit average field‐effect mobilities of 7.9 and 2.5 cm² V^?1 s^?1 on plastic and paper substrates, respectively. These results suggest that this fabrication method is very promising as a core technology for low‐cost and high‐performance printed electronics.     

Vertically Segregated Structure and Properties of Small Molecule–Polymer Blend Semiconductors for Organic Thin‐Film Transistors

A comprehensive structure and performance study of thin blend films of the small‐molecule semiconductor, 2,8‐difluoro‐5,11‐bis(triethylsilylethynyl)anthradithiophene (diF‐TESADT), with various insulating binder polymers in organic thin‐film transistors is reported. The vertically segregated composition profile and nanostructure in the blend films are characterized by a combination of complementary experimental methods including grazing incidence X‐ray diffraction, neutron reflectivity, variable angle spectroscopic ellipsometry, and near edge X‐ray absorption fine structure spectroscopy. Three polymer binders are considered: atactic poly(α‐methylstyrene), atactic poly(methylmethacrylate), and syndiotactic polystyrene. The choice of polymer can strongly affect the vertical composition profile and the extent of crystalline order in blend films due to the competing effects of confinement entropy, interaction energy with substrate surfaces, and solidification kinetics. The variations in the vertically segregated composition profile and crystalline order in thin blend films explain the significant impacts of binder polymer choice on the charge carrier mobility of these films in the solution‐processed bottom‐gate/bottom‐contact thin‐film transistors.     

Transparent Nanopaper‐Based Flexible Organic Thin‐Film Transistor Array

Eco‐friendly and low‐cost cellulose nanofiber paper (nanopaper) is a promising candidate as a novel substrate for flexible electron device applications. Here, a thin transparent nanopaper‐based high‐mobility organic thin‐film transistor (OTFT) array is demonstrated for the first time. Nanopaper made from only native wood cellulose nanofibers has excellent thermal stability (>180 °C) and chemical durability, and a low coefficient of thermal expansion (CTE: 5–10 ppm K^‐1). These features make it possible to build an OTFT array on nanopaper using a similar process to that for an array on conventional glass. A short‐channel bottom‐contact OTFT is successfully fabricated on the nanopaper by a lithographic and solution‐based process. Owing to the smoothness of the cast‐coated nanopaper surface, a solution processed organic semiconductor film on the nanopaper comprises large crystalline domains with a size of approximately 50–100 μm, and the corresponding TFT exhibits a high hole mobility of up to 1 cm²V^‐1 s^‐1 and a small hysteresis of below 0.1 V under ambient conditions. The nanopaper‐based OTFT also had excellent flexibility and can be formed into an arbitrary shape. These combined technologies of low‐cost and eco‐friendly paper substrates and solution‐based organic TFTs are promising for use in future flexible electronics application such as flexible displays and sensors.     

Design of Novel Dielectric Surface Modifications for Perylene Thin‐Film Transistors

Dielectric surface modifications (DSMs) can improve the performance of organic thin‐film transistors (OTFTs) significantly. In order to gain a deeper understanding of this performance enhancement and to facilitate high‐mobility transistors, perylene based devices utilizing novel dielectric surface modifications have been produced. Novel DSMs, based on derivates of tridecyltrichlorosilane (TTS) with different functional end‐groups as well as polymeric dielectrics have been applied to tailor the adhesion energy of perylene. The resulting samples were characterized by electronic transport measurements, scanning probe microscopy, and X‐ray diffraction (XRD). Measurements of the surface free energy of the modified dielectric enabled the calculation of the adhesion energy of perylene upon these novel DSMs by the equation‐of‐state approach. These calculations demonstrate the successful tailoring of the adhesion energy. With these novel DSMs, perylene thin‐films with a superior film quality were produced, which enabled high‐performance perylene‐based OTFTs with high charge‐carrier mobility.     

Bithienopyrroledione‐Based Copolymers,Versatile Semiconductors for Balanced Ambipolar Thin‐Film Transistors and Organic Solar Cells with V oc > 1 V

Conjugated polymer semiconductors P1 and P2 with bithienopyrroledione (bi‐TPD) as acceptor unit are synthesized. Their transistor and photovoltaic performances are investigated. Both polymers display high and balanced ambipolar transport behaviors in thin‐film transistors. P1‐ based devices show an electron mobility of 1.02 cm² V^?1 s^?1 and a hole mobility of 0.33 cm² V^?1 s^?1, one of the highest performance reported for ambipolar polymer transistors. The electron and hole mobilities of P2 transistors are 0.36 and 0.16 cm² V^?1 s^?1, respectively. The solar cells with PC₇₁BM as the electron acceptor and P1/P2 as the donor exhibit a high V _oc about 1.0 V, and a power conversion efficiency of 6.46% is observed for P1‐ based devices without any additives and/or post treatment. The high performance of P1 and P2 is attributed to their crystalline films and short π–π stacking distance (<3.5 Å). These results demonstrate (1) bi‐TPD is an excellent versatile electron‐deficient unit for polymer semiconductors and (2) bi‐TPD‐based polymer semiconductors have potential applications in organic transistors and organic solar cells.     

Influence of Thiol Self‐Assembled Monolayer Processing on Bottom‐Contact Thin‐Film Transistors Based on n‐Type Organic Semiconductors

The performance of bottom‐contact thin‐film transistor (TFT) structures lags behind that of top‐contact structures owing to the far greater contact resistance. The major sources of the contact resistance in bottom‐contact TFTs are believed to reflect a combination of non‐optimal semiconductor growth morphology on the metallic contact surface and the limited available charge injection area versus top‐contact geometries. As a part of an effort to understand the sources of high charge injection barriers in n‐channel TFTs, the influence of thiol metal contact treatment on the molecular‐level structures of such interfaces is investigated using hexamethyldisilazane (HMDS)‐treated SiO₂ gate dielectrics. The focus is on the self‐assembled monolayer (SAM) contact surface treatment methods for bottom‐contact TFTs based on two archetypical n‐type semiconductors, α,ω‐diperfluorohexylquarterthiophene (DFH‐4T) and N,N′bis(n‐octyl)‐dicyanoperylene‐3,4:9,10‐bis(dicarboximide) (PDI‐8CN₂). TFT performance can be greatly enhanced, to the level of the top contact device performance in terms of mobility, on/off ratio, and contact resistance. To analyze the molecular‐level film structural changes arising from the contact surface treatment, surface morphologies are characterized by atomic force microscopy (AFM) and scanning tunneling microscopy (STM). The high‐resolution STM images show that the growth orientation of the semiconductor molecules at the gold/SAM/semiconductor interface preserves the molecular long axis orientation along the substrate normal. As a result, the film microstructure is well‐organized for charge transport in the interfacial region.     

A Densely and Uniformly Packed Organic Semiconductor Based on Annelated β‐Trithiophenes for High‐Performance Thin Film Transistors

A novel semiconductor based on annelated β‐trithiophenes is presented, possessing an extraordinary compressed packing mode combining edge‐to‐face π–π interactions and S…S interactions in single crystals, which is favorable for more effective charge transporting. Accordingly, the device incorporating this semiconductor shows remarkably high charge carrier mobility, as high as 0.89 cm² V^?1 s^?1, and an on/off ratio of 4.6 × 10⁷ for vacuum‐deposited thin films.