A fast automatic frequency calibration technique for a 2–6 GHz frequency synthesizer

A fast automatic frequency calibration (AFC) technique is described. For fast AFC operation while eliminating the uncertainty of the initial phase relationship between the reference clock and voltage‐controlled oscillator output, two‐phase reference clocks are employed. The proposed AFC scheme is applied to a 2–6 GHz frequency synthesizer. The frequency synthesizer is implemented in a 0.18 µm complementary metal–oxide–semiconductor process and occupies 0.92 mm² while the AFC occupies only 0.01 mm². The AFC operation is completed in less than 1.6 µs. Copyright © 2012 John Wiley & Sons, Ltd.     

Finite‐time H ∞ filtering for a class of discrete‐time Markovian jump systems with partly unknown transition probabilities

This paper is concerned with the problem of finite‐time H _∞ filtering for a class of Markovian jump systems subject to partial information on the transition probabilities. By introducing some slack matrix variables in terms of probability identity, a less conservative bounded real lemma is derived to ensure that filtering Markovian jump systems is finite‐time stable. Finally, the existence criterion of the desired filter is obtained such that the corresponding filtering error system is finite‐time bounded with a guaranteed H _∞ performance index. An example is given to illustrate the efficiency of the proposed method. Copyright © 2013 John Wiley & Sons, Ltd.     

Discrete‐time multivariable robust model reference adaptive control based on Kp = LDS factorization: an input–output approach

A direct scheme of robust model reference adaptive control is reinvestigated, in an input–output approach, for a large class of discrete‐time multivariable systems with unmodeled dynamics and bounded disturbances. Compared with the existing results, in virtue of a high‐frequency gain matrix factorization, the assumptions required in the scheme are further relaxed without overmuch complicating the controller structure, and a permissible range of the gain parameter in a modified adaptive algorithm is clearly specified. Moreover, paralleling the continuous‐time theoretic framework, robust stability and robust tracking performance are analyzed by using the multivariable versions of some important technical lemmas, such as an exponentially weighted norm‐relation lemma and two swapping lemmas. Copyright © 2012 John Wiley & Sons, Ltd.     

Exponential l2 − l∞ filtering for discrete‐time switched systems under a new framework

In this paper, a robust exponential l₂ ? l_∞ filtering problem is addressed for discrete‐time switched systems with polytopic uncertainties. The purpose of robust exponential l₂ ? l_∞ filtering is to design a filter such that the resulting filtering error system is robustly exponentially stable with a decay rate and a prescribed exponential l₂ ? l_∞ performance index. The robust exponential l₂ ? l_∞ filtering problem is solved via an average dwell time approach. Sufficient conditions in terms of strict LMI are derived for checking the robust exponential stability of a filter. An explicit expression for the desired robust exponential filter is also given. Finally, a numerical example is provided to demonstrate the potential and effectiveness of the proposed method. Copyright © 2011 John Wiley & Sons, Ltd.     

Theory on resistance of m × n cobweb network and its application

A basic theorem of equivalent resistance between two arbitrary nodes in an m × n cobweb network in both finite and infinite conditions is discovered, and two conjectures on the equivalent resistance are proved in terms of the basic theorem. We built a tridiagonal matrix equation by means of network analysis and made a diagonalization method of matrix transformation and work out its explicit expressions. The new formulae obtained here can be effectively applied in complex impedance network, especially the formulation leads to the occurrence of resonances and a series of novel results in RLC (denote resistor, inductance and capacitance) network. These curious results suggest the possibility of practical applications to resonant circuits. Copyright © 2014 John Wiley & Sons, Ltd.     

Resistance and capacitance of 4 × n cobweb network and two conjectures

A classic problem in electric circuit theory studied by numerous authors over 160 years is the computation of the resistance between two nodes in a resistor network, yet some basic problem in m × n cobweb network is still not solved ideally. The equivalent resistance and capacitance of 4 × n cobweb network are investigated in this paper. We built a quaternion matrix equation and proposed the method of matrix transformations in terms of the network analysis. We proposed a brief equivalent resistance formula and find that the equivalent resistance is expressed by cos(kπ/9) in a series of strict calculation. Meanwhile, an equivalent resistance of infinite networks is gained. Using the inverse mapping relation between capacitance parameters and resistance parameters, the equivalent capacitance formula is also given for the 4 × n capacitance cobweb network. By analyzing and comparing the equivalent resistances of the 1 × n, 2 × n, 3 × n and 4 × n cobweb networks, two conjectures on the equivalent resistance and capacitance of the m × n cobweb network are proposed. Copyright © 2013 John Wiley & Sons, Ltd.     

Transformer‐coupled π‐network differential CMOS oscillator circuit topology

This paper reports a novel oscillator circuit topology based on a transformer‐coupled π‐network. As a case study, the proposed oscillator topology has been designed and studied for 60 GHz applications in the frame of the emerging fifth generation wireless communications. The analytical expression of the oscillation frequency is derived and validated through circuit simulations. The root‐locus analysis shows that oscillations occur only at that resonant frequency of the LC tank. Moreover, a closed‐form expression for the quality factor (Q) of the LC tank is derived which shows the enhancement of the equivalent quality factor of the LC tank due to the transformer‐coupling. Last, a phase noise analysis is reported and the analytical expressions of phase noise due to flicker and thermal noise sources are derived and validated by the results obtained through SpectreRF simulations in the Cadence design environment with a 28 nm CMOS process design kit commercially available. Copyright © 2016 John Wiley & Sons, Ltd.     

Formulae of resistance between two corner nodes on a common edge of the m × n rectangular network

This paper deals with the equivalent resistance for the m × n resistor network in both finite and infinite cases. Firstly, we build a difference equation driven by a tridiagonal matrix to model the network; then by performing the diagonalizing transformation on the driving matrix, and using the auxiliary function tz(x,n), we derive two formulae of the equivalent resistance between two corner nodes on a common edge of the network. By comparing two different formulae, we also obtain a new trigonometric identity here. Our framework can be effectively applied in complex impedance networks. As in applications in the LC network, we find that our formulation leads to the occurrence of resonances at frequencies associated with (n + 1)?_t = kπ. This somewhat curious result suggests the possibility of practical applications of our formulae to resonant circuits. At the end of the paper, two other formulae of an m × n resistor network are proposed. Copyright © 2014 John Wiley & Sons, Ltd.     

Online concurrent reinforcement learning algorithm to solve two‐player zero‐sum games for partially unknown nonlinear continuous‐time systems

Online adaptive optimal control methods based on reinforcement learning algorithms typically need to check for the persistence of excitation condition, which is necessary to be known a priori for convergence of the algorithm. However, this condition is often infeasible to implement or monitor online. This paper proposes an online concurrent reinforcement learning algorithm (CRLA) based on neural networks (NNs) to solve the H _∞ control problem of partially unknown continuous‐time systems, in which the need for persistence of excitation condition is relaxed by using the idea of concurrent learning. First, H _∞ control problem is formulated as a two‐player zero‐sum game, and then, online CRLA is employed to obtain the approximation of the optimal value and the Nash equilibrium of the game. The proposed algorithm is implemented on actor–critic–disturbance NN approximator structure to obtain the solution of the Hamilton–Jacobi–Isaacs equation online forward in time. During the implementation of the algorithm, the control input that acts as one player attempts to make the optimal control while the other player, that is, disturbance, tries to make the worst‐case possible disturbance. Novel update laws are derived for adaptation of the critic and actor NN weights. The stability of the closed‐loop system is guaranteed using Lyapunov technique, and the convergence to the Nash solution of the game is obtained. Simulation results show the effectiveness of the proposed method. Copyright © 2014 John Wiley & Sons, Ltd.     

A 1–6 GHz analog radio frequency power driver in 90 nm complementary metal‐oxide semiconductor technology for wireless applications

One of the most challenging subsystems for integrated radio frequency (RF) complementary metal‐oxide semiconductor (CMOS) solutions is the power amplifier. A 1–6 GHz RF power driver (RFPD) in 90 nm CMOS technology is presented, which receives signals from on‐chip RF signal chain components at ?12 dBm power levels and produces a 0 dBm signal to on‐chip or off‐chip 50 Ω loads. A unique unit cell design is developed for the RFPD to offset issues associated with very wide multi‐fingered transistors. The RF driver was fabricated as a stand‐alone sub‐circuit on a 90 nm CMOS die with other sub‐circuits. Experimental tests confirmed that the on‐chip RFPD operates up to 6 GHz and is able to drive 50 Ω loads to the desired 0 dBm power level. Spur free dynamic range exceeded 70 dB. The measured power gain was 11.6 dB at 3 GHz. The measured 1 dB compression point and input third‐order intercept point (IIP3) were ?4.7 dBm and ?0.5 dBm, respectively. Also, included are modeling, simulation, and measured results addressing issues associated with interfacing the die to a package with pinouts and the package to a printed circuit test fixture. The simulations were made through direct current (DC), alternating current (AC), and transient analysis with Cadence Analog Design Environment. The stability was also verified on the basis of phase margin simulations from extracted circuit net‐lists. Copyright © 2013 John Wiley & Sons, Ltd.     

An integrated controller for high‐frequency LCLC resonant inverter with phase‐shifted control and frequency regulation

High‐frequency alternating current has an extensive application as a result of outstanding advantages. The aim of the study is to develop a high‐frequency power source to feed the auxiliary loads of vehicle application such as electric fans, blower motors, and lighting. A feasible implementation of high‐frequency power source is examined by a full‐bridge LCLC resonant inverter. The corresponding control scheme is proposed for the fourth‐order resonant inverter to confront the control challenges of low output harmonics and dynamic nonlinear load. Firstly, an analysis parameter S _r is defined to address the possible impacts of the varying operational frequency to output THD and ZVS features. Secondly, an integrated control scheme is presented to implement pulse‐width control at heavy load and frequency regulation at light load. Lastly, an experimental prototype is accomplished with the peak voltage of 35 V and the output power of 120 W. The accordance of experimental results and theoretical analysis testifies that the proposed control scheme can achieve the low harmonics and high conversion efficiency over a wide scope of operational conditions. Copyright © 2016 John Wiley & Sons, Ltd.     

Design and implementation of switched coil LC‐VCOs in the GHz range using the self‐inductance technique

This paper presents the design and implementation of dual‐band LC‐VCOs in the GHz‐range featuring a switched coil LC‐tank. The proposed design exploits the self‐inductance technique. The design of the coil starts from simple considerations and back‐of‐the‐envelope calculations, then electromagnetic simulations are used to optimize the coil layout. The sizing of the switch and its impact on the VCO performance are addressed as well. The VCOs have been implemented in 65 nm CMOS technology. Good correlation between simulated and measured tuning range and phase noise is obtained for all designs, thus confirming the validity and robustness of the design methodology and coil models. Copyright © 2013 John Wiley & Sons, Ltd.     

900 MHZ radio‐frequency identification rectifier with optimization and reusing of electro‐static discharges protections in 180 nm digital CMOS technology

Sensitivity and electro‐static discharges (ESD) protection level are crucial parameters for any Ultra High‐Frequency (UHF) power rectifier–harvester designed for radio‐frequency identification (RFID) devices. While sensitivity limits the reading range of the interrogator‐to‐tag communication link, the requirement for an adequate protection against ESD is enforced in commercial devices connected to a printed antenna. Both resistive and capacitive parasitics of the protection circuits severely affect RF performance of the device. In the paper, a rectifier for UHF RFID embedding an ESD protection for 2 kV human‐body discharge model (HBM) level is proposed. The target of a low added parasitic capacitance is achieved by adapting the protection circuit to the RFID rectifier and reusing the ESD clamp for additional functions being mandatory in a UHF RFID front end. The layout of the ESD clamp has been optimized for minimum parasitic resistance without sacrificing the protection level. Two UHF harvesters were implemented in a 180 nm digital complementary metal‐oxide semiconductor (CMOS) technology, featuring a minimum sensitivity of ?15.5 dBm with an ESD protection level of 2 kV HBM. Copyright © 2014 John Wiley & Sons, Ltd.     

Decentralized model predictive‐based load‐frequency control in an interconnected power system concerning wind turbines

This paper presents a load‐frequency control (LFC) design using the model predictive control (MPC) technique in a multi‐area power system in the presence of wind turbines (WTs). In the studied system, the controller of each local area is designed independently such that the stability of the overall closed‐loop system is guaranteed. A frequency response model of the multi‐area power system including WTs is introduced, and physical constraints of the governors and turbines are considered. The model was employed in the MPC structures. Digital simulations for a two‐area power system are provided to validate the effectiveness of the proposed scheme. The results show that with the proposed MPC technique the overall closed‐loop system performance shows robustness in the face of uncertainties due to governor and turbine parameter variation and load disturbances. A performance comparison between the proposed controller with WTs and MPC without WTs and a classical integral control scheme is carried out, confirming the superiority of the proposed MPC technique with WTs. © 2012 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

A configurable 2‐Gbps LVDS transceiver in 150‐nm CMOS with pre‐emphasis,equalization, and slew rate control

A configurable full‐duplex low‐voltage differential signaling transceiver is presented, which can be configured to operate either for smaller differential channels (a few inches of striplines) or for longer channels (10 m of twisted pair cables). The configurability is embedded in the form of functionalities like pre‐emphasis, equalization, and slew rate control within the transceiver. The transmitter employs a hybrid voltage–current‐mode driver, which due to replica action, achieves a high‐impedance current‐mode signal dispatch and at the same time provides a matched impedance at the near end for improved intersymbol interference. The transmitter achieves slew rate control through a band‐limited pre‐driver, while the pre‐emphasis is achieved through a capacitive feed‐forward. The receiver employs a large‐input common‐mode first stage enclosed in a common‐mode control loop that enables its first stage to also act like a domain shifter (VDDIO‐to‐VDDCORE) reducing the overall power consumption. The equalization in the receiver is implemented by using carefully sized active inductive loads inside the receiver. The transceiver is designed and fabricated in 150‐nm complementary metal–oxide–semiconductor, sharing the space with a larger die, occupying an area of 400 × 400μm. The measurement results demonstrate that the transceiver is operating at 2 Gbps both for a 4‐in microstrip and a 10‐m twisted pair CAT6 cable with 30 and 180 ps of total jitter, respectively. The built‐in impedance calibrator minimizes the spread in the on‐die termination at the near end provided by the transmitter‐minimizing bit error rate across process, voltage, and temperature corners. The transmitter consumes a total power of 17 mW operating at 2 Gbps, that is, 8.5 pJ/bit of energy consumption; the receiver consumes a total power of 3.5 mW while driving a load of 5 pF at 2 Gbps. Copyright © 2016 John Wiley & Sons, Ltd.     

An 11‐μ W, 9‐bit fully differential,cyclic/algorithmic ADC in 0.13 μm CMOS

This paper describes a fully differential, cyclic, analogue‐to‐digital converter (ADC). It utilizes a 4‐bit binary weighted capacitor array to obtain 9‐bit resolution. The ADC uses an operational amplifier to suppress supply voltage variations. The operational amplifier with the slew‐rate detection is used to increase the speed of the ADC. The ADC is fabricated in IBM 0.13 μm CMOS process and occupies 650 × 850μm² active area. At 10 kS/s sampling rate, the ADC consumes 11 μW. In order to test immunity of the ADC on the supply voltage variations, static and dynamic performance of the ADC is measured with triangular supply voltage (V _{D C}  = 1.5 V, V _{A C}  = 200mV _pp, f  = 1 kHz). The measured peak of differential nonlinearity and integral nonlinearity is  + 0.26/ − 0.67 and  + 0.65/ − 0.59, respectively. At 250 Hz, effective number of bit is 8.4 bits, S F D R  = 66.7 dB and S N D R  = 52.6 dB. Copyright © 2016 John Wiley & Sons, Ltd.     

Low‐latency retransmission control in a wireless communication system for plant instrumentation and control

When wireless communication technology is applied to plant instrumentation and control systems, it is important to ensure real‐time transmission and high reliability of the wireless communication system. However, the wireless communication system is prone to more frequent occurrence of transmission errors than a wired communication system, so that generally retransmission is implemented generically. To reduce retransmission latency, we propose a method of low‐latency retransmission control, which is a data block transmission method with multi‐redundant media access control layer (MAC) headers, to implement a wireless communication system for plant instrumentation and control. We carried out system tests using prototypes with the proposed methods, that is, data block transmission with multi‐redundant MAC headers. © 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Asymptotic stability, ℓ2 gain,boundness analysis,and control synthesis for switched systems: a switching frequency approach

In this paper, several concepts of switching frequency are introduced to analyze the properties and performance of switched systems in infinite as well as finite‐time intervals. The observation is very motivating that different system properties and performances depend on different switching frequencies. Sufficient conditions ensuring asymptotic stability, ?₂ gain performance, and state boundness are derived on the basis of the notions of switching frequency, respectively. Then, on the basis of the analysis results, the control synthesis problems are addressed. LMI‐based design algorithms are proposed to meet different control synthesis requirements. Numerical design examples are provided to demonstrate our results. Copyright © 2011 John Wiley & Sons, Ltd.     

A robust adaptive control architecture for disturbance rejection and uncertainty suppression with L ∞ transient and steady‐state performance guarantees

In this paper, a new adaptive control architecture for linear and nonlinear uncertain dynamical systems is developed to address the problem of high‐gain adaptive control. Specifically, the proposed framework involves a new and novel controller architecture involving a modification term in the update law that minimizes an error criterion involving the distance between the weighted regressor vector and the weighted system error states. This modification term allows for fast adaptation without hindering system robustness. In particular, we show that the governing tracking closed‐loop system error equation approximates a Hurwitz linear time‐invariant dynamical system with input–output signals. This key feature of our framework allows for robust stability analysis of the proposed adaptive control law using system theory. We further show that by properly choosing the design parameters in the modification term, we can guarantee a desired bandwidth of the adaptive controller, guaranteed transient closed‐loop performance, and an a priori characterization of the size of the ultimate bound of the closed‐loop system trajectories. Several illustrative numerical examples are provided to demonstrate the efficacy of the proposed approach. Copyright © 2012 John Wiley & Sons, Ltd.     

Filter‐based perturbation control of low‐frequency oscillation in voltage‐mode H‐bridge DC–AC inverter

This paper presents a new additional perturbation control method for suppressing low‐frequency oscillation in voltage‐mode H‐bridge DC–AC inverter. The stability boundary of the H‐bridge inverter is investigated from its small‐signal averaged model. High input voltage and light load would cause low‐frequency oscillation in this system. To this end, a filter‐based perturbation control (FBPC) is proposed for eliminating this oscillation, by using an analog filter to extract the unexpected signal and applying it to the control loop. Theoretical results show a larger stability range of the controlled system with the proposed FBPC. The simulation and experiment results show that the proposed controller can control the low‐frequency oscillation in H‐bridge DC–AC inverter well. Copyright © 2014 John Wiley & Sons, Ltd.