MBE growth of pseudomorphic HEMT structures for MMIC applications

The development of the GaAs metal semiconductor field effect transistor (MESFET) in the 1960s allowed integrated circuits operating at microwave frequencies to be fabricated. GaAs foundries can now produce customer circuit designs operating up to 20 GHz, using an implanted MESFET process. The push to higher operating frequencies, higher gains and lower noise figures has led to the development of the high electron mobility transistor (HEMT) and the pseudomorphic HEMT. This paper describes how molecular beam epitaxy (MBE) has been used to produce material for pseudomorphic HEMT circuits and how the epitaxial process influences device yield and device performance.     

An introduction to GaAs/GaAlAs HBTs for power applications

This paper presents a brief introduction to GaAs/GaAlAs heterojunction bipolar transistors (HBTs) for microwave and millimetre-wave power applications. The theoretical advantages of the heterojunction are outlined and the benefits of its incorporation in DC, RF and power devices are discussed. The problems inherent in the realization of HBTs in terms of device design, epitaxial material growth and device fabrication are discussed and the performance characteristics for practical devices presented. The paper concludes with a look at state-of-the-art GaAs/GaAlAs HBT performance and its standing with respect to the competing technologies of the metal semiconductor field effect transistor (MESFET) and the high electron mobility transistor (HEMT).     

A triple channel HEMT on InP (Camel HEMT) for large-signalhigh-speed applications

A triple channel HEMT structure grown on InP has been developed (the “Camel” HEMT). Starting from a dual channel (InGaAs/InP) HEMT that utilizes both the high electron mobility of InGaAs and the low impact ionization coefficient of InP, a third InGaAs channel as well as a quaternary carrier supply layer have been introduced to improve the electron transfer and thus the transistor performance. The design of the new transistor structure and its fabrication technology are described. Static and dynamic performances for an 0.8 μm gate length Camel HEMT are presented and compared to standard double channel HEMT transistors that are fabricated with the same geometry and process conditions. The results show that this new structure offers a very good tradeoff between high breakdown voltage and current gain cutoff frequency     

纳米结构制备及硅单电子晶体管的研究

介绍了用电子束光刻、反应离子刻蚀方法制备硅量子线和用电子束光刻、电子束蒸发以及剥离技术制备纳米金属栅的工艺方法;用这种工艺在p型SIMOX硅片上成功制造了一种单电子晶体管;在器件的电流电压特性上观测到明显的库仑阻塞效应和单电子隧穿效应以及在固定的Vds电压下,源漏电流(Ids)随栅极电压(Vgs)变化的一系列周期变化的电流振荡特性.     

隧道结TiOx线宽度对隧穿现象的影响

在新型超高速光导开关的研究中,采用AFM阳极氧化加工方法,加工利用磁控溅射方法在GaAs衬底得到的厚约3nm的钛膜,形成纳米级氧化钛线.该Ti-TiOx-Ti形成MIM隧道结作为光导开关的基本结构,并且TiO x作为电子的能量势垒.为说明氧化线的宽度对隧穿现象的影响,确定加工超高速光导开关时不引起隧穿的最窄线宽及其实验条件,通过控制空气中的相对湿度,在加工速度、氧气浓度和偏置电压不变的条件下,加工出宽度分别为15.6,34.2和46.9nm的钛氧化线,测试了不同宽度氧化线隧道结的I-V特性.结果表明,在两电极的偏压为6V时不引起隧穿的前提下,可以在超高速光导开关两电极间加工最小宽度大约为10nm的氧化钛线.     

Ultra-short 25-nm-gate lattice-matched InAlAs/InGaAs HEMTs withinthe range of 400 GHz cutoff frequency

We have succeeded in fabricating ultra-short 25-nm-gate InAlAs/InGaAs high electron mobility transistors (HEMTs) lattice-matched to InP substrates. The two-step-recessed gate technology and low temperature processing at below 300°C allowed the fabrication of such ultra-short gates. DC measurements showed that the 25-nm-gate HEMT had good pinchoff behavior. We obtained a cutoff frequency f_T of 396 GHz, within the range of 400 GHz f_T, for the 25-nm-gate HEMT. This f_T is the highest value get reported for any type of transistor, and the gate length of 25 nm is the shortest value ever reported for any compound semiconductor transistor that exhibits device operation     

高压超快GaAs光电导开关的研制

本文首次报导了采用全固态绝缘，微带线低电感输出的Ｓｉ－ＧａＡｓ高压超快光电导开关的研制结果，该器件的耐压强庶３５ｋＶ／ｃｍ，典型的电流脉冲上升时间为２００ｐｓ，电流达１００Ａ。并在实验中观测到典型的高倍增现象。     

A voltage-controlled ring oscillator using InP full enhancement-mode HEMT logic

A voltage-controlled ring oscillator (VCO) based on a full enhancement-mode InAIAs/InGaAs/InP high electron mobility transistor (HEMT) logic is proposed. An enhancement-mode HEMT (E-HEMT) is fabricated, whose threshold is demonstrated to be 10 mV. The model of the E-HEMT is established and used in the SPICE simulation of the VCO. The result proves that the full E-HEMT logic technology can be applied to the VCO. And compared with the HEMT DCFL technology, the complexity of our fabrication process is reduced and the reliability is improved.     

基于InP全增强HEMT逻辑的环形压控振荡器研究

A voltage-controlled ring oscillator （VCO） based on a full enhancement-mode InAlAs/InGaAs/InP high electron mobility transistor （HEMT） logic is proposed. An enhancement-mode HEMT （E-HEMT） is fabricated, whose threshold is demonstrated to be 10 mV. The model of the E-HEMT is established and used in the SPICE simulation of the VCO. The result proves that the full E-HEMT logic technology can be applied to the VCO. And compared with the HEMT DCFL technology, the complexity of our fabrication process is reduced and the reliability is improved.     

硅基单电子晶体管的可控制备

采用电子束曝光、感应耦合等离子体刻蚀和热氧化等工艺技术,通过独特的图形反转设计,即在电子束曝光时采用负的曝光图形,并以电子束曝光的光刻胶作为掩膜进行干法刻蚀,通过后续的干法热氧化等工艺,在磷离子重掺杂的绝缘体上硅基底上成功地制备出单电子晶体管。该方法具有高精度、结构可控、可重复和加工成本低的优点,可作为一种批量制备单电子晶体管的工艺技术。所制备的单电子晶体管在2.6 K到100 K的温度范围内呈现出明显的库仑阻塞效应,导通电阻小于100 kΩ。该单电子晶体管将成为高速、高灵敏度射频电路的关键器件。     

Small-signal switch model of GaN HEMTs for MMIC applications

Gallium nitride (GaN) high electron mobility transistor (HEMT) with symmetrical structure as a control device is discussed in this paper. The equivalent circuit model is proposed on the basis of physical and electrical properties of the GaN HEMT device. A transistor with 0.5 μm gate length and 6 × 125 μm gate width is fabricated to verify the model, which can be treated as a single pole single throw (SPST) switch due to the ON state and OFF state. The measurement results show a good agreement with the simulation results, which demonstrates the effectiveness of the proposed model.     

The permeable base transistor and its application to logic circuits

The permeable base transistor (PBT), which has been fabricated and operated as a microwave device, is described. Numerical solutions of Poisson's equation and the continuity equation show that this transistor could be used as a very high speed switch in a logic gate. It is predicted that with this device in an inverter gate having a fan out of one, a gate delay of 2 ps and a power-delay product of 0.1 fJ are possible. The unique feature of this transistor is the use of a metal grating embedded in the single-crystal semiconductor. The voltage on this grating controls the current between the grating fingers. By proper choice of carrier concentration and grating dimensions, enhancement and depletion mode devices can be made which allow simple gate designs similar to those of nMOS to be used. The lithographic and metal grating fabrication technologies are already well advanced and appear capable of producing PBT integrated circuits. The crystal embedding techniques for placing the metal inside the crystal are new and need further development. In the design of gates and circuits the embedded metal layers will provide the advantage of an interconnect layer inside the crystal, which reduces the number of layers required on the top of the semiconductor surface.     

硅单电子晶体管的制造及特性

报道了采用电子束光刻、反应离子刻蚀及热氧化等工艺,在p型SIMOX(separation by implanted oxygen)硅片上成功制造的一种单电子晶体管.特别是,提供了一种制造量子线和量子点的工艺方法,在器件的电流-电压特性上观测到明显的库仑阻塞效应和单电子隧穿效应.器件的总电容约为9.16aF.在77K工作温度下,也观测到明显的电流-电压振荡特性.     

Nanofabrication with proximal probes

In this paper, we describe the use of proximal probes, such as the atomic force microscope (AFM) and the scanning tunneling microscope (STM), for nanofabrication. A resistless proximal probe-based lithographic technique has been developed that uses the local electric field of an STM or conductive AFM tip that is operated in air to selectively oxidize regions of a sample surface. The resulting oxide, typically 1-10 nm thick, can be used either as a mask for selective etching or to directly modify device properties by patterning insulating oxides on thin conducting layers. In addition to this resistless approach, we also describe the use of the STM/AFM to modify the chemical functionality of self-assembling monolayer films. Such modified films are used as a template for the selective electroless plating of metal films. The above processes are fast simple to perform, and well suited for device fabrication. We apply the anodic oxidation process to the fabrication of both semiconductor and metal-oxide devices. In these latter structures, sub-10 nm-sized device features are easily achieved, and we describe the fabrication of the smallest possible device, a single, atomic-sized metallic point contact by using in situ-controlled AFM oxidation     

MOCVD生长的SiC衬底高迁移率GaN沟道层AlGaN/AlN/GaN HEMT结构

用MOCVD技术在高阻6H-SiC衬底上研制出了具有高迁移率GaN沟道层的AlGaN/AlN/GaN高电子迁移率晶体管(HEMT)结构材料,其室温和80K时二维电子气迁移率分别为1944和11588cm2/(V·s),相应二维电子气浓度为1.03×1013cm-2;三晶X射线衍射和原子力显微镜分析表明该材料具有良好的晶体质量和表面形貌,10μm×10μm样品的表面粗糙度为0.27nm.用此材料研制出了栅长为0.8μm,栅宽为1.2mm的HEMT器件,最大漏极饱和电流密度和非本征跨导分别为957mA/mm和267mS/mm.     

Implantation angle periphery effects on non-alloyed Si-implanted ohmic contacts for AlGaN/GaN high electron mobility transistors

We report on the effect of implantation angle on contact resistance of non-alloyed ohmic contacts to selectively implanted source/drain regions in AlGaN/GaN high electron mobility transistor (HEMT) heterostructures. Three different components of contact resistance are observed for such contacts: (i) contact resistance between the metal and the semiconductor, (ii) resistance of the implanted region and (iii) an additional resistance attributed to a transition region between implanted and non-implanted region. This third component varies strongly with implantation angle. The variation with implantation angle shows that the ratio of lateral implantation damage to penetration depth is critical for implantation of AlGaN/GaN HEMT source/drain contact regions. Our results also show that increasing the implantation angle in combination with reducing the implantation width can reduce contact resistance.     

单电子晶体管的蒙特卡罗模拟及宏观建模(英文)

以单电子晶体管为研究对象,系统阐述了库仑阻塞、库仑台阶、单电子隧穿等物理现象的产生机理。微观模拟与宏观建模相结合,着重介绍了如何用蒙特卡罗方法和Matlab相结合对上述各种物理现象进行数值模拟,同时对单电子晶体管进行宏观电路等效,用一些常用元器件进行宏观建模。采用强大的模拟集成电路软件Hspice进行分析模拟,大大减少了计算及仿真时间。通过分析比较,两者曲线得到了较好的吻合,直观地反映了单电子晶体管的电学特性,为进一步研究复杂系统提供了理论依据。     

Silicon single-electron transistors with sidewall depletion gatesand their application to dynamic single-electron transistor logic

Novel single-electron transistors (SETs) with side-wall depletion gates on a silicon-on-insulator nanometer-scale wire are proposed and fabricated, using the combination of the conventional lithography and process technology. Clear Coulomb oscillation originated from the two electrically induced tunnel junctions and the single Si island between them is observed at 77 K. The island size dependence of the electrical characteristics shows the good controllability and reproducibility of the proposed fabrication method. Furthermore, the device characteristics are immune to gate bias conditions, and the position of Coulomb oscillation peak is controlled by the sidewall depletion gate voltage, without the additional gate electrode. Based on the current switching by sidewall gate voltage, the basic operation of the dynamic four-input multifunctional SET logic circuit is demonstrated at 10 K. The proposed SET offers the feasibility of the device design and optimization for SET logic circuits, in that its device parameters and circuit parameters are controllable by the conventional VLSI technology     

SET/CMOS hybrid process and multiband filtering circuits

We have developed an integration technology for the single electron transistor (SET)/CMOS hybrid systems. SET and CMOS transistors can be optimized without any possible degradation due to mixing dissimilar devices by adopting just one extra mask step for the separate gate oxidation (SGOX). We have confirmed that discrete devices show ideal characteristics required for the SET/CMOS hybrid systems. An SET shows obvious Coulomb oscillations with a 200-mV period and CMOS transistors show high voltage gain. Based on the hybrid process, new hybrid circuits, called periodic multiband filters, are proposed and successfully implemented. The new filter is designed to perform a filtering operation according to the periodic multiple blocking bands of which a period is originated from the SET. Such a novel function was implemented efficiently with a few transistors by making full use of the periodic nature of SET characteristics.     

硅单电子晶体管的制造及特性

报道了采用电子束光刻、反应离子刻蚀及热氧化等工艺,在p型SIMOX(separation by implanted oxygen)硅片上成功制造的一种单电子晶体管.特别是,提供了一种制造量子线和量子点的工艺方法,在器件的电流-电压特性上观测到明显的库仑阻塞效应和单电子隧穿效应.器件的总电容约为9.16aF.在77K工作温度下,也观测到明显的电流-电压振荡特性.