Effect of ionizing radiation on MOS capacitors

A numerical model of metal-oxide-semiconductor (MOS) capacitor has been developed to investigate the effect of ionizing radiation on the characteristics of the device during exposure and also in the post-irradiated condition. The model takes into account the effect of radiation-induced changes in silicon-dioxide as well as in silicon substrate of MOS structure. It is found that the total high frequency capacitance of the device during exposure to radiation is different from its value in the post-irradiated condition. The results of the study are expected to be useful in predicting the behavior of MOS based devices operating in radiation environment.     

Dielectric properties in Au/SnO2/n-Si (MOS) structures irradiated under Co-γ rays

The metal-oxide-semiconductor (MOS) structures with insulator layer thickness range of 55-430 Å were stressed with a bias of 0 V during ⁶⁰Co-γ ray source irradiation with the dose rate of 2.12 kGy/h and the total dose range was 0-5×10⁵ Gy. The real part of dielectric constant ε′, dielectric loss ε″, dielectric loss tangent tanδ and the dc conductivity σ_dc were determined from against frequency, applied voltage, dose rate and thickness of insulator layer at room temperature for Au/SnO₂/n-Si (MOS) structures from C-V capacitance and G-V conductance measurements in depletion and weak inversion before and after irradiation. The dielectric properties of MOS structures have been found to be strongly influenced by the presence of dominant radiation-induced defects. The frequency, applied voltage, dose rate and thickness dependence of ε′, ε″, tanδ and σ_dc are studied in the frequency (500 Hz-10 MHz), applied voltage (−10 to 10 V), dose rate (0-500 kGy) and thickness of insulator layer (55-430 Å) range, respectively. In general, dielectric constant ε′, dielectric loss ε″ and dielectric loss tangent are found to decrease with increasing the frequency while σ_dc is increased. Experimental results shows that the interfacial polarization can be more easily occurred at the lower frequency and/or with the number of density of interface states between Si/SnO₂ interfaces, consequently, contribute to the improvement of dielectric properties of Au/SnO₂/n-Si (MOS) structures.     

一种可集成高密度氮氧化硅介质工艺

针对传统二氧化硅、氮化硅等介质材料在制作MOS电容时存在电容密度低、界面特性差的问题,通过对氮离子注入、氮硅氧化实验的分析,成功开发出一种采用注入氮并氧化制作氮氧化硅介质材料的工艺;并使用该工艺研制出与36 V双极工艺兼容、介质的相对介电常数为5.51、击穿电压达81 V、电容密度为0.394 fF/μm²的高密度MOS电容,较传统可集成二氧化硅/氮化硅复合介质电容的电容密度提高了35.86%。该工艺还可用于制作大功率MOSFET的栅介质,可提高器件的可靠性。     

窗片介质材料对输出窗功率容量的影响

本文介绍了研制大功率速调管的过程中输出窗的失效现象,比较了两种窗片介质材料氧化铍与氧化铝的性能特点;通过实际制管后的热测数据证明,相同条件下窗片材料氧化铍比氧化铝对输出窗的功率容量的提高更显著,在研制大功率速调管过程中窗片材料氧化铍是比氧化铝更为优良的介质材料.     

Impact of Gamma Irradiation Effects on IGBT and Design Parameter Considerations

The primary dose effects on an insulated gate bipolar transistor (IGBT) irradiated with a ⁶⁰Co gamma‐ray source are found in both of the components of the threshold shifting due to oxide charge trapping in the MOS and the reduction of current gain in the bipolar transistor. In this letter, the IGBT macro‐model incorporating irradiation is implemented, and the electrical characteristics are analyzed by SPICE simulation and experiments. In addition, the collector current characteristics as a function of gate emitter voltage, V_GE, are compared with the model considering the radiation damage of different doses under positive biases.     

Au/SnO2/n-Si (MOS) structures response to radiation and frequency

Metal-insulator-semiconductor (MOS) structures with insulator layer thickness of 290 Å were irradiated using a ⁶⁰Co (γ-ray) source and relationships of electrical properties of irradiated MOS structures to process-induced surface defects have been investigated both before and after γ-irradiation. The density of surface state distribution profiles of the sample Au/SnO₂/n-Si (MOS) structures obtained from high-low frequency capacitance technique in depletion and weak inversion both before and after irradiation. The measurement capacitance and conductance are corrected for series resistance. Series resistance (Rs) of MOS structures were found both as function of voltage, frequency and radiation dose. The C(f)-V and G(f)-V curves have been found to be strongly influenced by the presence of a dominant radiation-induced defects. Results indicate interface-trap formation at high dose rates (irradiations) is reduced due to positive charge build-up in the semiconductor/insulator interfacial region (due to the trapping of holes) that reduces the flow rate of subsequent holes and protons from the bulk of the insulator to the Si/SnO₂ interface. The series resistance decreases with increasing dose rate and frequency the radiation-induced flat-band voltage shift in 1 V. Results indicate the radiation-induced threshold voltage shift (ΔV_T) strongly dependence on radiation dose rate and frequency.     

混沌随机数发生器的设计

为了使由模拟电路实现的混沌随机数发生器可以在标准数字CMOS工艺上实现,设计了一类基于MOS电容的混沌随机数发生器,可以作为一个通用IP,用于SOC的设计.当电路工作时,用于电容设计的MOS管的栅极与衬底之间形成耗尽层,利用串联补偿方法提高电容的线性度.所设计的混沌随机数发生器已经在TSMC的0.25μm、标准的数字n阱COMS工艺进行流片,对芯片的测试工作也已完成,测试结果显示,生成的随机数具有良好的随机性能.     

混沌随机数发生器的设计

为了使由模拟电路实现的混沌随机数发生器可以在标准数字CMOS工艺上实现,设计了一类基于MOS电容的混沌随机数发生器,可以作为一个通用IP,用于SOC的设计.当电路工作时,用于电容设计的MOS管的栅极与衬底之间形成耗尽层,利用串联补偿方法提高电容的线性度.所设计的混沌随机数发生器已经在TSMC的0.25μm、标准的数字n阱COMS工艺进行流片,对芯片的测试工作也已完成,测试结果显示,生成的随机数具有良好的随机性能.     

用线性电压扫描的电容-时间瞬态测定少子产生寿命

本文建议用耗尽的线性扫描电压扫描MOS电容样品。扫描开始前MOS电容被置于强反型态,以消除表面产生的影响。根据扫描所得的电容-时间瞬态曲线,可确定样品中少于产生寿命。实验表明,对于同一个MOS电容样品,不同电压扫描率下得到的结果有很好的一致性,且与饱和电容法的结果相符合。     

低介电常数高耐热多层线路板用基板材料

Polyphenylene（聚酰亚胺）树脂带有非常好的介电性能,通过对Polyphenylene分子细量化,然后和带有好架桥性能以及可溶混性的树脂搅拌,开发出了同时带有低诱电（Low-Dk）和高耐热性,适用于高速信号传输设备使用的多层线路板材料。这个材料性能为Dk=3.8, Df=0.005(1 GHz), Tg=210℃。在5 GHz的使用条件下,与传统的材料相比,降低信号损失约15 db/m。可以广泛的应用在如网络设备等的高速,大容量信号传输设备。     

输出窗的二次电子的作用及其抑制措施

论述了造成微波输出窗损坏的各种因素,指出了次级电子的倍增效应是输出窗损坏的主要原因。在抑制次级电子发射的工艺措施中,详细介绍了氮化钛薄膜的性能、以及磁控溅射敷膜工艺的特点。     

Studies of liquid-phase deposition-oxide/InP structure by liquid-phase deposition

Silicon-dioxide (SiO₂) growth on an indium-phosphide (InP) substrate by use of room-temperature (∼30°C) liquid-phase deposition (LPD) is demonstrated. The produced LPD-SiO₂ is of good quality and reliability because of the suppression of interdiffusion by use of relatively low temperatures. Because LPD is difficult without residual OH on the substrate, an InP surface rich in hydroxyls (In-OH) is created by pretreating the wafer substrate in a (29% NH₄OH:H₂O₂=1:1) solution. The LPD-SiO₂/InP is used to fabricate a metal-oxide semiconductor (MOS) capacitor with a device area of 1.12×10⁻⁴ cm², yielding a leakage-current density of 8.1×10⁻⁹ A/cm² at 3 MV/cm. A mechanism for the LPD deposition of SiO₂ on InP is also presented.     

包含双层半导体和金属纳米晶MOS电容的存储特性

制备了包含双层半导体和金属纳米晶的MOS电容结构,研究了其在非挥发性存储器领域的应用。利用真空电子束蒸发技术,在二氧化硅介质中得到了半导体硅纳米晶和金属镍纳米晶。与包含单层纳米晶的MOS电容相比,这种包含双层异质纳米晶的MOS电容显示出更大的存储能力,且保留性能得到改善。说明顶层的金属纳米晶作为一层额外的电荷俘获层可以通过直接隧穿机制进一步延长保留时间和提高平带电压漂移量。     

薄二氧化硅MOS电容电离辐射陷阱电荷研究

采用高频 C- V曲线方法 ,研究了 5 0 nm及 15 nm MOS电容电离辐射空穴陷阱及界面态的建立过程 .二种样品电离辐射空穴陷阱电荷密度在 1× 10 3Gy(Si)剂量下近乎相同 ,而在大于 3× 10 3Gy(Si)剂量下 ,5 0 nm MOS电容的电荷密度约为 15 nm MOS电容的 2倍 .利用电离辐射后的隧道退火效应 ,计算出二种样品电离辐射陷阱电荷在Si- Si O2 界面附近分布的距离均约为 4nm .     

电场增强载流子产生中产生电流与宽度的关系

研究了深能级中心电场增强载流子产生现象，得到的产生电流与产生宽度的理论关系，能较好地与实验结果相符合。     

DETERMINATION OF GENERATION LIFETIME FROM C-t TRANSIENTS UNDER LINEAR VOLTAGE RAMP BIAS

When a linear voltage ramp is applied to the gate of a MOS capacitor,a capacitance-time(C-t)transient is observed.The MOS capacitor is biased into strong inversion before apply-ing the voltage ramp in order to eliminate surface generation.From C-t transient curve obtainedexperimentally the minority carrier generation lifetime in semiconductor can be determined.Theexperimental results show that for the same sample the lifetimes extracted from C-t curves un-der varying voltage sweep rates are close each other,and they are consistent with the lifetimesextracted by saturation capacitance method.     

深能级中心的电场增强载流子产生效应

本文研究了半导体表面空间电荷区中的深能级中心的电场增强载流子产生效应;指出应全面考虑库仑发射和非库仑发射对载流于产生率的影响;给出了相应的产生率计算公式。对计算机计算结果的分析表明,以往的只考虑库仑发射的模型过于简单,本文理论可以较满意地解释有关的实验结果。