Determination of the laterally homogeneous barrier height of palladium Schottky barrier diodes on n-Ge (1 1 1)

We have studied the experimental linear relationship between barrier heights and ideality factors for palladium (Pd) on bulk-grown (1 1 1) Sb-doped n-type germanium (Ge) metal-semiconductor structures with a doping density of about 2.5×10¹⁵ cm^?3. The Pd Schottky contacts were fabricated by vacuum resistive evaporation. The electrical analysis of the contacts was investigated by means of current–voltage (I–V) and capacitance–voltage (C–V) measurements at a temperature of 296 K. The effective barrier heights from I–V characteristics varied from 0.492 to 0.550 eV, the ideality factor n varied from 1.140 to 1.950, and from reverse bias capacitance–voltage (C^?2–V) characteristics the barrier height varied from 0.427 to 0.509 eV. The lateral homogenous barrier height value of 0.558 eV for the contacts was obtained from the linear relationship between experimental barrier heights and ideality factors. Furthermore the experimental barrier height distribution obtained from I–V and (C^?2?V) characteristics were fitted by Gaussian distribution function, and their mean values were found to be 0.529 and 0.463 eV, respectively.     

Characteristics of RF reactive sputter-deposited Pt/SiO2/n-InGaN MOS Schottky diodes

All RF sputtering-deposited Pt/SiO₂/n-type indium gallium nitride (n-InGaN) metal–oxide–semiconductor (MOS) diodes were investigated before and after annealing at 400 °C. By scanning electron microscopy (SEM), the thickness of Pt, SiO_2, n-InGaN layer was measured to be ~250, 70, and 800 nm, respectively. AFM results also show that the grains become a little bigger after annealing, the surface topography of the as-deposited film was smoother with the rms roughness of 1.67 nm and had the slight increase of 1.92 nm for annealed sample. Electrical properties of MOS diodes have been determined by using the current–voltage (I–V) and capacitance–voltage (C–V) measurements. The results showed that Schottky barrier height (SBH) increased slightly to 0.69 eV (I–V) and 0.82 eV (C–V) after annealing at 400 °C for 15 min in N₂ ambient, compared to that of 0.67 eV (I–V) and 0.79 eV (C–V) for the as-deposited sample. There was the considerable improvement in the leakage current, dropped from 6.5×10⁻⁷ A for the as-deposited to 1.4×10⁻⁷ A for the 400 °C-annealed one. The annealed MOS Schottky diode had shown the higher SBH, lower leakage current, smaller ideality factor (n), and denser microstructure. In addition to the SBH, n, and series resistance (R_s) determined by Cheungs׳ and Norde methods, other parameters for MOS diodes tested at room temperature were also calculated by C–V measurement.     

Inhomogeneous Ni/Ge Schottky barriers due to variation in Fermi-level pinning

To achieve high performance Ge nMOSFETs it is necessary to reduce the metal/semiconductor Schottky barrier heights at the source and drain. Ni/Ge and NiGe/Ge Schottky barriers are fabricated by electrodeposition using n-type Ge substrates. Current (I)–voltage (V) and capacitance (C)–voltage (V) and low temperature I–V measurements are presented. A high-quality Schottky barrier with extremely low reverse leakage current is revealed. The results are shown to fit an inhomogeneous barrier model for thermionic emission over a Schottky barrier. A mean value of 0.57 eV and a standard deviation of 52 meV is obtained for the Schottky barrier height at room temperature. A likely explanation for the distribution of the Schottky barrier height is the spatial variation of the metal induced gap states at the Ge surface due to a variation in interfacial oxide thickness, which de-pins the Fermi level.     

Electrical characterization and DLTS analysis of a gold/n-type gallium nitride Schottky diode

This work describes a comparison of current density–voltage (J–V) and capacitance–voltage (C–V) properties measured as a function of temperature; deep trap properties are measured by deep level transient spectroscopy (DLTS) of Schottky diodes fabricated on n-type gallium nitride (GaN grown by metal organic vapor phase epitaxy (MOVPE). Unexpected behavior in the standard Richardson plot was observed in the temperature range 165–480 K, reflecting a range of Schottky barrier heights and a variation of ideality factor. This was explained by applying a Gaussian spatial distribution of barrier heights across the Schottky diode. C–V measurements were carried out in the temperature range 165–480 K to compare the temperature dependence of the barrier height with those obtained by the Gaussian distribution method. DLTS and high-resolution Laplace DLTS (LDLTS) show a majority carrier peak centered at 450 K.     

Solution-processed hybrid p–n junction vertical diode

Solution-processed n-ZnO/p-poly(3,3′′′-didodecylquaterthiophene) (PQT-12) vertical p–n junction diodes were prepared on ITO-coated glass. A continuous film of ZnO nanoparticles was grown on the ITO glass by dip-coating and subsequent heat treatment of a zinc acetate film. PQT-12 was then spin-coated to form the ZnO/PQT-12 diode. Gold was chosen as the top electrode to complement ITO for this diode. The microstructures of ZnO films are studied by atomic force microscopy (AFM) and show a continuous, dense layer of ZnO nanoparticles. The current–voltage (I–V) measurement shows that the maximum current density for this p–n junction diode is 400 A/cm², which is much higher than previously reported polymer diodes. Capacitance–voltage (C–V) data also provide evidence of formation of the p–n junction. The rectification was characterized by observation of full input-half output waves. Data indicate that these devices can operate up to frequencies of 14 MHz under ambient environment conditions. This rectification frequency is higher than other reported polymer Schottky diodes under these conditions. Turnon voltages of this diode are also much lower than for the reported polymer diodes.     

Electrical parameters of a DC sputtered Mo/n-type 6H-SiC Schottky barrier diode

A Mo/n-type 6H-SiC/Ni Schottky barrier diode (SBD) was fabricated by sputtering Mo metal on n-type 6H-SiC semiconductor. Before the formation of Mo/n-type 6H-SiC SBD, an ohmic contact was formed by thermal evaporation of Ni on n-type 6H-SiC and annealing at 950 °C for 10 min. It was seen that the structure had excellent rectification. The electrical parameters were extracted using its current–voltage (I–V) and capacitance–voltage (C–V) measurements carried out at room temperature. Very high (1.10 eV) barrier height and 1.635 ideality factor values were reported for Mo/n-type 6H-SiC using ln I–V plot. The barrier height and series resistance values of the diode were also calculated as 1.413 eV and 69 Ω from Norde׳s functions, respectively. Furthermore, 1.938 eV barrier height value of Mo/n-type 6H-SiC SBD calculated from C–V measurements was larger than the one obtained from I–V data.     

Electrical properties of Au–Sb/p-GaSe:Gd Schottky barrier diode

Experimental results of the fabricated Schottky barrier diode on a GaSe:Gd substrate are presented. The electrical analysis of Au–Sb/p-GaSe:Gd structure has been investigated by means of current–voltage (I–V) and capacitance–voltage (C–V) measurements at 296 K temperature. The diode ideality factor and the barrier height have been obtained to be 1.07 and 0.85 eV, respectively, by applying a thermionic emission theory. At high currents in the forward direction, the series resistance effect has been observed. The series resistance has been determined from I–V measurements using Cheung's method.     

The effect of annealing temperature on the electronic parameters and carrier transport mechanism of Pt/n-type Ge Schottky diode

The Pt nano-film Schottky diodes on Ge substrate have been fabricated to investigate the effect of annealing temperature on the characteristics of the device. The germanide phase between Pt nano-films and Ge substrate changed and generated interface layer PtGe at 573 K and 673 K, Pt₂Ge₃ at 773 K. The current–voltage(I - V) characteristics of Pt/n-Ge Schottky diodes were measured in the temperature range of 183–303 K. Evaluation of the I - V data has revealed an increase of zero-bias barrier height Φ_B0 but the decrease of ideality factor n with the increase in temperature. Such behaviors have been successfully modeled on the basis of the thermionic emission mechanism by assuming the presence of Gaussian distributions. The variation of electronic transport properties of these Schottky diodes has been inferred to be attributed to combined effects of interfacial reaction and phase transformation during the annealing process. Therefore, the control of Schottky barrier height at metal/Ge interface is important to realize high performance Ge-based CMOS devices.     

Evaluation of the hydrostatic pressure effect on Mn/p-Si Schottky barrier diode electrical parameters and interface states

Mn/p-Si Schottky barrier diode (SBD) electrical parameters and interface state density have been investigated with current–voltage (I–V) characteristics and Cheung's functions employing hydrostatic pressure. The interface state density of the diodes has an exponential growth with bias from the midgap towards the top of the valance band. We have seen that the Schottky barrier height (SBH) for Mn/p-Si SBD has a pressure coefficient of 1.61 meV/kbar (16.1 meV/GPa). We have reported that the p-type barrier height exhibited a weak pressure dependence, accepting that the Fermi level at the interface do not shift as a function of the pressure.     

Fabrication and characterization of single ZnO microwire Schottky light emitting diodes

ZnO microwires were grown using noncatalytic chemical vapor deposition method. The average diameter of the ZnO microwires were about 30 μm with length of up to 1–1.5 cm. Single ZnO microwire Schottky light emitting diode was fabricated using Au as Schottky contact electrode and using Al as ohmic contact electrode. The current–voltage (I–V) characteristics of Schottky diodes reveal good rectifying behavior. The Schottky barrier height and ideality factor were calculated to be 0.78 eV and 4.3, respectively. Furthermore, distinct electroluminescence with ultraviolet and visible emissions was detected from this device at room temperature.     

Current–voltage and capacitance–voltage characteristics of Al Schottky contacts to strained Si-on-insulator in the wide temperature range

The electrical characteristics of Al/strained Si-on-insulator (sSOI) Schottky diode have been investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements in the wide temperature range of 200–400 K in steps of 25 K. It was found that the barrier height (0.57–0.80 eV) calculated from the I–V characteristics increased and the ideality factor (1.97–1.28) decreased with increasing temperature. The barrier heights determined from the C–V measurements were higher than those extracted from the I–V measurements, associated with the formation of an inhomogeneous Schottky barrier at the interface. The series resistance estimated from the forward I–V characteristics using Cheung and Norde methods decreased with increasing temperature, implying its strong temperature dependence. The observed variation in barrier height and ideality factor could be attributed to the inhomogeneities in Schottky barrier, explained by assuming Gaussian distribution of barrier heights. The temperature-dependent I–V characteristics showed a double Gaussian distribution with mean barrier heights of 0.83 and 1.19 eV and standard deviations of 0.10 and 0.16 eV at 200–275 and 300–400 K, respectively. From the modified Richardson plot, the modified Richardson constant were calculated to be 21.8 and 29.4 A cm⁻² K⁻² at 200–275 and 300–400 K, respectively, which were comparable to the theoretical value for p-type sSOI (31.6 A cm⁻² K⁻²).     

Fabrication and electrical characterization of Al/p-ZnIn2Se4 thin film Schottky diode structure

Polycrystalline thin films of ternary ZnIn₂Se₄ compound with p-type conductivity were deposited on a pre-deposited aluminium (Al) film by a flash evaporation technique. A Schottky diode comprising of Al/p-ZnIn₂Se₄ structure was fabricated and characterized in the temperature range 303–323 K in dark condition. The Schottky diode was subjected to current (I)-voltage (V) and capacitance (C)-voltage (V) characterization. The Al/p-ZnIn₂Se₄ Schottky diode showed behaviour typical of a p-n junction diode. The devices showed very good diode behaviour with the rectification ratio of about 10⁵ at 1.0 V in dark. The Schottky diode ideality factor, barrier height, carrier concentration, etc. were derived from I-V and C-V measurements. At lower applied voltages (V≤0.5 V), the electrical conduction was found to take place by thermionic emission (TE) whereas at higher voltages (V>0.5 V), a space charge limited conduction mechanism (SCLC) was observed. An energy band diagram was constructed for fabricated Al/p-ZnIn₂Se₄ Schottky diode.     

Evaluation of lateral barrier height of inhomogeneous photolithography-fabricated Au/n-GaAs Schottky barrier diodes from 80 K to 320 K

In order to evaluate current conduction mechanism in the Au/n-GaAs Schottky barrier diode (SBD) some electrical parameters such as the zero-bias barrier height (BH) Φ_bo(I–V) and ideality factor (n) were obtained from the forward bias current–voltage (I–V) characteristics in wide temperature range of 80–320 K by steps of 10 K. By using the thermionic emission (TE) theory, the Φ_bo(I–V) and n were found to depend strongly on temperature, and the n decreases with increasing temperature while the Φ_bo(I–V) increases. The values of Φ_bo and n ranged from 0.600 eV and 1.51(80 K) to 0.816 eV and 1.087 (320 K), respectively. Such behavior of Φ_bo and n is attributed to Schottky barrier inhomogeneities by assuming a Gaussian distribution (GD) of BHs at Au/n-GaAs interface. In the calculations, the electrical parameters of the experimental forward bias I–V characteristics of the Au/n-GaAs SBD with the homogeneity in the 80–320 K range have been explained by means of the TE, considering GD of BH with linear bias dependence.     

Determination of contact parameters of Ni/n-GaP Schottky contacts

The electrical analysis of Ni/n-GaP structure has been investigated by means of current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) measurements in the temperature range of 120–320 K in dark conditions. The forward bias I–V characteristics have been analyzed on the basis of standard thermionic emission (TE) theory and the characteristic parameters of the Schottky contacts (SCs) such as Schottky barrier height (SBH), ideality factor (n) and series resistance (R_s) have been determined from the I–V measurements. The experimental values of SBH and n for the device ranged from 1.01 eV and 1.27 (at 320 K) to 0.38 eV and 5.93 (at 120 K) for Ni/n-GaP diode, respectively. The interface states in the semiconductor bandgap and their relaxation time have been determined from the C–f characteristics. The interface state density N_ss has ranged from 2.08 × 10¹⁵ (eV^?1 m^?2) at 120 K to 2.7 × 10¹⁵ (eV^?1 m^?2) at 320 K. C_ss has increased with increasing temperature. The relaxation time has ranged from 4.7 × 10^?7 s at 120 K to 5.15 × 10^?7 s at 320 K.     

Influence of inhomogeneous contact in electrical properties of 4H–SiC based Schottky diode

Schottky diodes realized on 4H–SiC n-type wafers with an epitaxial layer and a metal-oxide overlap for electric field termination were studied. The oxide was grown by plasma enhanced chemical vapor deposition (PECVD) and the Schottky barriers were formed by thermal evaporation of titanium or nickel. Diodes, with voltage breakdown as high as 700 V and ideality factor as low as 1.05, were obtained and characterized after packaging in standard commercial package (TO220).The electrical properties such as ideality factor, hight barrier, the series resistance R_s were deduced by current/voltage (I–V) analysis using the least mean square (LMS) method. The temperature effect on break voltage, R_s and saturation current was studied. A model based on two parallel Schottky diodes with two barrier heights is presented for some devices having an inhomogeneous contact. It is shown that the excess current at low voltage can be explained by a lowering of the Schottky barrier in localized regions. We use the two series RC components electrical model in order to study the dynamic behaviour of the Schottky diode in low frequency and to improve the effect of barrier inhomogeneities in electrical properties.     

Frequency and voltage dependency of interface states and series resistance in Al/SiO2/p-Si MOS structure

The capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of Al/SiO₂/p-Si metal-oxide-semiconductor (MOS) Schottky diodes have been measured in the voltage range from ?3 to +3 V and frequency range from 5 KHz to 1 MHz at room temperature. It is found that both C and G/ω of the MOS capacitor are very sensitive to frequency. The fairly large frequency dispersion of C–V and G/ω–V characteristics can be interpreted in terms of the particular distribution of interface states at SiO₂/Si interface and the effect of series resistance. At relatively low frequencies, the interface states can follow an alternating current (AC) signal that contributes to excess capacitance and conductance. This leads to an anomalous peak of C–V curve in the depletion and accumulation regions. In addition, a peak at approximately ?0.2 V appears in the R_s–V profiles at low frequency. The peak values of the capacitance and conductance decrease with increasing frequency. The density distribution profile of interface state density (N_ss) obtained from C_HF–C_LF capacitance measurement also shows a peak in the depletion region.     

The source of negative capacitance and anomalous peak in the forward bias capacitance-voltage in Cr/p-si Schottky barrier diodes (SBDs)

The frequency and voltage dependence of capacitance–voltage (C–V) and conductance-voltage (G/ω−V) characteristics of the Cr/p-Si metal semiconductor (MS) Schottky barrier diodes (SBDs) were investigated in the frequency and applied bias voltage ranges of 10 kHz to 5 MHz and (−4 V)−(+4 V), respectively, at room temperature. The effects of series resistance (R_s) and density distribution of interface states (N_ss), both on C–V and G/ω−V characteristics were examined in detail. It was found that capacitance and conductance, both, are strong functions of frequency and applied bias voltage. In addition, both a strong negative capacitance (NC) and an anomalous peak behavior were observed in the forward bias C–V plots for each frequency. Contrary to the behavior of capacitance, conductance increased with the increasing applied bias voltage and there happened a rapid increase in conductance in the accumulation region for each frequency. The extra-large NC in SBD is a result of the existence of R_s, N_ss and interfacial layer (native or deposited). In addition, to explain the NC behavior in the forward bias region, we drew the C–I and G/ω−I plots for various frequencies at the same bias voltage. The values of C decrease with increasing frequency at forward bias voltages and this decrease in the NC corresponds to an increase in conductance. The values of N_ss were obtained using a Hill–Coleman method for each frequency and it exhibited a peak behavior at about 30 kHz. The voltage dependent profile of R_s was also obtained using a Nicollian and Brews methods.     

Electrical characterization of current conduction in Au/TiO2/n-Si at wide temperature range

In this study, we have examined Au/TiO₂/n-Si Schottky barrier diodes (SBDs), in order to interpret in detail the experimental observed non-ideal current–voltage–temperature (I–V–T) characteristics. I–V characteristics were measured in the wide temperature range of 80–400 K. TiO₂ was deposited on n-Si substrate by reactive magnetron sputtering. The zero-bias barrier height (ϕ_B0) and ideality factor (n) show strong temperature dependence. While n decreases, ϕ_B0 increases with increasing temperature. Experimental results show that the current across the SBDs may be greatly influenced by the existence of Schottky barrier height (SBH) inhomogeneity. These temperature behaviors have been explained on the basis of the thermionic emission (TE) theory with Gaussian distribution (GD) of the barrier heights (BHs) due to BH inhomogeneities at metal–semiconductor (M/S) interface. From this assumptions, obtaining Richardson constant value of the A^* 121.01 A/cm² K² is perfect agreement with the theoretical value of 120 A/cm² K² for n-type Si. Hence, behaviors of the forward-bias I–V characteristics of the Au/TiO₂/n-Si (SBDs) can be successfully explained on the basis of a TE mechanism with a double Gaussian distribution of the BHs.     

N-doped ZnO based fast response ultraviolet photoconductive detector

We report a study on the fabrication and characterization of ultraviolet photodetectors based on N-doped ZnO films. Highly oriented N-doped ZnO films with 10 at.% N doping are deposited using spray pyrolysis technique onto glass substrates. The photoconductive UV detector based on N-doped ZnO thin films, having a metal–semiconductor–metal (MSM) configuration are fabricated by using Al as a contact metal. I–V characteristic under dark and UV illumination, spectral and transient response of ZnO and N-doped ZnO photodetector are studied. The photocurrent increases linearly with incident power density by more than two orders of magnitude. The photoresponsivity (580 A/W at 365 nm with 5 V bias, light power density 2 μW/cm²) is much higher in the ultraviolet region than in the visible.     

The effects of thermal annealing on the electrical characteristics of Au/n–InP/In diode

An Au/n–InP/In diode has been fabricated in the laboratory conditions and the current–voltage (I–V) and capacitance–voltage (C–V) characteristics of the diode have been measured in room temperature. In order to observe the effect of the thermal annealing, this diode has been annealed at temperatures 100 and 200 °C for 3 min in N₂ atmosphere. The characteristic parameters such as leakage current, barrier height and ideality factor of this diode have been calculated from the forward bias I–V and reverse bias C–V characteristics as a function of annealing temperature. Also the rectifying ratio of the diode is evaluated for as-deposited and annealed diode.