Strain sensitivity of gate leakage in strained-SOI nMOSFETs: A benefit for the performance trade-off and a novel way to extract the strain-induced band offset

The impact of biaxial stress on gate leakage is investigated on fully-depleted silicon-on-insulator (FD-SOI) nMOS transistors, integrating either a standard gate stack or an advanced high-κ/metal gate stack. It is demonstrated that strained devices exhibit significantly reduced leakage currents (up to ?90% at E_ox = 11 MV/cm for σ_tensile = 2.5 GPa). This specific effect is used to extract the conduction band offset ΔEc induced by strain and is shown to be accurate enough to monitor stress in MOSFETs. This new technique is much less sensitive to gate oxide defects than the method based on the threshold voltage shift ΔV_T. This accurate experimental extraction allowed us to pick out realistic values for the deformation potentials in silicon (Ξ_u = 8.5 eV and Ξ_d = ?5.2 eV), among the published values.     

Temperature dependent dielectric studies of Ni/n-GaP Schottky diodes by capacitance and conductance measurements

The dielectric properties of Ni/n-GaP Schottky diode were investigated in the temperature range 140–300 K by capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements. The effect of temperature on series resistance (R_s) and interface state density (N_ss) were investigated. The dependency of dielectric constant (ε′), dielectric loss (ε′′), loss tangent (tan δ), ac conductivity (σ_ac), real (M′) and imaginary (M′′) parts of the electric modulus over temperature were evaluated and analyzed at 1 MHz frequency. The temperature dependent characteristics of ε′ and ε′′ reveal the contribution of various polarization effects, which increases with temperature. The Arrhenius plot of σ_ac shows two activation energies revealing the presence of two distinct trap states in the chosen temperature range. Moreover, the capacitance–frequency (C–f) measurement over 1 kHz to 1 MHz was carried out to study the effect of localized interface states.     

Analysis of electrical parameters of the glasses of the system Bix(As2S3)100−x

This work presents the results of measuring the parameters of electrical conductivity of the glasses from the system Bi_x(As₂S₃)_100−x (x=1.5, 3, 5 and 7 at%), carried out in DC and AC regimes. The values of the activation energy ΔE_σ and of the pre-exponentail factor σ₀, obtained by fitting the DC component of the conductivity as a function of temperature, served as the basis for establishing the dominant mechanism of charge transport processes in the investigated glasses. Measurements in AC regime were performed on the samples with 5 and 7 at% Bi, and analyzed in terms of the CBH (Correlated Barrier Hopping) model.     

Effect of magnetic field on galvanomagnetic properties of mica/Bi/EuS heterostructures

The dependences of the Hall coefficient R_H and magnetoresistance Δρ/ρ on magnetic field (B=0.01?1.0 T) were obtained in the temperature range 77–300 K for thin Bi films with thicknesses d=40–250 nm, grown on mica substrates and covered by a EuS layer. It was established that in the entire temperature range for all Bi films the criterion of weak field was fulfilled at magnetic fields up to 1 T: R_H remained practically constant in the entire range of magnetic field and Δρ/ρ for all investigated samples changed with changing magnetic field according to a parabolic law.     

Realizing high breakdown voltage for a novel interface charges islands structure based on partial-SOI substrate

A novel interface charge islands partial-SOI (ICI PSOI) high voltage device with a silicon window under the source and its mechanism are studied in this paper. ICI PSOI is characterized by a series of equidistant high concentration n⁺-regions on the bottom interface of top silicon layer. On the condition of high-voltage blocking state, inversion holes located in the spacing of two n⁺-regions effectively enhance the electric field of the buried oxide layer (E_I) and reduce the electric field of the silicon layer (E_S), resulting in a high breakdown voltage (V_B). It is shown by the simulations that the enhanced field ΔE_I and reduced field ΔE_S by the accumulated holes reach to 449 V/μm and 24 V/μm, respectively, which makes V_B of ICI PSOI increase to 663 V from 266 V of the conventional PSOI on 5 μm silicon layer and 1 μm buried oxide layer with the same silicon window length. On-resistance of ICI PSOI is lower than that of the conventional PSOI. Moreover, self-heating-effect is alleviated by the silicon window in comparison with the conventional SOI at the same power of 1 mW/μm.     

Investigations on phosphorus doped amorphous/nanocrystalline silicon films deposited by a filtered cathodic vacuum arc technique in the presence of hydrogen gas

Phosphorus doped amorphous/nanocrystalline silicon (a-Si:H/nc-Si:H) thin films have been deposited by a filtered cathodic vacuum arc (FCVA) technique in the presence of hydrogen gas at different substrate temperatures (T_s) ranging from room temperature (RT) to 350 °C. The films have been characterized by using X-ray diffraction (XRD), Raman spectroscopy, Fourier transform infrared (FTIR) spectroscopy, dark conductivity (σ_D), activation energy (ΔE), optical band gap (E_g) and secondary ion mass spectroscopy. The XRD patterns show that RT grown film is amorphous in nature but high temperature (225 and 350 °C) deposited films exhibit nanocrystalline structure with (111) and (220) crystal orientations. The crystallite size of higher temperature grown silicon film evaluated was between 13 and 25 nm. Raman spectra reveal the amorphous nature of the film deposited at RT, whereas higher temperature deposited films show crystalline nature. The crystalline volume fraction of the silicon film deposited at higher temperatures (225 and 350 °C) was estimated to be 58 and 72%. With the increase of T_s, the bonding configuration changes from mono-hydride to di-hydride as revealed by the FTIR spectra. The values of σ_D, ΔE and E_g of silicon films deposited at different T_s were found to be in the range of 5.37×10⁻⁴–1.04 Ω⁻¹ cm⁻¹, 0.05–0.45 eV and 1.42–1.83 eV, respectively. Photoconduction of 3.5% has also been observed in n-type nc-Si:H films with the response and recovery times of 9 and 12 s, respectively. A n-type nc-Si:H/p-type c-Si heterojunction diode was fabricated which showed the diode quality factor between 1.6 and 1.8.     

Computational studies on the radiative and nonradiative processes of luminescent N-heteroleptic platinum(II) complexes

Three N-heteroleptic Pt(II) complexes, [Pt(C^C)(O^O)] [O^O = acetylacetonate, C^C = 1-phenyl-1,2,4-triazol-5-ylidene (1), C^C = 4-phenyl-1,2,4-triazol-5-ylidene (2), C^C = 2-phenylpyrazine (3)] have been investigated with density functional theory (DFT) and time-dependent density functional theory (TDDFT). The radiative decay rate constants of complexes 1–3 have been discussed with the oscillator strength (f_n), the strength of spin–orbit coupling (SOC) interaction between the lowest energy triplet excited state (T₁) and singlet excited states (S_n), and the energy gaps between E(T₁) and E(S_n). To illustrate the nonradiative decay processes, the transition states between triplet metal-centered (³MC) and T₁ states have been optimized and were verified with the calculations of vibrational frequencies and intrinsic reaction coordinate (IRC). In addition, the minimum energy crossing points (MECPs) between ³MC and ground states (S₀) were optimized. At last, the potential energy curves relevant to the nonradiative decay pathways are simulated. The results show that complex 3 has the biggest photoluminescence quantum yield because the complex 3 has the biggest radiative decay rate constant and the smallest nonradiative decay rate constant in complexes 1–3.     

Energy band alignment and interface states in AlGaN/4H–SiC vertical heterojunction diodes

The effects of Al_xGa_1−xN aluminum fraction x and SiC surface pre-treatment on AlGaN/4H–SiC heterojunction interfaces are experimentally investigated. From capacitance vs. voltage measurements, the conduction band offsets are found to be ΔE_C ≈ 0.30 for x ≈ 0.3 and ΔE_C ≈ 0.56 for x ≈ 0.5. Forward bias ideality factors are reasonable at 3.3 for Al_0.3Ga_0.7N diodes, but >9 for Al_0.5Ga_0.5N diodes, suggesting a higher level of interface charge related to the higher aluminum fraction. Reverse bias leakage is acceptably low, with breakdown occurring at V_A > 200 V reverse bias for all tested devices. The effect of 1500 °C hydrogen etching of the SiC substrate prior to Al_xGa_1−xN growth is also investigated, and found to have little effect for x = 0.3 but a beneficial effect for x = 0.5.     

Investigation of deep level defects in copper irradiated bipolar junction transistor

Commercial bipolar junction transistor (2N 2219A, npn) irradiated with 150 MeV Cu¹¹⁺-ions with fluence of the order 10¹² ions cm^?2, is studied for radiation induced gain degradation and deep level defects. I–V measurements are made to study the gain degradation as a function of ion fluence. The properties such as activation energy, trap concentration and capture cross-section of deep levels are studied by deep level transient spectroscopy (DLTS). Minority carrier trap levels with energies ranging from E_C ? 0.164 eV to E_C ? 0.695 eV are observed in the base–collector junction of the transistor. Majority carrier trap levels are also observed with energies ranging from E_V + 0.203 eV to E_V + 0.526 eV. The irradiated transistor is subjected to isothermal and isochronal annealing. The defects are seen to anneal above 350 °C. The defects generated in the base region of the transistor by displacement damage appear to be responsible for transistor gain degradation.     

Dielectric characteristics of gamma irradiated Au/SnO2/n-Si/Au (MOS) capacitor

The dielectric characteristics of gamma irradiated Au/SnO₂/n-Si/Au (MOS) capacitor were studied. The MOS capacitor was irradiated by a ⁶⁰Co gamma radiation source with a dose rate of 0.69 kGy/h. The dielectric parameters such as dielectric constant (ε′), dielectric loss (ε″), loss factor (tan δ) and ac electrical conductivity (σ_ac) were calculated from the capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements. It is found that the C and G/ω values decrease with the increasing total dose due to the irradiation-induced defects at the interface. Also, the calculated values of ε′, ε″ and σ_ac are found to decrease with an increased radiation dose. This result indicates that the dielectric characteristics of the MOS capacitor are sensitive to gamma-ray dose.     

Determination of structural and optical properties of gold phthalocyanine thin films using density functional theory

We determined some optical and electrical properties of thin gold phthalocyanine films. Calculations were performed in the framework of density functional theory using the full potential linear augmented plane wave method. Studies on the density of states and band structure yielded a bandgap energy (E_g) of approximately 2 eV. Two trap energy levels were observed at 0.9 and 1.3 eV. Analysis of the dielectric function and electric loss function revealed a plasmon oscillation at 1.8 eV. In addition, we determined static refractive index values in the x, y and z directions of n_0xx = 2.16, n_0yy = 1.66 and n_0zz = 2.07. The optical bandgap of gold phthalocyanine was estimated to be 0.97 eV. Calculations revealed strong absorption at 400–700 nm, which compares favorably with experimental results.     

A detailed comparative study on the main electrical parameters of Au/n-Si and Au/PVA:Zn/n-Si Schottky barrier diodes

We have fabricated Au/n-Si and Au/PVA:Zn/n-Si Schottky barrier diodes (SBDs) to investigate the effect of organic interfacial layer on the main electrical characteristics. Zn doped poly(vinyl alcohol) (PVA:Zn) was successfully deposited on n-Si substrate by using the electrospinning system and surface morphology of PVA:Zn was presented by SEM images. The current–voltage (I–V) characteristics of these SBDs have been investigated at room temperature. The experimental results show that interfacial layer enhances the device performance in terms of ideality factor (n), zero-bias barrier height (Φ_B0), series resistance (R_s), and shunt resistance (R_sh) with values of 1.38, 0.75 eV, 97.64 Ω, and 203 MΩ whereas those of Au/n-Si SBD are found as 1.65, 0.62 eV, 164.15 Ω and 0.597 MΩ, respectively. Also, this interfacial layer at metal/semiconductor (M/S) interface leads to a decrease in the magnitude of leakage current and density of interface states (N_ss). The values of N_ss range from 1.36×10¹² at E_c—0.569 eV to 1.35×10¹³ eV^?1 cm^?2 at E_c—0.387 eV for Au/PVA:Zn/n-Si SBD and 3.34×10¹² at E_c—0.560 eV to 1.35×10¹³ eV^?1 cm^?2 at E_c—0.424 eV for Au/n-Si SBD. The analysis of experimental results reveals that the existence of PVA:Zn interfacial layer improves the performance of such devices.     

Similarities of lag phenomena and current collapse in field-plate AlGaN/GaN HEMTs with different types of buffer layers

We make a two-dimensional transient analysis of field-plate AlGaN/GaN high electron mobility transistors (HEMTs) with a Fe-doped semi-insulating buffer layer, which is modeled that as deep levels, only a deep acceptor located above the midgap is included (E_C − E_DA = 0.5 eV, E_C: energy level at the bottom of conduction band, E_DA: deep acceptor's energy level). And the results are compared with a case having an undoped semi-insulating buffer layer in which a deep donor above the midgap (E_C − E_DD = 0.5 eV. E_DD: the deep donor's energy level) is considered to compensate a deep acceptor below the midgap (E_DA − E_V = 0.6 eV, E_V: energy level at the top of valence band). It is shown that the drain-current responses when the drain voltage is lowered abruptly are reproduced quite similarly between the two cases with different types of buffer layers, although the time region where the slow current transients occur is a little different. The lags and current collapse are reduced by introducing a field plate. This reduction in lags and current collapse occurs because the deep acceptor's electron trapping is reduced under the gate region in the buffer layer. The dependence of drain lag, gate lag and current collapse on the field-plate length and the SiN layer thickness is also studied, indicating that the rates of drain lag, gate lag and current collapse are quantitatively quite similar between the two cases with different types of buffer layers when the deep-acceptor densities are the same.     

Fast and accurate method of lifetime estimation for HfSiON/SiO2 dielectric n-MOSFETs under positive bias temperature instability

This paper proposes a fast and accurate method to measure the constants a and n of the power law ∆ V_th = atⁿ for HfSiON/SiO₂ dielectric nMOSFETs under positive bias temperature instability (PBTI), where ∆ V_th is a shift of threshold voltage, and t is stress duration. The proposed method requires one nMOSFET only, uses a voltage ramp stress (VRS), measures ∆ V_th vs. t data during VRS, uses a regression method to fit the data for each VRS pulse to the power law to obtain a and n at each stress voltage V_g,str, then obtains five voltage-independent constants for the power law after fitting the curves of a and n vs. V_g,str to empirical models. The five voltage-independent constants agreed very well with those obtained using the constant voltage stress (CVS) method. After obtaining the voltage-independent constants, the lifetime t_L at an operating voltage V_op was estimated using the power law. The estimated t_L = 1.67 × 10⁸ s was quite close to t_L = 1.74 × 10⁸ s estimated using CVS, and to t_L = 1.72 × 10⁸ s estimated by extrapolating the ΔV_th vs. t curve measured at V_g,str = V_op = 1.2 V to ΔV_th = 200 mV. The time required for measurement was 900 s, compared to 30,000 s for the CVS method. These experimental results show that the proposed VRS-regression method is very useful for screening nMOSFETs under PBTI.     

Physical investigations on Sb2S3 sprayed thin film for optoelectronic applications

Sb₂S₃ thin films have been obtained at 250 °C on glass substrates using the spray pyrolysis techniques. The structural study by means of XRD analysis shows that Sb₂S₃ thin film crystallized in the orthorhombic phase. The discussion of some structural constants has been made by means of both XRD and AFM investigations. Moreover, the optical analysis via the transmittance and the reflectance measurements reveals that Sb₂S₃ sprayed thin film has a direct transition with the band gap energy E_g equal to 1.72 eV. The analysis in 300–2500 nm domain of the refractive index data through Wemple–DiDomenico model leads to the single oscillator energy (E₀=2.32 eV), and the dispersion energy (E_d=10.03 eV). The electrical study leads to the dc activation energy is of the order of 0.72 eV and the maximum barrier high is W_M=0.87 eV. From the power exponent variation in terms of the heated temperature, it is found that the mechanism of conduction matches well the correlated barrier hopping CBH model.     

Frequency and gate voltage effects on the dielectric properties of Au/SiO2/n-Si structures

To determine the dielectric constant (ε′), dielectric loss (ε″), loss tangent (tan δ), the ac electrical conductivity (σ_ac) and the electric modulus of Au/SiO₂/n-Si structure, the measurement admittance technique was used. Experimental results show that the values of ε′, ε″, tan δ, σ_ac and the electric modulus show fairly large frequency and gate bias dispersion especially at low frequencies due to the interface charges and polarization. An increase in the values of the ε′ and ε″ were observed with both a decrease in frequency and an increase in frequency. The σ_ac is found to increase with both increasing frequency and voltage. In addition, the experimental dielectrical data have been analyzed considering electric modulus formalism. It can be concluded that the interface charges and interfacial polarization have strong influence on the dielectric properties of metal-insulator-semiconductor (MIS) structures especially at low frequencies and both in depletion and accumulation regions.     

The temperature dependent analysis of Au/TiO2 (rutile)/n-Si (MIS) SBDs using current–voltage–temperature (I–V–T) characteristics

In this study, the main electrical parameters of Au/TiO₂(rutile)/n-Si Schottky barrier diodes (SBDs) were analyzed by using current–voltage–temperature (I–V–T) characteristics in the temperature range 200–380 K. Titanium dioxide (TiO₂) thin film was deposited on a polycrystalline n-type Silicon (Si) substrate using the DC magnetron sputtering system at 200 °C. In order to improve the crystal quality deposited film was annealed at 900 °C in air atmosphere for phase transition from amorphous to rutile phase. The barrier height (Φ_b) and ideality factor (n) were calculated from I–V characteristics. An increase in the value of Φ_b and a decrease in n with increasing temperature were observed. The values of Φ_b and n for Au/TiO₂(rutile)/n-Si SBDs ranged from 0.57 eV and 3.50 (at 200 K) to 0.82 eV and 1.90 (at 380 K), respectively. In addition, series resistance (R_s) and Φ_b values of MIS SBDs were determined by using Cheung's and Norde's functions. Cheung's plots are obtained from the donward concave curvature region in the forward bias semi-logarithmic I–V curves originated from series resistance. Norde's function is easily used to obtain series resistance as a function of temperature due to current counduction mechanism which is dominated by thermionic emission (TE). The obtained results have been compared with each other and experimental results show that R_s values exhibit an unusual behavior that it increases with increasing temperature.     

Overdamped NbN junctions with NbNx barriers formed by plasma nitridation

We have fabricated NbN Josephson junctions with NbN_x barriers formed by plasma nitridation on the surface of the base superconductive NbN layer. Both nonhysteretic junctions (overdamped junctions) and small-hysteretic ones have been obtained at 4.2 K by changing plasma nitridation conditions. An overdamped junction showed a product of the critical current I_c and junction resistance R_n (an I_cR_n product) of 0.95 mV at 4.2 K and the I_c exponentially decreased with increasing temperature. On the other hand, a small-hysteretic junction showed Superconductor-Insulator-Superconductor (SIS)-like characteristics in the temperature dependence of I_c and its current–voltage characteristics changed to nonhysteretic ones at the temperature more than 8 K. The I_cR_n product for the junction was 0.91 mV at 8.2 K.     

Fabrication of a CoSb3-based thermoelectric module

A CoSb₃-based thermoelectric module was fabricated using Ce_0.45Co_2.5Fe_1.5Sb₁₂ p-type leg and Yb_0.25Co₄Sb₁₂/Yb₂O₃ n-type leg. Ag–Cu foil was used to construct the junction of hot side legs. With two p–n couples, the module generated a maximum output power (P_max) of 140 mW and a maximum open-circuit voltage (V_o) of 210 mV under the thermal condition of hot side temperature T_h=810 K and a temperature difference ΔT=490 K. No deterioration in output power in vacuum was seen when thermal cycle of five times for the module was carried out under T_h=810 K and ΔT=490 K with natural cooling to room temperature, which shows the module has high durability.     

Investigation on the thermal behavior of 0.15 μm gate-length In0.4Al0.6As/In0.4Ga0.6As MHEMT

In this study, we have successfully investigated the electrical performances of In_0.4Al_0.6As/In_0.4Ga_0.6As metamorphic high-electron-mobility transistor (MHEMT) at temperatures range from 275 K to 500 K comprehensively. By extracting the device S-parameters, the temperature dependent small signal model has been established. At room temperature, 0.15 μm T-gate device with double δ-doping design exhibits f_T and f_MAX values of 103 GHz and 204 GHz at V_ds = 1 V, an extrinsic transconductance of 678 mS/mm, and a current density of 578 mA/mm associated with a high breakdown voltage of ?13 V. Power measurements were evaluated at 40 GHz and the measured output power, linear power gain, and maximum power-added efficiency, were 7.12 dBm, 10.15 dB, and 23.1%, respectively. The activation energy (E_a) extracted from Arrhenius plots is = 0.34 eV at 150 ≦ T ≦ 350 K. The proposed device is promisingly suitable for millimeter-wave power application.