Effect of temperature on the capacitance–frequency and conductance–voltage characteristics of polyaniline/p-Si/Al MIS device at high frequencies

A polyaniline/p-Si/Al MIS device has been fabricated by forming a polyaniline layer on Si by using the electrochemical polymerization method. The conductance–voltage and capacitance–frequency measurements have been performed as a function of temperature. The capacitance of the device decreased with increasing frequency. The increase in capacitance results from the presence of interface states. The peaks have been observed in the conductance curves of the device and attributed to the presence of an interfacial layer between polyaniline and p-Si. For each temperature, the plot of series resistance/voltage gave a peak. The voltage and temperature dependence of series resistance has been attributed to the particular distribution density of interface states and the interfacial insulator layer.     

The temperature dependent analysis of Au/TiO2 (rutile)/n-Si (MIS) SBDs using current–voltage–temperature (I–V–T) characteristics

In this study, the main electrical parameters of Au/TiO₂(rutile)/n-Si Schottky barrier diodes (SBDs) were analyzed by using current–voltage–temperature (I–V–T) characteristics in the temperature range 200–380 K. Titanium dioxide (TiO₂) thin film was deposited on a polycrystalline n-type Silicon (Si) substrate using the DC magnetron sputtering system at 200 °C. In order to improve the crystal quality deposited film was annealed at 900 °C in air atmosphere for phase transition from amorphous to rutile phase. The barrier height (Φ_b) and ideality factor (n) were calculated from I–V characteristics. An increase in the value of Φ_b and a decrease in n with increasing temperature were observed. The values of Φ_b and n for Au/TiO₂(rutile)/n-Si SBDs ranged from 0.57 eV and 3.50 (at 200 K) to 0.82 eV and 1.90 (at 380 K), respectively. In addition, series resistance (R_s) and Φ_b values of MIS SBDs were determined by using Cheung's and Norde's functions. Cheung's plots are obtained from the donward concave curvature region in the forward bias semi-logarithmic I–V curves originated from series resistance. Norde's function is easily used to obtain series resistance as a function of temperature due to current counduction mechanism which is dominated by thermionic emission (TE). The obtained results have been compared with each other and experimental results show that R_s values exhibit an unusual behavior that it increases with increasing temperature.     

The forward bias current density–voltage–temperature (J–V–T) characteristics of Al–SiO2–pSi (MIS) Schottky diodes

Metal–insulator–semiconductor Schottky diodes were fabricated to investigate the tunnel effect and the dominant carrier transport mechanism by using current density–voltage (J–V) and capacitance–voltage (C–V) measurements in the temperature range of 295–370?K. The slope of the ln?J–V curves was almost constant value over the nearly four decades of current and the forward bias current density J is found to be proportional to J_o (T) exp(AV). The values of N_ss estimated from J–V and C–V measurements decreased with increasing temperature. The temperature dependence of the barrier heights obtained from forward bias J–V was found to be entirely different than that from the reverse bias C–V characteristics. All these behaviours confirmed that the prepared samples have a tunnel effect and the current transport mechanism in the temperature range of 295–370?K was predominated by a trap-assisted multi-step tunnelling, although the Si wafer has low doping concentration and the measurements were made at moderate temperature.     

Current–voltage and capacitance–voltage characteristics of Al Schottky contacts to strained Si-on-insulator in the wide temperature range

The electrical characteristics of Al/strained Si-on-insulator (sSOI) Schottky diode have been investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements in the wide temperature range of 200–400 K in steps of 25 K. It was found that the barrier height (0.57–0.80 eV) calculated from the I–V characteristics increased and the ideality factor (1.97–1.28) decreased with increasing temperature. The barrier heights determined from the C–V measurements were higher than those extracted from the I–V measurements, associated with the formation of an inhomogeneous Schottky barrier at the interface. The series resistance estimated from the forward I–V characteristics using Cheung and Norde methods decreased with increasing temperature, implying its strong temperature dependence. The observed variation in barrier height and ideality factor could be attributed to the inhomogeneities in Schottky barrier, explained by assuming Gaussian distribution of barrier heights. The temperature-dependent I–V characteristics showed a double Gaussian distribution with mean barrier heights of 0.83 and 1.19 eV and standard deviations of 0.10 and 0.16 eV at 200–275 and 300–400 K, respectively. From the modified Richardson plot, the modified Richardson constant were calculated to be 21.8 and 29.4 A cm⁻² K⁻² at 200–275 and 300–400 K, respectively, which were comparable to the theoretical value for p-type sSOI (31.6 A cm⁻² K⁻²).     

Modeling the effect of deep traps on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates

Numerical simulation, using SILVACO-TCAD, is carried out to explain experimentally observed effects of different types of deep levels on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates. Two diodes were grown on (311)A and (211)A oriented GaAs substrates using Molecular Beam Epitaxy (MBE). Although, deep levels were observed in both structures, the measured capacitance–voltage characteristics show a negative differential capacitance (NDC) for the (311)A diodes, while the (211)A devices display a usual behaviour. The NDC is related to the nature and spatial distribution of the deep levels, which are characterized by the Deep Level Transient Spectroscopy (DLTS) technique. In the (311)A structure only majority deep levels (hole traps) were observed while both majority and minority deep levels were present in the (211)A diodes. The simulation, which calculates the capacitance–voltage characteristics in the absence and presence of different types of deep levels, agrees well with the experimentally observed behaviour.     

A compare of electrical characteristics in Al/p-Si (MS) and Al/C20H12/p-Si (MPS) type diodes using current–voltage (I–V) and capacitance–voltage (C–V) measurements

In this study, both the metal-semiconductor (MS) and metal-polymer-semiconductor (MPS), (Al/C₂₀H₁₂/p-Si), type Schottky barrier diodes (SBDs) were fabricated using spin coating method and they were called as D₁ and D₂ diodes, respectively. Their electrical characterization have been investigated and compared using the forward and reverse bias I–V and C–V measurements at room temperature. The main electrical parameters such as ideality factor (n), reverse saturation current (I_o), zero-bias barrier height (Φ_Bo), series (R_s) and shunt (R_sh) resistances, energy dependent profile of interface states (N_ss), the doping concentration of acceptor atoms (N_A) and depletion layer width (W_D) were determined and compared each other and literature. The rectifying ratio (RR) and leakage current (I_R) at ±3 V were found as 2.06×10³, 1.61×10⁻⁶ A and 15.7×10³, 2.75×10⁻⁷ A for D₁ and D₂, respectively. Similarly, the R_s and R_sh values of these diodes were found as 544 Ω, 10.7 MΩ and 716 Ω and 1.83 MΩ using Ohm’s Law, respectively. In addition, energy and voltage dependent profiles of N_ss were obtained using the forward bias I–V data by taking into account voltage dependent effective barrier height (Φ_e) and n and low-high frequency capacitance (C_LF–C_HF) methods, respectively. The obtained value of N_ss for D₂ (MPS) diode at about the mid-gap of Si is about two times lower than D₁ (MS) type diode. Experimental results confirmed that the performance in MPS type SBD is considerably high according to MS diode in the respect of lower values of N_ss, R_s and I_o and higher values of RR and R_sh.     

Impact of defect on I(V) instabilities observed on Ti/4H–SiC high voltage Schottky diodes

Anomaly in current at low forward bias is observed for large-area Ti Schottky diodes on n type 4H–SiC. Random telegraph signal (RTS) measurements, carried out on these defective devices, show discrete time switching of the current. Thermal activation of RTS signal gives two related trap signature (activation energy and cross section). Frequency analysis, using power spectral densities (PSDs) numerically calculated, confirms the presence of an extended defect which presents different charge states (i.e. an extended defect decorated by punctual traps). PSDs show two cut-off frequencies proving the individual response of two traps. Simulations of the I–V characteristics using two barrier heights modulated by a Gaussian function which represents the defect distribution show a good agreement with the experimental results. Finally we note that there's a strong correlation between traps observed by telegraph noise techniques and excess current.     

Calculation of the Schottky barrier and current–voltage characteristics of metal–alloy structures based on silicon carbide

A simple but nonlinear model of the defect density at a metal–semiconductor interface, when a Schottky barrier is formed by surface defects states localized at the interface, is developed. It is shown that taking the nonlinear dependence of the Fermi level on the defect density into account leads to a Schottky barrier increase by 15–25%. The calculated barrier heights are used to analyze the current–voltage characteristics of n-M/p-(SiC)_1–x(AlN)_x structures. The results of calculations are compared to experimental data.     

Capacitance–conductance–current–voltage characteristics of atomic layer deposited Au/Ti/Al2O3/n-GaAs MIS structures

We have studied the admittance and current–voltage characteristics of the Au/Ti/Al₂O₃/n-GaAs structure. The Al₂O₃ layer of about 5 nm was formed on the n-GaAs by atomic layer deposition. The barrier height (BH) and ideality factor values of 1.18 eV and 2.45 were obtained from the forward-bias ln I vs V plot at 300 K. The BH value of 1.18 eV is larger than the values reported for conventional Ti/n-GaAs or Au/Ti/n-GaAs diodes. The barrier modification is very important in metal semiconductor devices. The use of an increased barrier diode as the gate can provide an adequate barrier height for FET operation while the decreased barrier diodes also show promise as small signal zero-bias rectifiers and microwave. The experimental capacitance and conductance characteristics were corrected by taking into account the device series resistance R_s. It has been seen that the non-correction characteristics cause a serious error in the extraction of the interfacial properties. Furthermore, the device behaved more capacitive at the reverse bias voltage range rather than the forward bias voltage range because the phase angle in the reverse bias has remained unchanged as 90° independent of the measurement frequency.     

Accurate surface potential determination in Schottky diodes by use of correlated current and capacitance voltage measurements. Application to n–InP

Based on current voltage (I-V_g) and capacitance voltage (C-V_g) measurements, a reliable procedure is proposed to determine the effective surface potential V_d.V_g/ in Schottky diodes. In the framework of thermionic emission, our analysis includes both the effect of the series resistance and the ideality factor, even voltage dependent. This technique is applied to n-type indium phosphide (n-InP) Schottky diodes with and without an interfacial layer and allows us to provide an interpretation of the observed peak on the C-V_g measurements. The study clearly shows that the depletion width and the flat band barrier height deduced from C-V_g, which are important parameters directly related to the surface potential in the semiconductor, should be estimated within our approach to obtain more reliable information.     

The effect of sintering temperature on varistor characteristics of gallium arsenide–polyaniline–polyethylene composite varistors

GaAs-polymer composite varistors were prepared by hot pressing at a pressure of 60 MPa and different temperatures and their current–voltage characteristics were investigated. The results show that these varistors can be used to protect circuits from 46 V up to 54 V over voltages. In addition, it is found that the varistor breakdown voltage and its nonlinearity as well as its impurity band gap increase by increasing sintering temperature while the corresponding barrier height decreases. Each sample has hysteresis which decreases through the increase in sintering temperature. This causes the varistors to have longer lifetime due to their low degradation. Finally, the analysis of composite samples by scanning electron microscopy is presented and discussed.     

The influence of a voltage ramp on the measurement of I–V characteristics of a solar cell

For convenience and efficiency the voltage applied to a Si solar cell is often fairly rapidly driven from zero to the open circuit value typically at a constant rate of 1 V per millisecond. During this time the values of the current are determined as a function of the instantaneous voltage thus producing an I–V characteristic. It is shown here that the customary expressions for the current as a function of cell parameters remain still valid provided that the diffusion length in the expression for the dark current is changed from its steady state value L to the effective diffusion length L_i given by

$\text{L}{}_1\text{= L}\text{1+}\text{q}\text{V}\text{?}\text{kT}{}^{\mathrm{\tau }}\text{,}{}^{\mathrm{<mtext>1</mtext><mtext>2</mtext>}}$

where V is the ramp rate considered constant and τ is the lifetime of minority carriers. This result is true to a very good approximation provided that low level injection prevails.     

Temperature dependent of the current–voltage (I–V) characteristics of TaSi2/n-Si structure

Tantalum silicide (TaSi₂) thin films were deposited on n-type silicon single crystal substrates using a dual electron-gun system and with Ta and Si targets. The electrical transport properties of the TaSi₂/n-Si structures were investigated by temperature-dependent current–voltage (I–V) measurements. The temperature-dependent I–V characteristics revealed that the forward conduction was determined by thermionic-emission and space-charge-limited current mechanisms at low and high voltage respectively. On the other hand, the reverse current is limited by the carrier generation process.     

The effects of thermal annealing on the electrical characteristics of Au/n–InP/In diode

An Au/n–InP/In diode has been fabricated in the laboratory conditions and the current–voltage (I–V) and capacitance–voltage (C–V) characteristics of the diode have been measured in room temperature. In order to observe the effect of the thermal annealing, this diode has been annealed at temperatures 100 and 200 °C for 3 min in N₂ atmosphere. The characteristic parameters such as leakage current, barrier height and ideality factor of this diode have been calculated from the forward bias I–V and reverse bias C–V characteristics as a function of annealing temperature. Also the rectifying ratio of the diode is evaluated for as-deposited and annealed diode.     

The effect of subband quantization in the 2-D electron gas on thermionic current and heterojunction capacitance in an n-AlxGa1−xAs/n-GaAs heterojunction

The partition of the applied voltage between both sides of an n-AlGaAs/n-GaAs heterojunction is calculated, considering energy subband quantization in the very narrow triangular-like well in the GaAs and is used to calculate the thermionic current and the heterojunction capacitance as functions of the applied voltage. Comparison with classical calculations shows a difference of a few orders of magnitude in the current, especially in reverse bias, and a small difference in capacitance. By applying the model to self capacitance measured on heterojunction devices bounded with ohmic contacts on both sides, it is also shown how to obtain such parameters as conduction band discontinuity, doping in the AlGaAs, average distance of 2-D electron gas from the heterojunction, and sheet concentration. Experimental results using this method are within 10% of other recent determination of ΔE^c.     

Investigation on the mechanism of charge generation in organic heterojunctions: Analysis of I–V and C–V characteristics

The charge generation mechanism of organic heterojunction (OHJ) consisted of 1,4,5,8,9,11-hexaazatriphenylene-hexacarbonitrile (HAT-CN) and different hole transporting materials (HTMs) are studied systematically by current-voltage (I–V) and capacitance-voltage measurements. The analysis of I–V characteristics of the devices based on OHJs at forward and reverse voltages by comparing the thickness of HTM layers finds that a forward and reverse symmetrical I–V curve is observed at thin HTM layers and the forward current becomes larger than the reverse current with the increase of HTM thickness, fully illustrating the effectiveness of OHJ charge generation. Moreover, the I–V characteristics at different temperatures indicate that the efficient charge generation is originated from electron tunneling rather than diffusion. And the C–V and capacitance-frequency (C–F)characteristics further illustrate the highly efficient charge generation ability of OHJs so that the charge density is as high as 4.5 × 10¹⁷ cm⁻³, guaranteeing the high conductivity of OHJs, which is very beneficial to developing highly efficient OLEDs using OHJs as charge injector and generator.     

Study of stress biasing effect observed in C–V characteristics of ITO/PI/TIPS-pentacene/Au diodes by electric field induced optical second harmonic generation

To clarify the capacitance–voltage (C–V  ) characteristics of organic double-layer diodes with a structure of ITO/PI/TIPS-pentacene/Au, time-resolved electric field induced optical second harmonic generation (TR-EFISHG) measurement was employed. The TR-EFISHG measurement probed the change of electric fields in the TIPS-pentacene organic layer, which originates from accumulated charges at the PI/TIPS-pentacene double-layer interface. Consequently, the shift of threshold voltage ΔV_th$\mathrm{\Delta }{V}_{\mathit{th}}$ of the C–V curves caused by stress negative-biasing was well explained, and a potential well model was proposed on the basis of the TR-EFISHG measurement. TR-EFISHG is a very useful way to study the carrier behaviors, in terms of the C–V characteristics.     

Isothermal current–voltage characteristics of high-voltage 4<Emphasis Type="Italic">H</Emphasis>-SiC junction barrier Schottky rectifiers

The forward-pulse isothermal current–voltage characteristics of 4H-SiC junction barrier Schottky rectifiers (JBSs) with a nominal blocking voltage of 1700 V are measured in the temperature range from–80 to +90°C (193–363 K) up to current densities j of ~5600 A/cm² at–80°C and 3000 A/cm² at +90°C. In these measurements, the overheating of the structures relative to the ambient temperature, ΔT, did not exceed several degrees. At higher current densities, the effective injection of minority carriers (holes) into the base of the structures is observed, which is accompanied by the appearance of an S-type differential resistance. The pulsed isothermal current–voltage characteristics are also measured at a temperature of 77 K.