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In this paper, we describe a procedure for memory design and exploration for low power embedded systems. Our system consists of an instruction cache and a data cache on-chip, and a large memory off-chip. In the first step, we try to reduce the power consumption due to memory traffic by applying memory-optimizing transformations such as loop transformations. Next we use a memory exploration procedure to choose a cache configuration (cache size and line size) that satisfies the system requirements of area, number of cycles and energy consumption. We include energy in the performance metrics, since for different cache configurations, the variation in energy consumption is quite different from the variation in the number of cycles. The memory exploration procedure is very efficient since it exploits the trends in the cycles and energy characteristics to reduce the search space significantly. 相似文献
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Dynamic memory allocators for real‐time embedded systems need to fulfill three fundamental requirements: bounded worst‐case execution time, fast average execution time, and minimal fragmentation. Since embedded systems generally run continuously during their whole lifetime, fragmentation is one of the most important factors in designing the memory allocator. This paper focuses on minimizing fragmentation while other requirements are still satisfied. To minimize fragmentation, a part of a memory region is segregated by the proposed budgeting method that exploits the memory profile of the given application. The budgeting method can be applied for any existing memory allocators. Experimental results show that the memory efficiency of allocators can be improved by up to 18.85% by using the budgeting method. Its worst‐case execution time is analyzed to be bounded. 相似文献
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Pai H. Chou Jinfeng Liu Dexin Li Nader Bagherzadeh 《Design Automation for Embedded Systems》2002,7(3):205-232
Power-aware systems are those that must exploit a widerange of power/performance trade-offs in order to adapt to the power availabilityand application requirements. They require the integration of many novel powermanagement techniques, ranging from voltage scaling to subsystem shutdown.However, those techniques do not always compose synergistically with eachother; in fact, they can combine subtractively and often yield counterintuitive,and sometimes incorrect, results in the context of a complete system. Thiscan become a serious problem as more of these power aware systems are beingdeployed in mission critical applications.To address the problem of technique integration for power-aware embedded systems, we propose a new design tool framework called IMPACCT and the associated design methodology. The system modeling methodology includes application model for capturing timing/powerconstraints and mode dependencies at the system level. The tool performs power-awarescheduling and mode selection to ensure that all timing/power constraintsare satisfied and that all overhead is taken into account. IMPACCT then synthesizesthe implementation targeting a symmetric multiprocessor platform. Experimentalresults show that the increased dynamic range of power/performance settingsenabled a Mars rover to achieve significant acceleration while using lessenergy. More importantly, our tool correctly combines the state-of-the-arttechniques at the system level, thereby saving even experienced designersfrom many pitfalls of system-level power management. 相似文献
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System-on-a-chip platform manufacturers are increasingly adding configurable features that provide power and performance flexibility, in order to increase a platform's applicability to a variety of embedded computing systems. We illustrate the energy benefits of combining the configurable features of voltage scaling and cache way shutdown in a single platform. We describe methods to assist a designer to tune such a platform to a particular software task and to particular energy optimization criteria. 相似文献
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文章介绍了一种适合于混合业务类型、非均匀业务流两步长VP动态带宽管理策略,分析了带宽管理策略的带宽利用率、连接阻塞概率和带宽分配处理负载,对其进行了计算机模拟仿真,并与固定步长动态带宽管理策略进行了分析比较。 相似文献
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Hai Thanh Mai Kyoung Hyun Park Hun Soon Lee Chang Soo Kim Miyoung Lee Sung Jin Hur 《ETRI Journal》2014,36(6):988-998
For memory‐based big data storage, using hybrid memories consisting of both dynamic random‐access memory (DRAM) and non‐volatile random‐access memories (NVRAMs) is a promising approach. DRAM supports low access time but consumes much energy, whereas NVRAMs have high access time but do not need energy to retain data. In this paper, we propose a new data migration method that can dynamically move data pages into the most appropriate memories to exploit their strengths and alleviate their weaknesses. We predict the access frequency values of the data pages and then measure comprehensively the gains and costs of each placement choice based on these predicted values. Next, we compute the potential benefits of all choices for each candidate page to make page migration decisions. Extensive experiments show that our method improves over the existing ones the access response time by as much as a factor of four, with similar rates of energy consumption. 相似文献
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适用于混合业务类型的两步法ATM网络VP带宽动态管理策略的研究 总被引:1,自引:1,他引:0
本文介绍了一种适合于混合业务类型、非均匀业务流两步长VP动态带宽管理策略,分析了带宽管理策略的带宽利用率、连接阻塞概率和带宽分配处理负载。对其进行了计算机模拟仿真,并与固定步长动态带宽管理策略进行了分析比较 相似文献
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D. Masmoudi W. A. Serdijn J. Mulder A. C. Van Der Woerd J. Tomas J. P. Dom 《Analog Integrated Circuits and Signal Processing》2000,22(2-3):221-229
A new current mode synthesis method for dynamic translinear filters is proposed. As a design example, we have considered an ultra-low power second order filter working in audio frequency range, for hearing aids application, and using subthreshold MOS devices. It has a nominal supply voltage of 1.2 V and works down to 1 Volt. It has a power consumption of 5 W. The filter cut-off frequency and its Q factor can be tuned respectively from 600 Hz to 13 kHz and from 0.6 to 1.1. Mismatch problems are investigated on the circuit level and an on-chip compensation method is proposed. 相似文献
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嵌入式系统动态电源管理预测算法研究 总被引:2,自引:1,他引:1
针对目前在嵌入式系统中动态电源管理普遍采用超时算法节能效率低的缺点,采用预测的方法进行动态电源管理.提出一个动态电源管理预测算法,该算法通过利用设备空闲状态的历史信息对未来的空闲时间进行预测,预测结果作为动态电源管理的依据.实验结果说明该算法对工作状态平稳的系统空闲预测效果比较理想,适用于动态电源管理. 相似文献
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This paper presents the results of resistive-open defect insertion in different locations of Infineon 0.13 m embedded-SRAM with the main purpose of verifying the presence of dynamic faults. This study is based on the injection of resistive defects as their presence in VDSM technologies is more and more frequent. Electrical simulations have been performed to evaluate the effects of those defects in terms of detected functional faults. Read destructive, deceptive read destructive and dynamic read destructive faults have been reproduced and accurately characterized. The dependence of the fault detection has been put in relation with memory operating conditions, resistance value and clock cycle, and the importance of at speed testing for dynamic fault models has been pointed out. Finally resistive Address Decoder Open Faults (ADOF) have been simulated and the conditions that maximize the fault detection have been discussed as well as the resulting implications for memory test.This work has been partially funded by the French government under the framework of the MEDEA + A503 ASSOCIATE European program.A paper based on this work was presented at the Eighth IEEE European Test Workshop, Maastricht, The Netherlands, May 2003.Simone Borri received the M.Sc. Degree (summa cum laude) in Electronics Engineering from the University of Pisa (Italy) in 1995. In 1997 he joined STMicroelectronics as a digital designer in the DSP development group of S.S.D. (formerly Parthus, now Ceva), Dublin, Ireland. From 1998 to 2000 he was with ST Microelectronics, Milan, Italy as ASIC DSP designer in the Car Communication business unit. Since 2000 he is with Infineon Technologies, Sophia-Antipolis, France as Staff design engineer in the embedded-SRAM design group. He has recently joined the Secure Mobile System Business Unit. His current interests include BIST, DFT techniques and SoC verification. Simone is an IEEE member since 1995.Magali Hage-Hassan was born near Lyon (France) in 1979. She received a Master of Science degree of Microelectronics and Automatics from the Institute of Engineering Sciences of Montpellier in 2003. She is currently working for Infineon in the memory library department in Sophia-Antipolis. She participated to the European research project MEDEA associate. Hage-Hassans interest include memory test.Luigi Dilillo was born in Barletta (Italy) in 1974. At this moment he is doing his last year of Ph.D. in the Microelectronics Department of the Laboratory of Informatics, Robotics and Microelectronics of Montpellier (LIRMM) in France. He received his degree in Electrical Engineering in 2001, at Politecnico di Torino (Italy). His researches include MEMS and digital circuits. At this moment he is working on delay-fault testing, and memory testing.Patrick Girard is presently Researcher at CNRS (French National Center for Scientific Research), and works in the Microelectronics Department of the LIRMM (Laboratory of Informatics, Robotics and Microelectronics of Montpellier—France). His research interests include the various aspects of digital testing, with special emphasis on DfT, logic BIST, delay fault testing and diagnosis, low power testing and memory testing. He has authored and co-authored 1 book and more than 100 papers on these fields. He has managed several European research projects and industrial research contracts. He is Editor-in-Chief of JOLPE—Journal of Low Power Electronics, and Associate Editor of JEC—Journal of Embedded Computing. He will serve as Program vice-Chair for the International Conference on Embedded And Ubiquitous Computing in 2005 and as Program Chair for the IEEE International Workshop on Electronic Design, Test & Applications in 2006. He is also topic chair of two European conferences (DATE and ETS) and is member of the program committee of several other international conferences. Patrick GIRARD obtained the Ph.D. degree in microelectronics from the University of Montpellier in 1992 and the Habilitation à Diriger des Recherches degree from the University of Montpellier in 2003.Serge Pravossoudovitch was born in 1957. He is currently professor in the electrical and computer engineering department of the University of Montpellier and his research activities are performed at LIRMM (Laboratoire dInformatique, de Robotique et de Microélectronique de Montpellier). He got the Ph.D. degree in electrical engineering in 1983 for his work on symbolic layout for IC design. Since 1984, he is working in the testing domain. He obtained the doctorat détat degree in 1987 for his work on switch level automatic test pattern generation. He is presently interested in memory testing, delay fault testing, design for testability and power consumption optimization. He has authored and co-authored numerous papers on these fields, and has supervised several Ph.D. dissertations. He has also participated to several European projects (Microelectronic regulation, Esprit, Medea).Arnaud Virazel was born in Montpellier (France) in 1974. He is presently assistant professor at the university of Montpellier, and works with the LIRMM (Laboratoire dInformatique, de Robotique et de Microélectronique de Montpellier). He received the B.Sc. (1995) and the M.Sc. (1997) degrees in Electrical Engineering and the Ph.D. (2001) degree in Microelectronics, all from the University of Montpellier/LIRMM. A. Virazels interests include delay testing, memory testing and power optimization during test. 相似文献
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无线传感器网络动态数据管理——GUI编程及实现 总被引:3,自引:0,他引:3
无线传感器网络作为分布式网络典型代表,是计算、通信和传感器三项技术相结合的产物。是一种全新的信息获取和处理技术。文中重点讲述了利用VC和微软基础类库实现的动态数据管理图形用户界面的功能、特点、设计思想。它具有拓扑显示,波形显示及温度显示功能,允许用户在图形界面上通过可视化方式实时监测从传感器网络传来的数据。 相似文献
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针对PA的非线性和记忆效应,有记忆自适应预失真技术是最有效的线性化技术.在选取合适阶数、记忆深度的有记忆多项式模型的基础上,采用RLS和LMS结合的混合算法,并设定误差门限值以使两种算法合理转换.仿真分析表明,该方法可以有效补偿系统的非线性和记忆效应. 相似文献
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This paper presents a new distributed location management strategy for cellular mobile systems. Its salient features are fast location update and query, load balancing among location servers, and scalability. The strategy employs dynamic hashing techniques and quorums to manage location update and query operations. The proposed strategy does not require a home location register (HLR) to be associated with each mobile node. Location updates and queries for a mobile node are multicast to subsets of location servers, which change with time depending on the location of mobile node/querying node and load on the servers. Simulation experiments demonstrate that such dynamism prevents situations of heavy load on some location servers when mobile nodes are not uniformly distributed in space, or when some mobile nodes have their location updated or queried more often than others. Also, queries return the latest location information of a mobile node with a very high probability. The proposed scheme requires at most one unicast and two rounds of message multicasting for location update and query operations. All multicast messages have a small payload and are restricted to the high bandwidth wired part of the mobile network resulting in low communication overhead. Moreover, if a quorum of location servers gets overloaded, part of its load can be transferred to another lightly loaded quorum using dynamic hashing techniques. 相似文献
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针对大部分嵌入式系统的电池电源管理问题,设计了一种为嵌入式系统——尤其是应用在手持式和便携式设备的嵌入式系统进行电源管理的单元电路模块。该电源管理电路以MAX8903为核心,具有输入范围宽、体积紧凑、外围电路简单、工作效率较高等优点,可以在嵌入式系统中用来管理电池充电、电源选择、电源检测等,很好地满足了电源管理单元的功能需求。 相似文献
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在B/S架构下基于MVC模式设计开发了稠油热采一体化数据管理系统,运用Oracle数据库技术集成多种数据源建立了统一的数据库平台,综合利用JSP动态网页编程技术、JFreeChart图表绘制技术、POI报表生成技术及MapXtreme动态地图技术,实现了数据的录入、动态查询、审核、修改、删除、统计分析、报表生成及井控管理、井位图绘制等功能,具有灵活性、实用性、专业性、针对性的特点。系统在滨南采油三矿安装运行半年有余,运行稳定可靠。响应速度快,多种数据源的数据转换准确率达到了100%,提高了生产及管理的效率。在各稠油油区具有很大的推广应用价值 相似文献
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介绍了江苏省电信网管中心各专业网管系统的组织结构和现状,简要分析了如何根据TMN标准,确立发展方向及工作重点,使网管系统能更好地为企业运营服务. 相似文献
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Wireless Networks - Energy related research in wireless ad hoc sensor networks (WASNs) is focusing on energy saving techniques in the application-, protocol-, service-, or hardware-level. Little... 相似文献