44-GHz monolithic GaAs FET amplifier

Millimeter-wave monolithic GaAs FET amplifiers have been developed. These amplifiers were fabricated using FET's with MBE-grown active layers and electron-beam defined sub-half-micrometer gates. Source groundings are provided through very low inductance via holes. The single-stage amplifier has achieved over a 10-dB gain at 44 GHz. A 300-µm gate-width amplifier has achieved an output power of 60 mW with a power density of 0.2 W per millimeter of gate width.     

A monolithic three-stage 2-8-GHz feedback amplifier

A monolithic three-stage resistive-feedback amplifier has been developed for the 2-8-GHz band. This amplifier uses a novel approach which incorporates three stages with varying FET gate widths. The measured gain is 19 ± 1 dB and the VSWR is 2.3:1 in this band. The amplifier chip has a noise figure of ∼6 dB over the bandwidth. The chip size is less than 2.0 × 1.6 mm²and includes the bias circuitry. The amplifier also has AGC capability with more than 20 dB of gain control.     

A monolithic GaAs 1 - 13-GHz traveling-wave amplifier

This paper describes a monolithic GaAs traveling-wave amplifier with 9-dB gain and ± 1-dB gain flatness in the 1-13-GHz frequency range. The circuit is realized in monolithic form on a 0.1-mm GaAs substrate with 50-Ω input and output lines. In this approach, GaAs FET's periodically load input and output microstrip lines and provide the coupling between them with proper phase through their transconductance. Experimental results and the circuit details of such a structure are discussed. Initial results of a noise analysis and predictions on the noise performance are also given.     

A monolithic GaAs DC to 2-GHz feedback amplifier

Resistive feedback in low-frequency FET amplifiers is an attractive method of simultaneously attaining gain flatness and excellent input-output VSWR over wide bandwidths. Combined with simple matching circuitry, the feedback approach allows the design of general-purpose utility amplifiers requiring much less chip area than when conventional matching techniques are used. The 1.5- by 1.5-mm chip described in this paper provides 10-dB ± 1-dB gain, excellent input and output VSWR, and saturated output power in excess of + 20 dBm, from below 5 MHz to 2 GHz. The noise figure is approximately 2 dB when biased for minimum noise, with an associated gain of 9 dB.     

K-band monolithic InGaP-InGaAs DCFET amplifier using BCB coplanar waveguide technology

A K-band (20 GHz) monolithic amplifier was developed and fabricated by adopting a low-/spl kappa/ benzocyclobutene (BCB) coplanar waveguide (CPW) line and InGaP-InGaAs doped-channel HFETs (DCFETs). This monolithic microwave integrated circuit (MMIC) utilizes a high impedance BCB CPW microstrip line (Z/sub 0/=70 /spl Omega/) for the biasing circuits, and a Z/sub 0/=50 /spl Omega/ line for the RF signal transmission. The low dielectric constant characteristic of the BCB interlayer is beneficial for a common-ground bridge process, which reduces the parasitics. The calculated loss tan/spl delta/ is 0.036 for the BCB at 20 GHz. The one-stage MMIC amplifier achieves an S/sub 21/ of 5 dB at 20 GHz, which is the first demonstration of the K-band InGaP-InGaAs DCFET monolithic circuit.     

A wide-band monolithic instrumentation amplifier [application of voltage-current convertor]

Describes a new voltage-to-current converter. This converter combines accuracy with differential signal handling and a high common-mode rejection ratio (CMRR). An application in an instrumentation amplifier consisting of two voltage-to-current converters in a balancing circuit shows the versatility of these units in analog circuit design. A remarkable point of the instrumentation amplifier is that the bandwidth (800 kHz) remains constant although the voltage gain varies from 1 to 10/SUP 4/.     

A 6.5—16-GHz monolithic power amplifier module

A miniaturized 6.5-16-GHz power amplifier module, which includes T/R switch, dual polarity power supply, switch driver, and gate functions, was designed using two types of broad-band MMIC amplifiers. The two cascade designs were a 900-1200-µm FET amplifier and a 300-300-µm feedback amplifier which were used to provide large and small gain functions, respectively. The module exhibits 35 dB of gain, 1-W power output, and 55-dB T/R switch isolation.     

A design procedure for monolithic matrix amplifier

A procedure for the design of monolithic matrix amplifier is proposed. A simplified expression for small signal gain based on unilateral field-effect transistor (FET) model is derived. In particular, the Design-Oriented FET model previously published is adopted. The introduction of a set of design charts allows the designer a fast and accurate prediction of low frequency gain and 3-dB cutoff frequency of a given matrix amplifier. Good agreement with experimental data and simulations confirms the validity of the proposed design method     

39 GHz monolithic coplanar waveguide amplifier using doped channel HFET technology on InP

A single-state amplifier has been designed and fabricated using 0.25 mu m gate length, doped-channel HFET technology on InP substrates. Coplanar waveguide (CPW) was used for impedance matching. A gain of 14.4 dB was measured at 39 GHz.<>     

27-GHz bandwidth high-speed monolithic integrated optoelectronicphotoreceiver consisting of a waveguide fed photodiode and anInAlAs/InGaAs-HFET traveling wave amplifier

A monolithic integrated photoreceiver for 1.55-μm wavelength has been designed for operation in a 20-Gb/s synchronous digital hierarchy system (SDH/SONET), based on a new integration concept. The optoelectronic integrated circuit (OEIC) receiver combines a waveguide-integrated PIN-photodiode and a traveling wave amplifier in coplanar waveguide layout with four InAlAs/InGaAs/InP-HFETs (0.7-μm gate length). The receiver demonstrates a bandwidth of 27 GHz with a low frequency transimpedance of 40 dBΩ. This is, to our knowledge, the highest bandwidth ever reported for a monolithic integrated photoreceiver on InP. Furthermore, a receiver sensitivity of -12 dBm in the fiber (20 Gb/s, BER=10^-9) and an overall optical input dynamic range of 27 dB is achieved. Optical time domain multiplex (TDM) system experiments of the receiver packaged in a module show an excellently shaped eye pattern for 20 Gb/s and an overall sensitivity of -30.5 dBm (BER=10^-9) [including erbium doped fiber amplifiers (EDFA)]     

A fast-settling monolithic operational amplifier using doublet compression techniques

A new high-speed monolithic operational amplifier is described which uses an improved feedforward circuit configuration to achieve a total acquisition time (slewing plus settling) of 650 ns with a 10-V input step without compromising dc performance or requiring costly nonstandard processing.     

A monolithic PDMS waveguide system fabricated using soft-lithography techniques

A monolithic waveguide system using poly(dimethyl siloxane) (PDMS) was designed, fabricated, and characterized. The waveguide demonstrated good confinement of light and relatively low attenuation at 0.40 dB/cm. The robustness and handling properties of the completed waveguides were excellent, and the process yield exceeded 96%. The waveguide did exhibit moderate temperature and humidity sensitivity but no temporal variation, and insertion loss remained stable over extended periods of time. Applications of this waveguide system in microscale sensing are immense, judging by the frequency of use of PDMS as the substrate for microfluidic and biomedical systems. The monolithic nature of the waveguides also reduces their cost and allows integration of optical pathways into existing PDMS-based microsystems.     

A 15-GHz monolithic low-phase-noise VCO using AlGaAs/GaAs HBTtechnology

A 15-GHz fully monolithic low-phase-noise VCO MMIC fabricated without an external tuning element using an AlGaAs/GaAs HBT technology was developed. An HBT and a variable capacitance diode or varactor were fabricated in an MMIC chip using-standard HBT IC process. A tuning range of about 600 MHz was obtained with varying control voltage from 0 to 4 V with an output power of more than -4 dBm. The low phase noise for an offset frequency of 100 kHz of -85 dBc/Hz was measured at a frequency of 15.6 GHz     

A 1.9-GHz silicon receiver with monolithic image filtering

A 1.9-GHz fully monolithic silicon superheterodyne receiver front-end is presented; it consists of a low noise amplifier (LNA), a tunable image reject filter, and a Gilbert cell mixer integrated in one die. The receiver was designed to operate with a 1.9-GHz RF and a 2.2-GHz local oscillator (LO) for a 300-MHz IF. Two chip versions were fabricated on two different fabrication runs using a 0.5-μm bipolar technology with 25 GHz transit frequency (f_T). Measured performance for the receiver front-end version 1, packaged and without input matching, was: conversion gain 33.5 dB, noise figure 4.9 dB, input IP3 -28 dBm, image rejection 53 dB (tuned to reject a 2.5-GHz image frequency), and 15.9 mA current consumption at +3 V. The image rejection was tunable from 2.4-2.63 GHz by means of an on-chip varactor. Version 2 had increased mixer degeneration for improved linearity. Its measured performance for the packaged receiver with its input matched to 50 Ω was: conversion gain 24 dB, noise figure 4.8 dB, input IP3 -19 dBm, and 65 dB image rejection for a 2.5-GHz image with an image tuning range from 2.34-2.55 GHz     

A fully monolithic 260-/spl mu/W, 1-GHz subthreshold low noise amplifier

A micro-power complementary metal oxide semiconductor (CMOS) low-noise amplifier (LNA) is presented based on subthreshold MOS operation in the GHz range. The LNA is fabricated in an 0.18-/spl mu/m CMOS process and has a gain of 13.6 dB at 1 GHz while drawing 260 /spl mu/A from a 1-V supply. An unrestrained bias technique, that automatically increases bias currents at high input power levels, is used to raise the input P1dB to -0.2 dBm. The LNA has a measured noise figure of 4.6 dB and an IIP3 of 7.2 dBm.     

40-GHz transimpedance amplifier with differential outputs using InP-InGaAs heterojunction bipolar transistors

High-gain and high-bandwidth transimpedance amplifiers (TIAs) are required for fiber-optic receiver modules. This paper reports on the design, fabrication, and characterization of a 40-Gb/s TIA for SONET/SDH STS-768/STM-256 applications based on an InP-InGaAs single heterojunction bipolar transistor (SHBT) process developed at Vitesse Semiconductor Corporation (Vitesse Indium Phosphide Release 1 or VIP-1). This amplifier consists of a single-ended input transimpedance pre-amplifier and a differential output post-amplifier. The measured differential transimpedance is 1800 /spl Omega/ with -3-dB bandwidth greater than 40 GHz. The high gain of this circuit eliminates the need for a standalone limiting amplifier between the conventional transimpedance pre-amplifier and the demultiplexer in short-reach applications.     

A power efficient differential 20-GHz low noise amplifier with 5.3-GHz 3-dB bandwidth

A 20-GHz differential two-stage low-noise amplifier (LNA) is demonstrated in a foundry digital 130-nm CMOS technology with 8-metal layers. This LNA has 20-dB voltage gain and /spl sim/5.5-dB noise figure at 20GHz with 24-mW power consumption. The measured IP/sub 1 dB/ and IIP/sub 3/ are -11 dBm and -4dBm. Compared to the previously published bulk CMOS LNAs operating above 20GHz, this LNA has exceptionally low power and current consumption especially considering its differential topology and wide bandwidth.     

A design technique for a high-gain, 10-GHz class-bandwidth GaAsMESFET amplifier IC module

A design procedure is proposed for a high-gain and wideband IC module, using stability analysis and a unified design methodology for ICs and packages. A multichip structure is developed using stability analysis and the requirements for stable operation are determined for each IC chip, package, and interface condition between them. Furthermore, to reduce the parasitic influences, several improvements in the interface and package design are clarified, such as wideband matching and LC resonance damping. IC design using effective feedback techniques for enlarging the bandwidth are also presented. The ICs are fabricated using 0.2-μm GaAs MESFET IC technology. To verify the validity of these techniques, an equalizer IC module for 10-Gb/s optical communication systems was fabricated, achieving a gain of 36 dB and a bandwidth of 9 GHz     

Compact duplexer-polarizer with semicircular waveguide [antennafeed]

A light, compact, and high-performance duplexer-polarizer able to generate circularly polarized waves in a circular waveguide is discussed. Two prototypes were built. The standing-wave-ratio (SWR) and ellipticity performances are extremely good (less than 0.15 dB ellipticity over 15% bandwidth). The experimental development was facilitated by the computation of the dispersion curves and of the transverse field distribution associated with the two fundamental guided modes propagating in the different sections of a septum waveguide     

A novel CMOS low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band wireless receivers

An ultra-wideband (UWB) 3.1- to 10.6-GHz low-noise amplifier (LNA) employing a common-gate stage for wideband input matching is presented in this paper. Designed in a commercial 0.18-/spl mu/m 1.8-V standard RFCMOS technology, the proposed UWB LNA achieves fully on-chip circuit implementation, contributing to the realization of a single-chip CMOS UWB receiver. The proposed UWB LNA achieves 16.7/spl plusmn/0.8 dB power gain with a good input match (S11<-9 dB) over the 7500-MHz bandwidth (from 3.1 GHz to 10.6 GHz), and an average noise figure of 4.0 dB, while drawing 18.4-mA dc biasing current from the 1.8-V power supply. A gain control mechanism is also introduced for the first time in the proposed design by varying the biasing current of the gain stage without influencing the other figures of merit of the circuit so as to accommodate the UWB LNA in various UWB wireless transmission systems with different link budgets.