Precision measurement method for cryogenic amplifier noise temperatures below 5 K

We report precision measurements of the effective input noise temperature of a cryogenic (liquid-helium temperature) monolithic-microwave integrated-circuit amplifier at the amplifier reference planes within the cryostat. A method is given for characterizing and removing the effect of the transmission lines between the amplifier reference planes and the input and output connectors of the cryostat. In conjunction with careful noise measurements, this method enables us to measure amplifier noise temperatures below 5 K with an uncertainty of 0.3 K. The particular amplifier that was measured exhibits a noise temperature below 5.5 K from 1 to 11 GHz, attaining a minimum value of 2.3 K/spl plusmn/0.3 K at 7 GHz. This corresponds to a noise figure of 0.034 dB/spl plusmn/0.004 dB. The measured amplifier gain is between 33.4 dB/spl plusmn/0.3 dB and 35.8 dB/spl plusmn/0.3 dB over the 1-12-GHz range.     

A Low Phase-Noise Voltage-Controlled SAW Oscillator With Surface Transverse Wave Resonator for SONET Application

A surface transverse wave (STW) resonator-based oscillator was developed in response to SONET OC-48 application. To meet the low jitter objective, a high-Q STW resonator was designed and fabricated in this study. The residual phase-noise measurement techniques are used to evaluate the feedback oscillator components, such as the loop amplifier, STW resonator, and electronic phase shifter, which can play important roles in determining the oscillator's output phase-noise spectrum. The oscillator's white phase-noise floor is -170dBc/Hz for carrier-offset frequency greater than 1 MHz. The oscillator's phase-noise level is -67dBc/Hz at a 100-Hz carrier offset. Both low close-in phase-noise and low white phase-noise floor makes the oscillator meet low jitter requirement. The electronic frequency tuning range exceeds plusmn200ppm. The oscillator provides 13.5 dBm of output power and consumes 65 mA from +5-V power supply     

Integrated Amplifier Circuits for 60 GHz Broadband Telecommunication

Wide frequency bandwidth has been internationally allocated for unlicensed operation around the oxygen absorption frequency at 60 GHz. A power amplifier and a low noise amplifier are presented as building blocks for a T/R-unit at this frequency. The fabrication technology was a commercially available 0.15 m gallium arsenide (GaAs) process featuring pseudomorphic high electron mobility transistors (PHEMT). Using on-wafer tests, we measured a gain of 13.4 dB and a +17 dBm output compression point for the power amplifier at 60 GHz centre frequency when the MMIC was biased to 3 volts V_dd. At the same frequency, the low noise amplifier exhibited 24 dB of gain with a 3.5 dB noise figure. The AM/AM and AM/PM characteristics of the power amplifier chip were obtained from the large-signal S-parameter measurement data. Furthermore, the power amplifier was assembled in a split block package, which had a WR-15 waveguide interface in input and output. The measured results show a 12.5 dB small-signal gain and better than 8 dB return losses in input and output for the packaged power amplifier.     

Pr/sup 3+/-doped fluoride fiber amplifier module pumped by a fiber coupled master oscillator/power amplifier laser diode

We constructed the first Pr/sup 3+/-doped fluoride fiber amplifier (PDFA) module pumped by a fiber-coupled master oscillator/power amplifier laser diode (MOPA-LD) operating at 1.017 /spl mu/m. The maximum signal gain and noise figure were 30.5 and 5.5 dB, respectively. An output power of 18 dBm was achieved at an input signal power of 0 dBm. Furthermore, we showed that the use of MOPA-LD pumping, rather than conventional Nd-YLF laser pumping, makes it possible to halve the length of the Pr/sup 3+/-doped fluoride required in the amplifier module and also allows a broader spectral bandwidth to be achieved.     

433MHz ASK接收机射频前端电路设计

设计了一款应用在433MHz ASK接收机中的射频前端电路。在考虑了封装以及ESD保护电路的寄生效应的同时,从噪声、匹配、增益和线性度等方面详细讨论了低噪声放大器和下混频器的电路设计。采用0.18μm CMOS工艺,在1.8V的电源电压下射频前端电路消耗电流10.09 mA。主要的测试结果如下:低噪声放大器的噪声系数、增益、输入P1dB压缩点分别为1.35 dB、17.43 dB、-8.90dBm;下混频器的噪声系数、电压增益、输入P1dB压缩点分别为7.57dB、10.35dB、-4.83dBm。     

毫米波大动态宽带单片低噪声放大器

利用0.25μmGaAsPHEMT低噪声工艺,设计并制造了2种毫米波大动态宽带单片低噪声放大器。第1种为低增益大动态低噪声放大器,单电源+5V工作,测得在26～40GHz范围内,增益G=10±0.5dB,噪声系数NF≤2.2dB,1分贝压缩点输出功率P1dB≥15dBm;第2种为低压大动态低噪声放大器,工作电压为3.6V,静态电流0.6A(输出功率饱和时,动态直流电流约为0.9A),在28～35GHz范围内,测得增益G=14～17dB,噪声系数约4.0dB,1分贝压缩点输出功率P1dB≥24.5dBm,最大饱和输出功率≥26.8dBm,附加效率约10%～13.6%。结果中还给出了2种放大器直接级联的情况。     

Millimeter-Wave Integrated Circuits in 65-nm CMOS

We present the design and measurement results of millimeter-wave integrated circuits implemented in 65-nm baseline CMOS. Both active and passive test structures were measured. In addition, we present the design of an on-chip spiral balun and the transition from CPW to the balun and report transistor noise parameter measurement results at V-band. Finally, the design and measurement results of two amplifiers and a balanced resistive mixer are presented. The 40-GHz amplifier exhibits 14.3 dB of gain and the 1-dB output compression point is at $+$6-dBm power level using a 1.2 V supply with a compact chip area of 0.286 ${hbox{mm}}^{2}$. The 60-GHz amplifier achieves a measured noise figure of 5.6 dB at 60 GHz. The AM/AM and AM/PM results show a saturated output power of $+$7 dBm using a 1.2 V supply. In downconversion, the balanced resistive mixer achieves 12.5 dB of conversion loss and $+$5 dBm of 1-dB input compression point. In upconversion, the measured conversion loss was 13.5 dB with $-$19 dBm of 1-dB output compression point.      

Predicting random jitter - Exploring the current simulation techniques for predicting the noise in oscillator, clock, and timing circuits

The random jitter performance of clock, oscillator, and timing circuits can be predicted by using steady-state circuit simulation techniques that determine phase noise by analyzing the impact on phase due to thermal, flicker, channel, and shot noise present in the electronic devices. Given the phase noise response, and the steady-state operating conditions of the circuit, a wide variety of jitter measurements can be computed. Each involves a transformation of the phase noise results, with accuracy hinging on the quality of the phase noise response over a suitable range of offset frequencies     

A 1-GHz BiCMOS RF front-end IC

An RF front-end IC containing a low-noise amplifier and mixer is described. On-chip temperature and supply-voltage compensation is used to stabilize circuit performance. Realized in a BiCMOS process, the circuit consumes 13.0-mA total current from a 5-V supply. The amplifier gain at 900 MHz is 16 dB, the noise figure is 2.2 dB, and the input third-order intermodulation intercept is -10 dBm. The mixer input third-order intermodulation intercept is +6 dBm with 15.8 dB noise figure     

基于前馈结构的宽带高线性低噪声放大器

设计制作了一款工作频率范围为0.5~30.0 MHz的短波宽带高线性低噪声放大器。采用前馈法线性化技术实现了放大器的高线性与低噪声,其中主放大器采用平衡式结构线性化技术大幅改善了放大器的二阶失真。由于主放大器和辅助放大器均采用Gain Block MMIC放大器,使得该放大器的物理尺寸为40 mm×25 mm,从而实现了小型化。测试结果表明,该放大器在0.5~30.0 MHz约5.9个倍频程的工作频率范围内实现了增益为12 dB,增益平坦度为0.35 dB,最大噪声系数为3.2 dB,输出三阶截点大于55 dBm,输出二阶截点大于100 dBm。     

A 2.7-V 900-MHz CMOS LNA and mixer

A CMOS low-noise amplifier (LNA) and a mixer for RF front-end applications are described. A current reuse technique is described that increases amplifier transconductance for the LNA and mixer without increasing power dissipation, compared to standard topologies. At 900 MHz, the LNA minimum noise figure (NF) is 1.9 dB, input third-order intercept point (IIP3) is -3.2 dBm and forward gain is 15.6 dB. With a 1-GHz local oscillator (LO) and a 900-MHz RF input, the mixer minimum double sideband noise figure (DSB NF) is 5.8 dB, IIP3 is -4.1 dBm, and power conversion gain is 8.8 dB. The LNA and mixer, respectively, consume 20 mW and 7 mW from a 2.7 V power supply. The active areas of the LNA and mixer are 0.7 mm×0.4 mm and 0.7 mm×0.2 mm, respectively. The prototypes were fabricated in a 0.5-μm CMOS process     

An ultra-wideband CMOS low noise amplifier for 3-5-GHz UWB system

An ultra-wideband (UWB) CMOS low noise amplifier (LNA) topology that combines a narrowband LNA with a resistive shunt-feedback is proposed. The resistive shunt-feedback provides wideband input matching with small noise figure (NF) degradation by reducing the Q-factor of the narrowband LNA input and flattens the passband gain. The proposed UWB amplifier is implemented in 0.18-/spl mu/m CMOS technology for a 3.1-5-GHz UWB system. Measurements show a -3-dB gain bandwidth of 2-4.6GHz, a minimum NF of 2.3 dB, a power gain of 9.8 dB, better than -9 dB of input matching, and an input IP3 of -7dBm, while consuming only 12.6 mW of power.     

L 波段宽带低温低噪声放大器的设计与测量*

高电子迁移率晶体管(HEMT)的小信号等效电路低温模型是研制致冷低噪声放大器(LNA)与研究晶 体管微波特性的基础。该文通过测量HEMT 器件在低温环境下直流参数与散射参数(S 参数),构建了包含噪声参 量的小信号等效电路,并据此设计了一款覆盖L 波段的宽带低温低噪声放大器(LNA),工作频率1 ~2GHz,相对带宽 达到66. 7%。在常温下放大器功率增益大于28dB,噪声温度小于39K;当环境温度制冷至11K 时,噪声温度为1. 9 ~3. 1K,输入输出端口的回波损耗S11 和S22 均优于-10dB,1dB 压缩点输出功率为9. 2dBm,功耗仅为54mW。     

High-power Er-Yb-doped fiber amplifier with multichannel gain flatness within 0.2 dB over 14 nm

A high-power Er-Yb fiber amplifier for WDM applications has been constructed using a matched mid-stage gain shaping filter. Using precise measurements and careful design considerations, excellent gain flatness, with less than 0.2-dB variation, was obtained over a 14-nm spectral bandwidth. By simply adjusting the pump power to the amplifier, it was possible to maintain the flattened amplifier gain shape over a wide input signal power range from -11 dBm to 1 dBm. A low external noise figure of 5.2 dB at 1-dBm signal input and a high-output power up to 24.6 dBm has been measured.     

45 GHz active HEMT mixer

A low-noise 45 GHz mixer has been realised using a high electron mobility transistor (HEMT). This is the first reported active mixer above 30 GHz and the first reported HEMT mixer. The mixer exhibits 1.5 dB maximum gain at 4 dBm local oscillator (LO) power and 8.1 dB noise figure, including a 2.6 dB NF IF amplifier, at 2 dBm LO power.     

一种新型900MHz CMOS低噪声放大器的设计

对两种低噪声放大器(LNA)的构架进行了比较,详细推导了共源LNA的噪声系数与输入晶体管栅宽的关系及优化方法,设计了一种采用0.6 μ m标准CMOS工艺,工作于900MHz的新型差分低噪声放大器.在900MHz时,噪声系数为1.5 dB的情况下可提供22.5 dB的功率增益,-3dB带宽为1 50MHz,S11达到-38dB,消耗的电流为5mA.     

High gain limiting erbium-doped fibre amplifier with over 30 dB dynamic range

A limiting optical amplifier is demonstrated using three cascaded stages of erbium-doped fibre amplifiers. A constant output power of +12.9 dBm was obtained for an input power ranging from -30 to 1.5 dBm. The optical noise figure of the amplifier has been measured over the >30 dB dynamic range. Design guidelines for optical limiting amplifiers are also presented.<>     

A Fully Integrated Direct-Conversion Receiver for CDMA and GPS Applications

This paper describes a fully integrated zero-IF receiver for cellular CDMA and GPS applications. The single-chip zero-IF receiver integrates the entire signal path for CDMA and GPS bands, including a low-noise amplifier (LNA), I/Q down-converters, baseband channel selection filters (CSFs), a voltage-controlled oscillator (VCO), and a local oscillator (LO) distribution circuit for each band. The cellular-band LNA achieves a noise figure (NF) of 1.2 dB, input third-order intercept point (IIP3) of 11 dBm, and gain of 15.5 dB. Cellular I/Q down-converter and baseband circuitries show 9-dB composite NF, 9 dBm IIP3 and 60-dBm input second-order intercept point (IIP2) without IIP2 calibration. The measured LO leakage is less than -110 dBm at LNA input. The phase noise of the cellular VCO is -134 dBc/Hz at 900-kHz offset with 1.76-GHz carrier frequency. Total GPS signal path achieves NF of 1.7 dB and gain of 74 dB with 42-mA current. The receiver is fabricated in a 0.35-mum SiGe BiCMOS process and packaged in a 6 mm times 6 mm 40-pin micro-lead-frame. Handset measurements report that the receiver meets or exceeds all of the CDMA-2000 requirements     

A fully monolithic 260-/spl mu/W, 1-GHz subthreshold low noise amplifier

A micro-power complementary metal oxide semiconductor (CMOS) low-noise amplifier (LNA) is presented based on subthreshold MOS operation in the GHz range. The LNA is fabricated in an 0.18-/spl mu/m CMOS process and has a gain of 13.6 dB at 1 GHz while drawing 260 /spl mu/A from a 1-V supply. An unrestrained bias technique, that automatically increases bias currents at high input power levels, is used to raise the input P1dB to -0.2 dBm. The LNA has a measured noise figure of 4.6 dB and an IIP3 of 7.2 dBm.     

A 2 GHz surface transverse wave oscillator with low phase noise

A hybrid oscillator at 1.9805 GHz using acoustic surface transverse wave (STW) delay lines operating at the third harmonic as the frequency controlling element is discussed. The STW delay lines were fabricated on 37.5°-rotated Y-cut quartz substrates with a photolithographic technique. A very thin metallization (25 nm) was used to obtain low insertion loss. A split isolated electrode design was used for the transducers. The Q-value and the untuned insertion loss of the STW filter were 3400 and 21 dB, respectively. The phase noise and temperature stability of the oscillator were characterized. At a power output of 6.5 dBm a single-sideband phase noise-to-carrier ratio of -100 dBc/Hz at 1 kHz was attained