Electro‐optic properties of an intrinsic half‐V‐mode FLCD and its application to field‐sequential full‐color LCDs using a poly‐Si TFT matrix array

Abstract— An intrinsic half‐V‐mode ferroelectric liquid‐crystal display (FLCD) exhibiting a high contrast ratio (300:1), owing to defect‐free gray‐scale capability, with a high response speed (τ ? 400 μsec) and good switchability with TFTs, has been developed. Furthermore, this FLCD features high‐temperature reliability owing to the use of a special hybrid alignment technique. We successfully fabricated an active‐matrix poly‐Si TFT field‐sequential full‐color (FS FC) LCD with XGA specifications and a 0.9‐in. diagonal using a half‐V‐mode FLCD and an RGB light‐emitting‐diode (LED) array microdisplay. It is shown that the fabricated active‐matrix FS FCLCD exhibits good moving‐image performance with high full‐color display capability.     

Comparison of a‐Si and Poly‐Si for AMOLED displays

Abstract— The characteristics of OLED backplanes including the intrinsic properties of a‐Si TFTs and LTPS TFTs will be reviewed. While LTPS TFTs reveal satisfactory stability in AMOLED‐display applications, a‐Si AMOLEDs show better uniformity and are capable of driving OLEDs. However, the stability of a‐Si TFTs under long‐term operation is still unacceptable and remains to be the key issue constraining the commercialization of a‐Si TFT AMOLEDs.     

PECVD‐based nanocrystalline‐silicon TFT backplanes for large‐sized AMOLED displays

Abstract— A 14.1‐in. AMOLED display using nanocrystalline silicon (nc‐Si) TFTs has been developed. Nanocrystalline silicon was deposited using conventional 13.56‐MHz plasma‐enhanced chemical vapor deposition (PECVD). Detailed thin‐film characterization of nc‐Si films was followed by development of nc‐Si TFTs, which demonstrate a field‐effect mobility of about 0.6–1.0 cm²/V‐sec. The nc‐Si TFTs show no significant shift in threshold voltage when over 700 hours of constant current stress is applied, indicating a stable TFT backplane. The nc‐Si TFTs were successfully integrated into a 14.1‐in. AMOLED display. The display shows no significant current decrease in the driving TFT of the 2T‐1cap circuit because the TFTs are highly stable. In addition to the improved lifetime of AMOLED displays, the development of nc‐Si TFTs using a conventional 13.56‐MHz PECVD system offers considerable cost advantages over other laser and non‐laser polysilicon‐TFT technologies for large‐sized AMOLEDs.     

An LTPS active‐matrix process with PECVD doped N+ drain/source areas

Abstract— A low‐temperature polysilicon active‐matrix process without the need for ion implantation to dope drain and source areas of TFTs has been developed. A doped silicon layer is deposited by PECVD and structured prior to the deposition of the intrinsic silicon for the channel. The dopant is diffused and activated during the excimer‐laser crystallization step. N‐channel test TFTs with different geometries were realized. The TFT properties (mobility, on/off ratio, saturation, etc.) are suitable to realize AMLCDs and AMOLED displays and to integrate driver electronics on the displays. In addition to simple TFTs, a full‐color 4‐in. quarter‐VGA AMLCD was realized. The complete display (including photolithographic masks, active‐matrix backplane, and color‐filter/black‐matrix frontplane), and an addressing system were developed and manufactured at the Chair of Display Technology, University of Stuttgart, Germany. The substitution of ion doping by PECVD deposition overcomes a major limitation for panel sizes in poly‐Si technology and avoids large investment costs for ion‐implantation equipment.     

Process study and optimization for fabrication of poly‐Si thin‐film transistors on plastic substrates

Abstract— A complete poly‐Si thin‐film transistor (TFT) on plastic process has been optimized to produce TFT arrays for active‐matrix displays. We present a detailed study of the poly‐Si crystallization process, a mechanism for protecting the plastic substrate from the pulsed laser used to crystallize the silicon, and a high‐performance low‐temperature gate dielectric film. Poly‐Si grain sizes and the corresponding TFT performance have been measured for a range of excimer‐laser crystallization fluences near the full‐melt threshold, allowing optimization of the laser‐crystallization process. A Bragg reflector stack has been embedded in the plastic coating layers; its effectiveness in protecting the plastic from the excimer‐laser pulse is described. Finally, we describe a plasma pre‐oxidation step, which has been added to a low‐temperature (<100°C) gate dielectric film deposition process to dramatically improve the electrical properties of the gate dielectric. These processes have been integrated into a complete poly‐Si TFT on plastic fabrication process, which produces PMOS TFTs with mobilities of 66 cm² /V‐sec, threshold voltages of ?3.5 V, and off currents of approximately 1 pA per micron of gate width.     

Low‐temperature poly‐Si TFT data drivers for an SVGA a‐Si TFT‐LCD panel

Low‐temperature poly‐Si TFT data drivers for an SVGA a‐Si TFT‐LCD panel have been developed. The data drivers include shift registers, sample‐and‐hold circuits, and operational amplifiers, and drive LCD panels using a line‐at‐a‐time addressing method. To reduce the power consumption of the shift register, a dot‐clock control circuit has been developed. Using this circuit, the power consumption of the shift register has been reduced to 36% of that of conventional circuits. To cancel the offset voltage generated by the operational amplifier, an offset cancellation circuit for low‐temperature poly‐Si TFTs has been developed. This circuit is also able to avoid any unstable operation of the operational amplifier. Using this circuit, the offset voltage has been reduced to one‐third of the value without using the offset cancellation circuit. These data drivers have been connected to an LCD panel and have realized an SVGA display on a 12.1‐in. a‐Si TFT‐LCD panel.     

Development of rapid thermal processor for large‐glass LTPS production

Abstract— A field‐enhanced rapid‐thermal‐processor (FE‐RTP) system that enables LTPS LCD and AMOLED manufacturers to produce poly‐Si films at low cost, high throughput, and high yield has been developed. The FE‐RTP allows for diverse process options including crystallization, thermal oxidation of gate oxides, and fast pre‐compactions. The process and equipment compatibility with a‐Si TFT manufacturing lines provides a viable solution to produce poly‐Si TFTs using a‐Si TFT lines.     

Effects of post‐annealing on a‐Si:H TFT characteristics fabricated on stainless‐steel substrate

Abstract— A 14.1‐in.‐diagonal backplane employing hydrogenated amorphous‐silicon thin‐film transistors (a‐Si:H TFTs) was fabricated on a flexible stainless‐steel substrate. The TFTs exhibited a field‐effect mobility of 0.54 cm²/V‐sec, a threshold voltage of 1.0 V, and an off‐current of 10^?13 A. Most of the electrical characteristics were comparable to those of the TFTs fabricated on glass substrates. To increase the stability of a‐Si:H TFTs fabricated on stainless‐steel substrate, the specimens were thermally annealed at 230°C. The field‐effect mobility was reduced to 71% of the initial value because of the strain of the released hydrogen atoms and residual compressive stress in a‐Si:H TFT under thermal annealing at 230°C.     

Novel a‐Si:H TFT pixel circuit for electrically stable top‐anode light‐emitting AMOLEDs

Abstract— A novel pixel circuit for electrically stable AMOLEDs with an a‐Si:H TFT backplane and top‐anode organic light‐emitting diode is reported. The proposed pixel circuit is composed of five a‐Si:H TFTs, and it does not require any complicated drive ICs. The OLED current compensation for drive TFT threshold voltage variation has been verified using SPICE simulations.     

A new current‐mirror pixel circuit employing poly‐Si TFTs for active‐matrix organic light‐emitting‐diode displays

Abstract— A novel active‐matrix organic light‐emitting‐diode (AMOLED) display employing a new current‐mirror pixel circuit, which requires four‐poly‐Si TFTs and one‐capacitor and no additional signal lines, has been proposed and sucessfully fabricated. The experimental results show that a new current mirror can considerably compensate luminance non‐uniformity and scale down a data current more than a conventional current‐mirror circuit in order to reduce the pixel charging time and increase the minimum data current. Compared with a conventional two‐TFT pixel, the luminance non‐uniformity induced by the grain boundaries of poly‐Si TFTs can be decreased considerably from 41% to 9.1%.     

Current and future technology of low‐temperature poly‐Si TFT‐LCDs

Abstract— The state of the art of large‐area low‐temperature TFT‐LCDs will be reported in this paper. High‐performance poly‐Si TFTs are expected to realize various applications such as system display where various signal‐processing functions are added to the display. In the past few years, low‐temperature poly‐Si thin‐film‐transistor (LTPS TFT) technology has made great progress, especially in the areas of excimer laser annealing (ELA) of high‐quality poly‐Si film, ion doping for large‐area doping, and high‐quality gate SiO₂ film formation by using the low‐temperature PE‐CVD method. Also, technology trends and possible applications, such as a system displays, will be discussed.     

Active‐matrix field‐emission display based on a CNT emitter and a‐Si TFTs

Abstract— An active‐matrix field‐emission display (AMFED), based on carbon‐nanotube (CNT) emitters and amorphous‐silicon thin‐film transistors (a‐Si TFTs), was developed. The AMFED pixels consisted of a high‐voltage a‐Si TFT and mesh‐gated CNT emitters. The AMFED panel demonstrated high performance for a driving voltage less than 15 V. The low‐cost large‐area AMFED approach using a metal‐mesh technology is proposed.     

Multioutputs single‐stage gate driver on array with wide temperature operable thin‐film‐transistor liquid‐crystal display for high resolution application

A hydrogenated amorphous silicon (a‐Si:H) thin‐film transistor (TFT) gate driver with multioutputs (eight outputs per stage) for high reliability, 10.7‐inch automotive display has been proposed. The driver circuit is composed of one SR controller, eight driving TFTs (one stage to eight outputs) with bridging TFTs. The SR controller, which starts up the driving TFTs, could also prevent the noise of gate line for nonworking period. The bridging TFT, using width decreasing which connects between the SR controller and the driving TFT, could produce the floating state which is beneficial to couple the gate voltage, improves the driving ability of output, and reaches consistent rising time in high temperature and low temperature environment. Moreover, 8‐phase clocks with 75% overlapping and dual‐side driving scheme are also used in the circuit design to ensure enough charging time and reduce the loading of each gate line. According to lifetime test results, the proposed gate driver of 720 stages pass the extreme temperature range test (90°C and ?40°C) for simulation, and operates stably over 800 hours at 90°C for measurement. Besides, this design is successfully demonstrated in a 10.7‐inch full HD (1080 × RGB×1920) TFT‐liquid‐crystal display (LCD) panel.     

Characteristics and stability of improved re‐crystallized metal‐induced laterally crystallized polycrystalline‐silicon thin‐film transistors for display applications

Abstract— The performance of high‐temperature re‐crystallized (RC) metal‐induced laterally crystallized (MILC) polycrystalline‐silicon (poly‐Si) thin‐film transistors (TFT) have been improved by (1) patterning the active islands before MILC, (2) removing nickel‐containing residues using acid cleaning, (3) using heavily boron‐doped poly‐Si gates to achieve threshold voltage symmetry, and (4) double‐implanting n‐type source/drain junctions. A 30‐MHz driver circuit based on this improved technology was demonstrated. The reliability of optimized RC‐MILC poly‐Si TFTs has not been adversely affected by residual nickel‐containing contaminants in the TFT channel regions.     

Active‐matrix organic light‐emitting displays employing two thin‐film‐transistor a‐Si:H pixels on flexible stainless‐steel foil

Abstract— An active‐matrix organic light‐emitting diode (AMOLED) display driven by hydrogenated amorphous‐silicon thin‐film transistors (a‐Si:H TFTs) on flexible, stainless‐steel foil was demonstrated. The 2‐TFT voltage‐programmed pixel circuits were fabricated using a standard a‐Si:H process at maximum temperature of 280°C in a bottom‐gate staggered source‐drain geometry. The 70‐ppi monochrome display consists of (48 × 4) × 48 subpixels of 92 ×369 μm each, with an aperture ratio of 48%. The a‐Si:H TFT pixel circuits drive top‐emitting green electrophosphorescent OLEDs to a peak luminance of 2000 cd/m².     

Compact modeling of amorphous‐silicon thin‐film transistors with BSIM3

Abstract— A novel approach of modeling a‐Si:H TFTs with the industry‐standard BSIM3 compact model is presented. The described approach defines the a‐Si:H TFT drain current and terminal charges as explicit functions of terminal voltages using a minimum set of BSIM3 parameters. The set of BSIM3 parameters is chosen based on the electrical and physical characteristics of the a‐Si:H TFT and their values extracted from measured data. By using the selected BSIM3 model parameters, the a‐Si:H TFT is simulated inside SPICE to fit the simulated I‐V and C‐V curves with the measured results. Finally, the extracted BSIM3 model is validated by simulating the kickback voltage effect in an AMLCD pixel array.     

Flexible amorphous‐silicon non‐volatile memory

Abstract— The development of a flexible, rewritable, non‐volatile memory (NVM) that is implemented on a standard, low‐temperature a‐Si:H process without additional mask steps is reported. This NVM is a part of a flexible‐display system. Each NVM cell is composed of differentially configured thin‐film‐transistors (TFTs). The cell reads out one of two stable states depending on the relative threshold voltages of the differentially configured TFTs. Information is stored in each cell by increasing the threshold voltage of one differential TFT or the other, utilizing the well‐known electrical‐stress degradation intrinsic to a‐Si:H TFTs. The stored information is retained indefinitely with no applied power. A test array of individually addressable NVM cells has been successfully fabricated and tested on flexible stainless‐steel substrates. Read and write operation, as well as preliminary reliability measurements, are described. The design is readily scalable to large memory arrays.     

Amorphous‐oxide TFT backplane for large‐sized AMOLED TVs

Abstract— Amorphous‐oxide thin‐film‐transistor (TFT) arrays have been developed as TFT backplanes for large‐sized active‐matrix organic light‐emitting‐diode (AMOLED) displays. An amorphous‐IGZO (indium gallium zinc oxide) bottom‐gate TFT with an etch‐stop layer (ESL) delivered excel lent electrical performance with a field‐effect mobility of 21 cm²/V‐sec, an on/off ratio of >10⁸, and a subthreshold slope (SS) of 0.29 V/dec. Also, a new pixel circuit for AMOLED displays based on amorphous‐oxide semiconductor TFTs is proposed. The circuit consists of four switching TFTs and one driving TFT. The circuit simulation results showed that the new pixel circuit has better performance than conventional threshold‐voltage (VTH) compensation pixel circuits, especially in the negative state. A full‐color 19‐in. AMOLED display with the new pixel circuit was fabricated, and the pixel circuit operation was verified in a 19‐in. AMOLED display. The AMOLED display with a‐IGZO TFT array is promising for large‐sized TV because a‐IGZO TFTs can provide a large‐sized backplane with excellent uniformity and device reliability.     

Amorphous‐silicon gate‐driver circuits of shared‐node dual pull‐down structure with overlapped output signals

Abstract— A novel gate‐driver circuit using amorphous‐silicon (a‐Si) TFTs has been developed. The circuit has a shared‐node dual pull‐down AC (SDAC) structure with a common‐node controller for two neighboring stages, resulting in a reduced number of TFTs. The overlapped clock signals widen the temperature range for stable operation due to the extended charging time of the inner nodes of the circuit. The accelerated lifetime was found to be over 1000 hours at 60°C with good bias‐temperature‐stress (BTS) characteristics. Accordingly, the a‐Si gate‐driver circuit was successfully integrated into a 14.1‐in. XGA (1024 × RGB × 768) TFT‐LCD panel having a single bank form.     

Amorphous‐silicon thin‐film transistors made at 280°C on clear‐plastic substrates by interfacial stress engineering

Abstract— A process temperature of ～300°C produces amorphous‐silicon (a‐Si) thin‐film transistors (TFTs) with the best performance and long‐term stability. Clear organic polymers (plastics) are the most versatile substrate materials for flexible displays. However, clear plastics with a glass‐transition temperature (T_g) in excess of 300°C can have coefficients of thermal expansion (CTE) much larger than that of the silicon nitride (SiN^x) and a‐Si in TFTs deposited by plasma‐enhanced chemical vapor deposition (PECVD). The difference in the CTE that may lead to cracking of the device films can limit the process temperature to well below that of the T_g of the plastic. A model of the mechanical interaction of the TFT stack and the plastic substrate, which provides design guidelines for avoid cracking during TFT fabrication, is presented. The fracture point is determined by a critical interfacial stress. The model was used to successfully fabricate a‐Si TFTs on novel clear‐plastic substrates with a maximum process temperature of up to 280°C. The TFTs made at high temperatures have higher mobility, lower leakage current, and higher stability than TFTs made on conventional low‐T_g clear‐plastic substrates.