A Fully Integrated 660 MHz Low-Swing Energy-Recycling DC–DC Converter

A fully integrated 0.18  $mu$ m DC–DC buck converter using a low-swing “stacked driver” configuration is reported in this paper. A high switching frequency of 660 MHz reduces filter components to fit on chip, but this suffers from high switching losses. These losses are reduced using: 1) low-swing drivers; 2) supply stacking; and 3) introducing a charge transfer path to deliver excess charge from the positive metal-oxide semiconductor drive chain to the load, thereby recycling the charge. The working prototype circuit converts 2.2 to 0.75–1.0 V at 40–55 mA. Design and simulation of an improved circuit is also included that further improves the efficiency by enhancing the charge recycling path, providing automated zero voltage switching (ZVS) operation, and synchronizing the half-swing gating signals.      

集成双层平面电感的单片DC/DC转换器设计

采用0.35μm标准CMOS工艺设计了3.3V/1.5V单片低压Buck转换器,开关频率为150MHz.本文采用了电压型脉宽调制的反馈控制模式,克服了频率提高所带来的转换器系统不稳定问题.对双层平面螺旋电感进行了设计与优化,获得品质因数2.6,电感值28nH的双层平面电感.模拟结果表明,对应于不同输入电压或不同负载,转换器系统工作稳定,输入调整率-40dB,输出调整率-60dB.输出电压纹波平均值可以控制在额定值75mV,转换效率71%.     

A Switching-Capacitor PWM DC–DC Converter and Its Variations

This paper proposes a novel switching-capacitor pulsewidth modulation (PWM) converter. The converter is a combination of a switching-capacitor converter and a PWM converter, and it has the following advantages: 1) zero-voltage switching of all the MOSFETs; 2) with an autotransformer self-driven method, there is no need to adjust the synchronous rectifier control timing, and this reduces body diode conduction loss; 3) its efficiency is not sensitive to the leakage inductor, so a discrete transformer can be used, and it is suitable for both voltage regulator module (VRM) and voltage regulator down (VRD) application; and 4) a single-phase option makes it more flexible, and it can achieve higher efficiency in the whole load range with a phase-shedding control strategy. A 700-kHz 1.2-V/35-A POL prototype and a four-phase 700-kHz 1.2-V/130-A-output VRM prototype were built to verify the analysis.      

A High-Efficiency DC–DC Converter Using 2 nH Integrated Inductors

Historically, buck converters have relied on high-Q inductors on the order of 1 to 100 muH to achieve a high efficiency. Unfortunately, on-chip inductors are physically large and have poor series resistances, which result in low-efficiency converters. To mitigate this problem, on-chip magnetic coupling is exploited in the proposed stacked interleaved topology to enable the use of small (2 nH) on-chip inductors in a high-efficiency buck converter. The dramatic decrease in the inductance value is made possible by the unique bridge timing of the stacked design that causes magnetic coupling to boost the converter's efficiency by reducing the current ripple in each inductor. The magnetic coupling is realized by stacking the two inductors on top of one another, which not only lowers the required inductance, but also reduces the chip area consumed by the two inductors. The measured conversion efficiency for the prototype circuit, implemented in a 130-nm CMOS technology, shows more than a 15% efficiency improvement over a linear converter for low output voltages rising to a peak efficiency of 77.9 % for a 0.9 V output. These efficiencies are comparable to converters implemented with higher Q inductors, validating that the proposed techniques enable high-efficiency converters to be realized with small on-chip inductors.     

An Integrated Switching DC–DC Converter With Dual-Mode Pulse-Train/PWM Control

This brief presents an integrated switching converter with a dual-mode control scheme. A pulse-train (PT) control employing a combination of four pulse control patterns is proposed to achieve optimal regulation performance under various operation scenarios. Meanwhile, a high-frequency pulsewidth modulation (PWM) control is adopted to ensure low output ripples and avoid digital limit cycling in steady state. The converter was fabricated with a 0.35- $muhbox{m}$ digital CMOS n-well process. The entire die area, including the on-chip pads and power devices, is 1.31 $hbox{mm}^{2}$ . Experimental results show that, in the steady state, the output voltage is well regulated at 1.5 V with $pm$12.5-mV ripples in the PWM mode. The measured maximum efficiency is 91%, and the efficiency stays above 70% within the entire 500-mW power range. In transient measurements, with a 100% load step change from 50 to 100 mA, the output voltage of the converter settles within 345 ns due to the fast response of the PT control, with a maximum voltage variation of 164 mV. The converter functions well when the input supply voltage frequently varies between 2.2 and 3.3 V, with a line regulation of 29.1 mV/V.      

A Three-Phase Current-Fed Push–Pull DC–DC Converter

In this paper, a new three-phase current-fed push–pull dc–dc converter is proposed. This converter uses a high-frequency three-phase transformer that provides galvanic isolation between the power source and the load. The three active switches are connected to the same reference, which simplifies the gate drive circuitry. Reduction of the input current ripple and the output voltage ripple is achieved by means of an inductor and a capacitor, whose volumes are smaller than in equivalent single-phase topologies. The three-phase dc–dc conversion also helps in loss distribution, allowing the use of lower cost switches. These characteristics make this converter suitable for applications where low-voltage power sources are used and the associated currents are high, such as in fuel cells, photovoltaic arrays, and batteries. The theoretical analysis, a simplified design example, and the experimental results for a 1-kW prototype will be presented for two operation regions. The prototype was designed for a switching frequency of 40 kHz, an input voltage of 120 V, and an output voltage of 400 V.      

A Full-Bridge DC–DC Converter WithZero-Voltage-Switching Overthe Entire Conversion Range

A new topology of full-bridge dc–dc converter is proposed featuring zero-voltage-switching (ZVS) of active switches over the entire conversion range. In contrast to conventional techniques, the stored energy in the auxiliary inductor of the proposed converter is minimal under full-load condition and it progressively increases as the load current decreases. Therefore, the ZVS operation over the entire conversion range is achieved without significantly increasing full-load conduction loss making the converter particularly suitable in applications where the output is required to be adjustable over a wide range and load resistance is fixed (e.g., an electromagnet power supply). The principle of operation is described and the considerations in the design of converter are discussed. Performance of the proposed converter is verified with experimental results on a 500-W, 100-kHz prototype.      

Dynamics and Stability Issues of a Single-Inductor Dual-Switching DC–DC Converter

A single-inductor two-input two-output power electronic dc–dc converter can be used to regulate two generally nonsymmetric positive and negative outputs by means of a pulsewidth modulation with a double voltage feedback. This paper studies the dynamic behavior of this system. First, the operation modes and the steady-state properties of the converter are addressed, and, then, a stability analysis that includes both the power stage and control parameters is carried out. Different bifurcations are determined from the averaged model and from the discrete-time model. The Routh–Hurwitz criterion is used to obtain the stability regions of the averaged (slow-scale) dynamics in the design parameter space, and a discrete-time approach is used to obtain more accurate results and to detect possible (fast-scale) subharmonic oscillations. Experimental measurements were taken from a system prototype to confirm the analytical results and numerical simulations. Some possible nonsmooth bifurcations due to the change in the switching patterns are also illustrated.      

Improved Online Identification of a DC–DC Converter and Its Control Loop Gain Using Cross-Correlation Methods

Recent progress in the identification of switching power converters using an all-digital controller has granted network analyzer functionality to the control platform. In particular, the cross-correlation technique provides a nonparametric identification of a converter's small-signal control-to-output frequency response. The literature shows the viability of this technique as well as a few improvements to the basic technique. This online network analyzer functionality allows new flexibility in the areas of online monitoring and adaptive control. In this paper, several improvements to the cross-correlation method of system identification are proposed that aim to further improve the accuracy of the frequency response identification, particularly at high frequencies near the desired closed-loop bandwidth frequency. Additionally, an extension to the cross-correlation method is proposed that allows measurement of the control loop gain without ever opening the feedback loop. Thus, performance and stability margins may be evaluated while maintaining tight regulation of the output. Simulation and experimental results are shown to verify the proposed improvements and extension.      

Two-Parameter Discontinuity-Induced Bifurcation Curves in a ZAD-Strategy-Controlled DC–DC Buck Converter

The dynamics of a zero-average dynamic strategy controlled dc–dc Buck converter, modelled by a set of differential equations with discontinuous right-hand side is studied. Period-doubling and corner-collision bifurcations are found to occur close to each other under small parameter variations. Closer examination of the parameter space leads to the discovery of a novel bifurcation. This type of bifurcation has not been reported so far in the literature and it corresponds to a corner-collision bifurcation of a nonhyperbolic cycle. The bifurcation boundaries are computed analytically in this paper and the system dynamics are unfolded close to the novel bifurcation point.This paper was completed during a research period of all the authors at the CRM in Barcelona in March 2007.      

一种抗辐照厚膜混合集成DC/DC变换器的设计优化

研究了一种基于混合集成电路工艺设计的抗辐照DC/DC变换器设计优化方法。在保障抗辐照能力的前提下,着重对转换效率和隔离反馈技术进行优化,研制了一款抗辐照DC/DC变换器。实现了在小尺寸下将30~80 V输入电压转换为8 V/80 W额定输出,转换效率达到86%。在此基础上,完成了该抗辐照DC/DC变换器电参数和辐照试验验证,其抗总剂量辐照达到100 krad(Si),单粒子功能失效阈值LET≥75 MeV·cm²/mg。电路具备良好的抗单粒子瞬态能力,可在星载环境下稳定、高效工作。     

Dual-Mode Multiple-Band Digital Controller for High-Frequency DC–DC Converter

An integrated digital controller design for dc-dc converter is proposed in this paper. The proposal presents a multiple- band dual-stage (MBDS) delay line A/D converter (ADC) for wide dynamic range of operation with reduced ripple, chip area, and power consumption. This proposal also introduces a novel folding logic for digital error calculation and dual-mode error control PID for improving transient response. A complete closed-loop experimental prototype is demonstrated on a field-programmable-gate- array-based setup. The feasibility and functionality of the proposed digital controller is verified with a closed-loop synchronous buck converter prototype that switches at 1 MHz and regulates over a wide output voltage range of 1.6-3.3 V. The proposed MBDS delay line ADC is fabricated with discrete logic gates and flip-flops. The integrated digital controller is also implemented using standard cell-based design methodology in 0.5-mum CMOS technology. The design reduces 33 % on-chip area compared to an equivalent of 64 tap delay line ADC. The complete digital controller chip takes less than 0.7 mm² of silicon area and consumes an average current of 92 muA at 1-MHz switching frequency. The voltage-mode digital loop achieves tracking time of less than 10 mus for 1-V step change of the reference voltage and settling time of 20 mus. Post layout simulation and experimental results are demonstrated.     

A Single-Inductor Switching DC–DC Converter With Five Outputs and Ordered Power-Distributive Control

An integrated five-output single-inductor multiple-output dc-dc converter with ordered power-distributive control (OPDC) in a 0.5 mum Bi-CMOS process is presented. The converter has four main positive boost outputs programmable from +5 V to +12 V and one dependent negative output ranged from -12 V to -5 V. A maximum efficiency of 80.8% is achieved at a total output power of 450 mW, with a switching frequency of 700 kHz. The performance of the converter as a commercial product is successfully verified with a new control method and proposed circuits, including a full-waveform inductor-current sensing circuit, a variation-free frequency generator, and an in-rush-current-free soft-start method. With simplicity, flexibility, and reliability, the design enables shorter time-to-market in future extensions with more outputs and different operation requirements.     

Anodized ITO Thin‐Film Transistors

This paper reports that the electrical, optical and structural properties of ITO film can be significantly modulated by an anodization treatment. An ITO TFT technology based on the anodization approach is then proposed and demonstrated, which results in an ideal homo‐junction device structure with the source/drain/pixel electrodes and channel region made of one single ITO layer. A preliminary device fabrication at room temperature shows the resulting TFT has an on/off current ratio exceeding 1 × 10⁸, a saturation mobility of 29.0 cm² V^?1 s^?1, and a subthreshold swing of 0.20 V per decade. This technology also allows a feasible V_T adjustment and muti‐V_T implementation.     

High‐Resolution Monolithic Integrated Tribotronic InGaZnO Thin‐Film Transistor Array for Tactile Detection

Tactile detection is a crucial technology in many fields, such as electronic skin, touch screen control, human prostheses, and screen fingerprint identification. Tribotronics has demonstrated active mechanosensation from external mechanical stimuli, which greatly enriches the sensing mechanisms of tactile detection. In this work, a monolithic integrated indium‐gallium‐zinc‐oxide (InGaZnO or IGZO) thin‐film transistor (TFT) array is developed for high‐resolution tactile detection. By using the conventional semiconductor fabrication processes, each IGZO TFT cell in the array shows uniform electrical performance. In addition, the drain–source current can be individually tuned by the electrostatic potential generated by the contact electrification between a movable gate and the gate dielectric. The monolithic integrated array displays a relatively high resolution of 12 pixels per inch and can realize a millimeter‐level tactile perception and motion tracking. This work presents a facile and viable strategy toward micro/nano‐scale tribotronics, which can realize high‐resolution and large‐scale tactile detection.     

A Synchronous Multioutput Step-Up/Down DC–DC Converter With Return Current Control

This brief presents a new return-current control method for a multioutput step-up/down dc–dc converter. Compared with prior multioutput dc–dc converters, the presently described converter can generate outputs higher or lower than the input voltage with simple control-loop compensation while guaranteeing stability in a wide load range. Using a 0.5-$muhbox{m}$ bipolar CMOS (BiCMOS) process, a converter having five outputs has been implemented for an LG active-matrix organic light-emitting diode (AM-OLED) display panel. The implemented converter operates at 1-MHz switching frequency with 4.7- $muhbox{H}$ inductor and 10- $muhbox{F}$ capacitor. Experimental results show that the proposed control method can generate tightly regulated stepped-up or -down outputs stably under a wide load variation. The conversion efficiency is higher than 80% at a typical AM-OLED panel grey level.      

硅基CoZrO铁氧体磁膜结构RF集成微电感

制作了一种新型磁膜结构射频集成微电感.该电感使用溶胶-凝胶法制备的CoZrO铁氧体作为磁性薄膜;采用平面单匝形式的金属线圈,从而形成"SiO2绝缘层/磁膜层(CoZrO)/SiO2绝缘层/Cu线圈"的结构,具有结构简单、制作工艺与常规集成工艺兼容等特点.同时,采用相同工艺同批制作了无磁膜微电感作为对比样品,并取各项结构参数与磁膜电感相一致.测试结果表明,2GHz处,磁膜结构微电感的感值(L)为1.75nH、品质因数(Q)为18.5,与无磁膜微电感相比,L和Q的值分别提高了25%和23%.     

硅基COZrO铁氧体磁膜结构RF集成微电感

制作了一种新型磁膜结构射频集成微电感.该电感使用溶胶-凝胶法制备的CoZrO铁氧体作为磁性薄膜;采用平面单匝形式的金属线圈,从而形成"SiO2绝缘层/磁膜层(CoZrO)/SiO2绝缘层/Cu线圈"的结构,具有结构简单、制作工艺与常规集成工艺兼容等特点.同时,采用相同工艺同批制作了无磁膜微电感作为对比样品,并取各项结构参数与磁膜电感相一致.测试结果表明,2GHz处,磁膜结构微电感的感值(L)为1.75nH、品质因数(Q)为18.5,与无磁膜微电感相比,L和Q的值分别提高了25%和23%.     

A Bidirectional DC–DC Converter for an Energy Storage System With Galvanic Isolation

This paper addresses a bidirectional dc-dc converter suitable for an energy storage system with an additional function of galvanic isolation. An energy storage device such as an electric double layer capacitor is directly connected to a dc side of the dc-dc converter without any chopper circuit. Nevertheless, the dc-dc converter can continue operating when the voltage across the energy storage device drops along with its discharge. Theoretical calculation and experimental measurement reveal that power loss and peak current impose limitations on a permissible dc-voltage range. This information may be useful in design of the dc-dc converter. Experimental results verify proper charging and discharging operation obtained from a 200-V, 2.6-kJ laboratory model of the energy storage system. Moreover, the dc-dc converter can charge the capacitor bank from zero to the rated voltage without any external precharging circuit.