用于先进 CMOS电路的 150 mm硅外延片外延生长

随着大规模和超大规模集成电路特征尺寸向亚微米、深亚微米发展,下一代集成电路对硅片的表面晶体完整性和电学性能提出了更高的要求.与含有高密度晶体原生缺陷的硅抛光片相比,硅外延片一般能满足这些要求.该文报道了应用于先进集成电路的150mmP/P+CMOS硅外延片研究进展.在PE2061硅外延炉上进行了P/P+硅外延生长.外延片特征参数,如外延层厚度、电阻率均匀性,过渡区宽度及少子产生寿命进行了详细表征.研究表明:150mmP/P+CMOS硅外延片能够满足先进集成电路对材料更高要求,     

用于先进CMOS电路的150mm硅外延片外延生长

随着大规模和超大规模集成电路特征尺寸向亚微米、深亚微米发展,下一代集成电路对硅片的表面晶体完整性和电学性能提出了更高的要求.与含有高密度晶体原生缺陷的硅抛光片相比,硅外延片一般能满足这些要求.该文报道了应用于先进集成电路的150mm P/P+CMOS硅外延片研究进展.在PE2061硅外延炉上进行了P/P+硅外延生长.外延片特征参数,如外延层厚度、电阻率均匀性,过渡区宽度及少子产生寿命进行了详细表征.研究表明:150mm P/P+CMOS硅外延片能够满足先进集成电路对材料更高要求,     

变温LPCVD沉积氮化硅薄膜的均匀性优化

以低压化学气相沉积(LPCVD)热壁立式炉为实验平台,由二氯硅烷和氨通过LPCVD工艺合成氮化硅薄膜,利用降温成膜提高氮化硅薄膜的膜厚均匀度.基于气体碰撞理论建立了氮化硅薄膜沉积速率与反应气体浓度的关系式.分析比较了LPCVD炉内不同升温速率沉积氮化硅薄膜的表面性能.发现在变温沉积阶段,选择合适的降温速率是实现薄膜沉积...     

硅缓冲层提高选区外延生长硅基锗薄膜质量

研究了Si缓冲层对选区外延Si基Ge薄膜的晶体质量的影响。利用超高真空化学气相沉积系统,结合低温Ge缓冲层和选区外延技术,通过插入Si缓冲层,在Si/SiO_2图形衬底上选择性外延生长Ge薄膜。采用X射线衍射(XRD)、扫描电子显微镜(SEM)、原子力显微镜(AFM)表征了Ge薄膜的晶体质量和表面形貌。测试结果表明,选区外延Ge薄膜的晶体质量比无图形衬底外延得到薄膜的晶体质量要高;选区外延Ge薄膜前插入Si缓冲层得到Ge薄膜具有较低的XRD曲线半高宽以及表面粗糙度,位错密度低至5.9×10~5/cm^2,且薄膜经过高低温循环退火后,XRD曲线半高宽和位错密度进一步降低。通过插入Si缓冲层可提高选区外延Si基Ge薄膜的晶体质量,该技术有望应用于Si基光电集成。     

量子点外延生长新模型(英文)

目前在原子尺度上人们对量子点分子束外延生长过程了解很少,所有关于量子点外延生长的理论模型和计算机模拟都是建立在传统的外延生长理论框架内。在传统理论框架内,量子点的生长过程被理解为发生在生长表面上一系列的单一的原子事件,如原子沉积、扩散、聚集等。在这种理论中,外延生长表面原子之间的相互作用被忽略;另外,按照这种理论,量子点生长过程必须是一个相对缓慢的过程。这种理论模型不可能恰当地解释所观察到的大量复杂的量子点外延生长实验现象。作者在两个实验现象基础上,提出了在InAs/GaAs(001)体系中量子点外延生长过程的新模型。这两个实验现象分别是在InAs/GaAs(001)生长表面有大量的"浮游"In原子,一个量子点的生长过程可以在很短的时间内完成(10-4 s)。在提出的新模型中,量子点的自组装过程是一个大数量原子的集体、协调运动过程。     

Chemical Vapor Deposition of Silicon Carbide Epitaxial Films and Their Defect Characterization

A chemical vapor deposition (CVD) system was designed and fabricated in our laboratory and SiC homo-epitaxial layers were grown in the CVD process using silicon tetrachloride and propane precursors with hydrogen as a carrier gas. The temperature field was generated using numerical modeling. Gas flow rates, temperature field, and the gradients are found to influence the growth rates of the epitaxial layers. Growth rates were found to increase as the temperature increased at high carrier gas flow rate, while at lower carrier gas flow rate, growth rates were observed to decrease as the temperature increased. Based on the equilibrium model, “thermodynamically controlled growth” accounts for the growth rate reduction. The grown epitaxial layers were characterized using various techniques. Reduction in the threading screw dislocation (SD) density in the epilayers was observed. Suitable models were developed for explaining the reduction in the SD density as well as the conversion of basal plane dislocations (BPDs) into threading edge dislocations (TEDs).     

薄膜和量子点的外延生长(英文)

首先简短地综述了人们关于外延薄膜材料层状(layer-by-layer)生长机制的认识;给出了作者关于自组装量子点外延生长过程的评价和观点,强调了量子点自组装生长过程的复杂性和非线性性质。在对已经发表过的实验数据进一步分析的基础上,作者对一个量子点自组装生长形成所需要的时间作了一个估算,说明这是一个非常快的过程(<10-4s)。最后,作者提出了一个理解量子点自组装生长过程机制的模型。     

Maskless Lateral Epitaxial Growth of Gallium Nitride Using Dimethylhydrazine as a Nitrogen Precursor

Lateral epitaxial growth (LEG) is a key technology to improve the lifetime of III-V nitride-based laser diodes (LDs) by reducing the dislocation density in the materials. To increase the area of low dislocation density, the lateral growth rate needs to be increased. In addition, suppression of the vertical growth is strongly desired to avoid unnecessarily thick growth, which would result in cracks in the epitaxial film. This paper reports the maskless LEG of GaN with extremely high lateral-to-vertical growth rate ratio using dimethylhydrazine as a nitrogen precursor. The lateral growth only occurs from the sidewalls of the etched mesa stripes without any dielectric masks. The lateral growth rate toward the direction is extremely high, as high as 10 μm/h, while no vertical growth is observed on the top of unmasked mesa. The cross-sectional transmission electron microscopic image shows that the threading dislocations in the wing region extend only toward the lateral direction. Note that almost smooth coalescence between the wing regions is confirmed by atomic force microscopy. X-ray diffraction measurements reveal that this maskless LEG drastically improves the crystallographic twist down to 97 arc-s, which is as comparably low as that of a free-standing GaN substrate. The presented maskless LEG is advantageous for optical device applications.     

Epitaxial Growth and Characterization of p-Type ZnO

N-doped p-type ZnO thin films were grown on c-sapphire substrates, semi-insulating GaN templates, and n-type ZnO substrates by metal organic chemical vapor deposition (MOCVD). Diethylzinc and oxygen were used as precursors for Zn and O, respectively, while ammonia (NH₃) and nitrous oxide (N₂O) were employed as the nitrogen dopant sources. X-ray diffraction (XRD) studies depicted highly oriented N-doped ZnO thin films. Photoluminescence (PL) measurements showed a main emission line around 380 nm, corresponding to an energy gap of 3.26 eV. Nitrogen concentration in the grown films was analyzed by secondary ion mass spectrometry (SIMS) and was found to be on the order of 10¹⁸ cm⁻³. Electrical properties of N-doped ZnO epilayers grown on semi-insulating GaN:Mg templates were measured by the Hall effect and the results indicated p-type with carrier concentration on the order of 10¹⁷ cm⁻³.     

两种自主开发的图形外延SiGe工艺

使用清华大学微电子学研究所研发的UHV/CVD系统深入研究了图形外延SiGe工艺，分别选用单一的SiO2介质层和SiO2/Poly-Si复合介质层，作为图形外延SiGe单晶材料的窗口屏蔽介质，开发出了不同的实用化图形外延SiGe工艺.     

Si1—x—yGexCy材料的外延生长方法

本文分析了Si1 -x- yGexCy 半导体材料外延生长的困难所在 ,总结了用于生长Si1 -x- yGexCy材料的各种生长方法 ,并分析比较了各自的特点。     

对n型Si外延片表面处理方法的研究

Si外延片是制造半导体器件和集成电路最常用的半导体材料。外延层电阻率是外延片最重要的参数之一,它直接影响器件的性能。简要分析了自动汞探针C-V测试仪测量电阻率前进行表面处理的原因,研究了不同的表面处理方法对电阻率测试结果的影响,发现对于外延层的电阻率ρ>1Ω.cm的n型Si外延片,采用紫外光(UV)表面处理是一种合适的表面处理方法,该方法应用于实际生产测试过程。     

快速恢复外延二极管用硅外延片的工艺研究

利用化学气相沉积方法制备所需硅外延层,通过FTIR(傅里叶变换红外线光谱分析)、C-V(电容-电压测试)、SRP(扩展电阻技术)等多种测试方法获取外延层的几何参数、电学参数以及过渡区形貌。详细研究了本征层生长工艺与外延层厚度分布、电阻率分布以及过渡区形貌之间的对应关系。采用该优化设计的硅外延材料,成功提高了FRED器件的性能与成品率。     

Amorphization and Solid-Phase Epitaxial Growth of C-Cluster Ion-Implanted Si

Amorphization and solid-phase epitaxial growth were studied in C-cluster ion-implanted Si. C₇H₇ ions were implanted at a C-equivalent energy of 10 keV to C doses of 0.1 × 10¹⁵ cm⁻² to 8.0 × 10¹⁵ cm⁻² into (001) Si wafers. Transmission electron microscopy revealed a C amorphizing dose of ~5.0 ×  10¹⁴ cm⁻². Annealing of amorphized specimens to effect solid-phase epitaxial growth resulted in defect-free growth for C doses of 0.5 × 10¹⁵ cm⁻² to 1.0 × 10¹⁵ cm⁻². At higher doses, growth was defective and eventually polycrystalline due to induced in-plane tensile stress from substitutional C incorporation.     

石墨烯的SiC外延生长及应用

碳化硅外延生长法是近几年重新发展起来的一种制备石墨烯的方法,具有产物质量高、生长面积大等优点,逐渐成为了制备高质量石墨烯的主要方法之一。另外,从石墨烯在集成电路方面的应用前景来看,该方法最富发展潜力。从SiC不同极性面石墨烯的生长过程、缓冲层的影响及消除方法等方面评述了碳化硅外延法制备的特点并对其研究进展进行了介绍。最后简要概述了国内外关于SiC外延石墨烯在场效应晶体管方面的应用情况,指出了目前需要解决的主要技术问题,并对其发展前景进行了展望。     

Degradation of insulators in Silicon Selective Epitaxial Growth(SEG) ambient

The degradation of various insulators in Silicon Selective Epitaxial Growth (SEG) ambient was studied. The insulators studied were thermal oxide, reoxidized nitride/oxide stack, poly-oxide, and nitrided oxide. Breakdown electric fields of MIS capacitors were measured and yields were calculated before and after the insulators were exposed to Silicon SEG ambient. It was found that the nitrided oxide was more resistant to degradation in the SEG ambient than thermal and poly oxide; results reported here for the first time. The increased resistance of nitrided oxide in SEG ambient coupled with their superior performance as thin gate insulators makes them an excellent candidate for use in novel 3-D structures using selective silicon growth     

薄层SOS薄膜材料外延生长及其器件应用

亚微米CMOS/SOS器件发展对高质量的100-200纳米厚度的薄层SOS薄膜提出了更高的要求.实验证实;采用CVD方法生长的原生SOS薄膜的晶体质量可以通过固相外延工艺得到明显改进.该工艺包括:硅离子自注入和热退火.X射线双晶衍射和器件电学测量表明:多晶化的SOS薄膜固相外延生长导致硅外延层晶体质量改进和载流子迁移率提高.固相外延改进的薄层SOS薄膜材料能够应用于先进的CMOS电路.     

Epitaxial Growth of 2D Materials on High-Index Substrate Surfaces

Recently, the successful synthesis of wafer-scale single-crystal graphene, hexagonal boron nitride (hBN), and MoS₂ on transition metal surfaces with step edges boosted the research interests in synthesizing wafer-scale 2D single crystals on high-index substrate surfaces. Here, using hBN growth on high-index Cu surfaces as an example, a systematic theoretical study to understand the epitaxial growth of 2D materials on various high-index surfaces is performed. It is revealed that hBN orientation on a high-index surface is highly dependent on the alignment of the step edges of the surface as well as the surface roughness. On an ideal high-index surface, well-aligned hBN islands can be easily achieved, whereas curved step edges on a rough surface can lead to the alignment of hBN along with different directions. This study shows that high-index surfaces with a large step density are robust for templating the epitaxial growth of 2D single crystals due to their large tolerance for surface roughness and provides a general guideline for the epitaxial growth of various 2D single crystals.     

超高真空化学气相沉积外延生长锗硅材料及其应用

综述了硅基锗硅薄膜的外延生长技术、设备及其在光电子器件上的应用,其中着重介绍了超高真空化学气相沉积系统(UHVCVD)。目前来说,UHVCVD是产业化制备高质量锗硅材料的最佳选择。     

薄层SOS薄膜材料外延生长及其器件应用

亚微米 CMOS/ SOS器件发展对高质量的 1 0 0 - 2 0 0纳米厚度的薄层 SOS薄膜提出了更高的要求 .实验证实 :采用 CVD方法生长的原生 SOS薄膜的晶体质量可以通过固相外延工艺得到明显改进 .该工艺包括 :硅离子自注入和热退火 .X射线双晶衍射和器件电学测量表明 :多晶化的 SOS薄膜固相外延生长导致硅外延层晶体质量改进和载流子迁移率提高 .固相外延改进的薄层 SOS薄膜材料能够应用于先进的 CMOS电路 .