共查询到19条相似文献,搜索用时 109 毫秒
1.
2.
3.
4.
进入纳米尺度后,单粒子瞬态(SET)成为高能粒子入射VLSI产生的重要效应,准确、可靠的SET模拟对评估VLSI的可靠性有着重要的影响。以反相器为例,针对脉冲峰值和半高全宽两个指标,研究了电路模拟中影响SET的因素,主要有电流脉冲幅值、脉冲宽度、负载电容、环境温度及器件尺寸。通过对45和65 nm两种技术节点下的电路的仿真,研究了这些因素对SET的影响,并探讨了可能的原因。结果显示,这些因素对SET的影响趋势和程度有很大的差异,且器件尺寸越小,这些因素对SET的影响越显著。通过设置合适的参数,可以实现电路的抗辐射加固。 相似文献
5.
利用脉冲激光对典型模拟电路的单粒子效应进行了试验评估及加固技术试验验证,研究2种不同工艺的运算放大器的单粒子瞬态脉冲(SET)效应,在特定工作条件下两者SET脉冲特征规律及响应阈值分别为79.4 pJ和115.4 pJ,分析了SET脉冲产生和传播特征及对后续数字电路和电源模块系统电路的影响。针对SET效应对系统电路的危害性,设置了合理的滤波电路来完成系统电路级加固,并通过了相关故障注入试验验证,取得了较好的加固效果。 相似文献
6.
运放和光耦的单粒子瞬态脉冲效应 总被引:1,自引:0,他引:1
利用脉冲激光模拟单粒子效应实验装置研究了通用运算放大器LM124J和光电耦合器HCPL5231的单粒子瞬态脉冲(SET)效应,获得了LM124J工作在电压跟随器模式下的瞬态脉冲波形参数与等效LET值的关系,甄别出该器件SET效应的敏感节点分布.初步分析了SET效应产生的机理.以HCPL5231为例,首次利用脉冲激光测试了光电耦合器的单粒子瞬态脉冲幅度、宽度与等效LET值的关系,并尝试测试了该光电耦合器的SET截面,实验结果与其他作者利用重离子加速器得到的数据符合较好,证实了脉冲激光测试器件单粒子效应的有效性. 相似文献
7.
利用脉冲激光模拟单粒子效应实验装置研究了通用运算放大器LM124J和光电耦合器HCPL5231的单粒子瞬态脉冲(SET)效应,获得了LM124J工作在电压跟随器模式下的瞬态脉冲波形参数与等效LET值的关系,甄别出该器件SET效应的敏感节点分布.初步分析了SET效应产生的机理.以HCPL5231为例,首次利用脉冲激光测试了光电耦合器的单粒子瞬态脉冲幅度、宽度与等效LET值的关系,并尝试测试了该光电耦合器的SET截面,实验结果与其他作者利用重离子加速器得到的数据符合较好,证实了脉冲激光测试器件单粒子效应的有效性. 相似文献
8.
9.
10.
为了研究组合逻辑中单粒子瞬态(Single-Event Transient,SET)的特性,采用片上测量技术提出了一套SET脉冲宽度测量方案.针对SET脉冲特性,设计了一种基于自主触发的脉冲测量电路,提出了一种用于自测试验证的脉冲激励电路.基于本所350nm SOI工艺,完成了一款集脉冲收集、测量、自测试于一体的SET重离子辐射测试芯片.通过仿真分析,验证了该方案的有效性.此方案为其他深亚微米工艺下SET研究提供了参考. 相似文献
11.
12.
随着工艺尺寸的不断缩小,由单粒子瞬态(Single Event Transient, SET)效应引起的软错误已经成为影响宇航用深亚微米VLSI电路可靠性的主要威胁,而SET脉冲的产生和传播也成为电路软错误研究的热点问题。通过研究SET脉冲在逻辑链路中的传播发现:脉冲上升时间和下降时间的差异能够引起输出脉冲宽度的展宽或衰减;脉冲的宽度和幅度可决定其是否会被门的电气效应所屏蔽。该文提出一种四值脉冲参数模型可准确模拟SET脉冲形状,并采用结合查找表和经验公式的方法来模拟SET脉冲在电路中的传播过程。该文提出的四值脉冲参数模型可模拟SET脉冲在传播过程中的展宽和衰减效应,与单参数脉冲模型相比计算精度提高了2.4%。该文应用基于图的故障传播概率算法模拟SET脉冲传播过程中的逻辑屏蔽,可快速计算电路的软错误率。对ISCAS89及ISCAS85电路进行分析的实验结果表明:该方法与HSPICE仿真方法的平均偏差为4.12%,计算速度提升10000倍。该文方法可对大规模集成电路的软错误率进行快速分析。 相似文献
13.
Single-event transient (SET) induced soft errors are becoming more and more a threat to the reliability of electronic systems in space. The SET pulse width is an important parameter characterizing the possibility of an SET being latched by a sequential element such as a flip-flop. This paper improves the widely used on-chip self-triggered SET measurement circuit by changing it from a single SET measurement module to a combination of two modules. One module is responsible for measuring narrow SET pulse widths while the other is responsible for measuring modest and wide SET pulse widths. In this way, the range of measurable SET pulse width is increased. Pulsed laser facility is used to simulate single-event transients induced by single-particles. Experimental results demonstrate that the minimum accurately measured SET pulse width is decreased from 166.5 ps to 33.3 ps after adopting the proposed design when compared with the original one. SET pulse width broadening effect was also observed using the measurement system. The broadening factor was measured to be 0.123–0.143 ps/inverter. 相似文献
14.
随着器件特征尺寸的缩减,单粒子瞬态效应(SET)成为空间辐射环境中先进集成电路可靠性的主要威胁之一。基于保护门,提出了一种抗SET的加固单元。该加固单元不仅可以过滤组合逻辑电路传播的SET脉冲,而且因逻辑门的电气遮掩效应和电气隔离,可对SET脉冲产生衰减作用,进而减弱到达时序电路的SET脉冲。在45 nm工艺节点下,开展了电路的随机SET故障注入仿真分析。结果表明,与其他加固单元相比,所提出的加固单元的功耗时延积(PDP)尽管平均增加了17.42%,但容忍SET的最大脉冲宽度平均提高了113.65%,且时延平均降低了38.24%。 相似文献
15.
Heavy ion results of a 65-nm CMOS SET pulse width testchip are given. The influences of device threshold voltage, temperature and well separation on pulse width are discussed. Experimental data implied that the low device threshold, high temperature and well speraration would contribute to wider SET. The multi-peak phenomenon in the distribution of SET pulse width was first observed and its dependence on various factors is also discussed. 相似文献
16.
《Microelectronics Journal》2007,38(10-11):1064-1069
This paper presents a staircase-down SET programming technique for phase-change memories (PCMs). The proposed programming approach allows compensating for spreads in cell physical parameters and obtaining adequately narrow cell distributions, which results in improved read margin. The cell programming curve is experimentally evaluated and discussed. The effectiveness of the proposed technique is demonstrated by comparing cell distributions obtained on an 8-Mb bipolar junction transistor (BJT)-selected PCM demonstrator by means of a conventional SET box pulse and a staircase-down SET pulse, respectively. 相似文献
17.
It has been shown that charge pumps (CPs) dominate single-event transient (SET) responses of phaselocked loops (PLLs). Using a pulse to represent a single event hit on CPs, the SET analysis model is established and the characteristics of SET generation and propagation in PLLs are revealed. An analysis of single event transients in PLLs demonstrates that the settling time of the voltage-controlled oscillators (VCOs) control voltage after a single event strike is strongly dependent on the peak control voltage deviation, the SET pulse width, and the settling time constant. And the peak control voltage disturbance decreases with the SET strength or the filter resistance. Furthermore, the analysis in the proposed PLL model is confirmed by simulation results using MATLAB and HSPICE,respectively. 相似文献
18.
Y. Ren L. Fan L. Chen S.-J. Wen R. Wong N. W. van Vonno A. F. Witulski B. L. Bhuva 《Journal of Electronic Testing》2012,28(6):877-883
Alpha particles, neutrons and laser-beam test results on an integrated pulse width modulation (PWM) controller operating in a DC/DC converter are presented in this paper. The PWM is fabricated on a 600-nm Bi-CMOS technology. Single-Event Transient (SET) derived from a bandgap circuit was amplified by a filter capacitor in the propagation path. Finally, a constant 6-??s SET pulse was observed on PGOOD pin which is a supervisory signal. This glitch caused system resets. Pulsed laser technology was adopted to locate the origin of the SET. 3D TCAD and circuit simulation tools were used to analyze the root cause. System and circuit level hardening approaches to mitigate the SET are also presented. 相似文献
19.
The effect of negative bias temperature instability(NBTI) on a single event transient(SET) has been studied in a 130 nm bulk silicon CMOS process based on 3D TCAD device simulations.The investigation shows that NBTI can result in the pulse width and amplitude of SET narrowing when the heavy ion hits the PMOS in the high-input inverter;but NBTI can result in the pulse width and amplitude of SET broadening when the heavy ion hits the NMOS in the low-input inverter.Based on this study,for the first time we ... 相似文献