A Prototype of the Read-out Subsystem of the BESⅢ DAQ Based on PowerPC

This article describes the prototype of the read-out subsystem which will be subject to the BESⅢ data acquisition system. According to the purpose of the BESⅢ, the event rate will be about 4000 Hz and the data rate up to 50 Mbytes/sec after Level 1 trigger. The read-out subsystem consists of some read-out crates and a read-out computer whose function is to initialize the hardware, to collect the event data from the front-end electronics after Level 1 trigger, to transfer data fragments to the computer in online form through two levels of computer pre-processing and high-speed network transmission. In this model, the crate level read-out implementation is based on the commercial single board computer MVME5100 running the VxWorks operating system.The article outlines the structure of the crate level testing platform of hardware and software. It puts emphasis on the framework of the read-out test model, data process flow and test method at crate level. Especially, it enumerates the key technologies in the process of design and analyses the test results. In addition, results which summarize the performance of the single board computer from the data transferring aspects will be presented.     

A compact readout system for multi-pixel hybrid photodiodes

The excellent properties of the recently developed multi-pixel hybrid photodiodes (M-HPD) will be easier to exploit following the development of the new hybrid read-out circuits described in this paper. This system will enable all of the required read-out functions to be accommodated on a single board into which the M-HPD is plugged. The design and performance of a versatile system is described in which a trigger-signal, derived from the common-side of the silicon anode in the M-HPD, is used to trigger the readout of the 61-anode pixels in the M-HPD. The multi-channel amplifier section is based on the use of a new, commercial VLSI chip, whilst the read-out sequencer uses a chip of our own design. The common anode signal is processed by a fast amplifier and discriminator to provide a trigger signal when a single event is detected. In the prototype version, the serial analogue output data-stream is processed using a PC-mounted, high speed ADC. Results obtained using the new read-out system in a compact gamma-camera and with a small muon tracking-chamber demonstrate the low-noise performance of the system. The application of this read-out system in other position-sensitive or multi-anode photomultiplier tube applications are also described     

FASTBUS Demonstration Systems

This paper will provide a demonstration of basic FASTBUS hardware and test software. The systems will include single crate segments, simple computer I/O, a fast sequencer and memory, some simple diagnostic and display devices and a UNIBUS to FASTBUS processor interface. The equipment will be set up to show the basic FASTBUS protocols and timing transactions, as well as some of the general initialization software features.     

BESIII晶体量能器触发系统时间提取和块能量相加

介绍了北京谱仪III(BESIII)电磁量能器触发系统的触发单元和块能量相加(TCBA)板的设计、硬件实现和测试结果。该板主要完成对触发单元信号的甄别以便进行簇团的计数,并且提取电磁量能器的时间信息,同时将触发单元能量进一步相加形成块能量信息。着重介绍了块能量相加、时间信息提取部分的设计和时间信息晃动的测试结果。     

BESⅢ读出系统测试与研发中的前端电子学模拟

介绍了BESⅢ读出系统测试与研发中利用MVME2431单板计算机对前端电子学的模拟实现。叙述了BESⅢ前端电子学系统的功能及模拟其系统的目的;着重介绍模拟所采用的技术路线和实现办法,并对电子学模拟的整体性能进行了客观评估。     

A real-time online data acquisition system for Dragon-I linear induction accelerator

An extensible high-speed accelerator data acquisition system (ADAS) for the Dragon-I linear induction accelerator has been developed.It comprises a VXI crate,a controller,four data acquisition plug-ins,and a host computer.A digital compensation algorithm is used to compensate for the distortion of high-speed signals arising from longdistance transmission.Compared with the traditional oscilloscope wall,ADAS has significant improvements in system integration,automation,and reliability.It achieves unified management of data acquisition and waveform monitoring and performs excellently with a 107-ps high-accuracy trigger and 32-channel signal monitoring.In this paper,we focus on the system architecture and hardware design of the ADAS,realization of the trigger,and digital compensation algorithm.     

A real-time online data acquisition system for Dragon-Ⅰ linear induction accelerator

An extensible high-speed accelerator data acquisition system (ADAS) for the Dragon-Ⅰ linear induction accelerator has been developed.It comprises a ⅤⅪ crate,a controller,four data acquisition plug-ins,and a host computer.A digital compensation algorithm is used to compensate for the distortion of high-speed signals arising from longdistance transmission.Compared with the traditional oscilloscope wall,ADAS has significant improvements in system integration,automation,and reliability.It achieves unified management of data acquisition and waveform monitoring and performs excellently with a 107-ps high-accuracy trigger and 32-channel signal monitoring.In this paper,we focus on the system architecture and hardware design of the ADAS,realization of the trigger,and digital compensation algorithm.     

Event and Pulse Node Hardware Design for Nuclear Fusion Experiments

This article presents an event and pulse node hardware module (EPN) developed for use in control and data acquisition (CODAC) in current and upcoming long discharges nuclear fusion experiments. Its purpose is to allow real time event management and trigger distribution. The use of a mixture of digital signal processing and field programmable gate arrays, with fiber optic channels for event broadcast between CODAC nodes, and short length paths between the EPN and CODAC hardware, allows an effective and low latency communication path. This hardware will be integrated in the ISTTOK CODAC to allow long AC plasma discharges.     

BESIII剂量率在线检测和保护系统读出电子学设计

为保护束流管, BESIII将使用PIN硅光电二极管来实时检测对撞点附近的剂量率水平,其中的信号读出电子学采用电流A/D转换方案.对几种弱电流放大与测量方法进行了比较,主要介绍了电流A/D方法的工作原理、软硬件实现以及实际性能.     

基于VME总线的触发硬件测试系统设计

介绍了VME手动机箱控制器与VME通道显示板的设计.在设计中充分利用FPGA的特点,因而该系统具有简单,可靠性高,以及灵活可变的特点.     

The trigger system of the first CMS tracker beam tests

The trigger for the first compact muon solenoid (CMS) tracking beam tests is a dedicated system for analog multiplexed front-end electronics. With this first generation of electronics dedicated to CMS tracker detectors, some new specific development was necessary to read it with a multicrate distributed data acquisition (DAQ) system. The goal of this development was to reach a high scalability of experiment subsystems and a good robustness for test beams. Each subsystem had to be independent from the others, both from the hardware and software point of view. Remote control software for this system as well as further monitoring facilities were the required functions of the trigger system     

用于普通能谱实验室的基于VME总线的数据获取系统研制

介绍了一套基于VME总线的实验室数据获取系统的设计及应用。此系统主要针对普通核物理或探测器实验室的实验探测器系统,获取系统硬件用通用ADC插件作为模数转换,用基于VME总线的单板机算计进行数据传输。获取程序基于ROOT数据处理平台,可实现在线监控数据,并使用直方图等数据格式将数据存储。通过这套系统获得的碲锌镉探测器对241Am的59 keVγ射线能谱,数据获取速率达4 MB/s。这套数据获取系统可很好地应用在探测器测试及相关实验领域。     

Real Time Control of the SSC String Magnets

The system described in this paper, called SECAR, was designed to control the excitation of a test string of magnets for the proposed Superconducting Super Collider (SSC) and will be used to upgrade the present Tevatron Excitation, Control and Regulation (TECAR) hardware and software . It resides in a VME crate and is controlled by a 68020/68881 based CPU running the application software under a real time operating system named VRTX.     

BESⅢDAQ软件事例组装数据流控制

事例组装是关系到整个北京谱仪数据获取软件的关键环节之一,探讨了一种受控的组装方法,把通过北京谱仪Ⅲ对撞机前端电子学系统获得的事例片段,"拉"到组装模块中.这种方法可以有效地控制组装事例时的数据流量.     

用于高速数据获取系统中的FERA总线驱动和存储器部件

ＦＥＲＡ总线驱动和存储器部件（ＦＤＭ）是专为ＣＶＣ而设计的单宽ＣＡＭＡＣ插件。ＦＤＭ发送控制信号到多达２２个带有ＦＥＲＡ总线功能的ＣＡＭＡＣＡＤＣ中，并自动将这些ＡＤＣ的数据收集，ＦＤＭ也可支持（联结）插在同一个ＣＡＭＡＣ机箱上的不同ＡＤＣ，插件能用两种获取模式存储来自于ＡＤＣ的数据，一种是单事例数据，一种是多事例数据，对于具有不同变换时间的ＡＤＣ，系统的数据读出同步依赖于插在同一ＣＡＭＡＣ机箱中     

BESIII Muon 前端电子学数据链过流保护系统设计

论文介绍了BESIII Muon前端电子学数据链过流保护系统的设计,其主要功能是监控数据链供电,防止数据链受大电流损伤。文章主要阐述了过流保护系统的软硬件设计,同时给出了过流保护系统原型机各项基本指标的测试结果。     

基于DIANE的BESⅢ分布式离线数据处理

北京谱仪Ⅲ(BESⅢ)是北京正负电子对撞机Ⅱ(BEPCⅡ)上用于τ-粲物理研究的大型通用磁谱仪。BESⅢ实验数据经过离线处理系统重建后才能用于物理分析。论文主要研究了BESⅢ分布式离线数据处理。基于DIANE软件,建立了一个分布式系统用于数据的事例级分布式处理。该系统在漂移室刻度的应用表明,性能能够满足BESⅢ实验的需求。     

BESIII在线软件中的分布式进程通信框架

新一代北京谱议(BESIII)数据获取系统(DAQ)是北京正负电子对撞机(BEPC)上的大型高能物理探测器的关键组成部分,分布式环境下软件的进程通信是设计和实现的关键技术之一.介绍了数据获取系统中所使用的一种分布式进程通信(IPC,Inter Process Communication)框架,该框架基于CORBA系统进行开发.着重描述了该框架在数据获取系统在线软件中的设计、实现及应用.     

The University of Washington Nuclear Physics Data Acquisition System

During the past several years we have been developing a new data acquisition system based on a PDP-11/60 with an MBD-11 controlled CAMAC crate. The hardware configuration, the acquisition codes involved and the offline analysis system, a VAX-11/780, will be described.     

BESIII Slow Control计算机系统结构与数据获取方案

介绍了北京正负电子对撞机升级改进国家重点项目二期工程中,北京谱仪BESIII 慢控制系统的微机系统结构及数据获取方案及系统软件设计.