Processability and reliability of nonconductive adhesives (NCAs) in fine-pitch chip-on-flex applications

The use of NCAs to form direct contact interconnections between chip bumps and substrate pads have become a viable option in interconnection technology for fine-pitch applications. However, the primary concerns with NCAs are their long-term reliability, stability, and consistent electrical performance in particulate interconnections. Results of assembly process studies and environmental testing using NCAs on flexible substrates are analyzed and discussed herein. An extensive design experiment was performed to determine which process parameters were critical in obtaining good electrical connections. A reliability evaluation of NCAs for flexible substrate applications was carried out to gain more insight into the failure mechanisms of this type of interconnect. Pressure cooker test results showed that failures occurring in NCA joints are primarily due to moisture absorption, which could lead to interfacial delamination at the substrate/adhesive interface, accompanied by hygroscopic swelling. NCAs with lower coefficients of thermal expansion also exhibited better contact resistance stability during high-temperature storage tests.     

Effect of nonconducting filler additions on ACA properties and thereliability of ACA flip-chip on organic substrates

We investigated the effect of nonconducting fillers on the thermomechanical properties of modified anisotropic conductive adhesive (ACA) composite materials and the reliability of flip chip assembly on organic substrates using modified ACA composite materials. For the characterization of modified ACAs composites with different content of nonconducting fillers, dynamic scanning calorimetry (DSC), thermogravimetric analysis (TGA), dynamic mechanical analysis (DMA), and thermomechanical analysis (TMA) were utilized. As the nonconducting filler content increased, CTE values decreased and storage modulus at room temperature increased. In addition, the increase in the content of filler brought about the increase of T_g(DSC) and T_g(TMA). However, the TGA behaviors stayed almost the same. Contact resistance changes were measured during reliability tests such as thermal cycling, high humidity and temperature, and high temperature at dry condition. The reliability results were significantly influenced by CTEs of ACA materials, especially at the thermal cycling tests. Results showed that flip chip assembly using modified ACA composites with lower coefficients of thermal expansion (CTEs) and higher modulus by loading nonconducting fillers exhibited better contact resistance behavior than conventional ACAs without nonconducting fillers     

Study of the fluxing agent effects on the properties of no-flowunderfill materials for flip-chip applications

As one of the key requirements of the no-flow underfill materials for flip-chip applications, a proper self-fluxing agent must be incorporated in the developed no-flow underfill materials to provide proper fluxing activity during the simultaneous solder reflow and underfill material curing. However, most fluxing agents have some adverse effects on the no-flow underfill material properties and assembly reliability. In this paper, we have extensively investigated the effects of the concentration of the selected fluxing agent on the material properties, interconnect integrity and assembly reliability. Through this work, an optimum concentration window of the fluxing agent is obtained and a routine procedure of evaluating fluxing agents is established     

Effects of underfill materials on the reliability of low-K flip-chip packaging

The reliability of low-K flip-chip packaging has become a critical issue owing to the low strength and poor adhesion qualities of the low-K dielectric material when compared with that of SiO₂ or fluorinated silicate glass (FSG). The underfill must protect the solder bumps and the low-K chip from cracking and delamination. However, the material properties of underfill are contrary to those required for preventing solder bumps and low-K chip from cracking and delamination. This study describes the systematic methodologies for how to specify the adequate underfill materials for low-K flip-chip packaging. The structure of the test vehicle is seven copper layers with a low-K dielectric constant value of 2.7-2.9, produced by the chemical vapor deposition (CVD) process. Initially, the adhesion and the flow test of the underfill were evaluated, and then the low-K chip and the bumps stress were determined using the finite element method. The preliminary screened underfill candidates were acquired by means of the underfill adhesion and flow test, and balancing the low-K chip and the bumps stress simulation results. Next, the low-K chips were assembled with these preliminary screened underfills. All the flip-chip packaging specimens underwent the reliability test in order to evaluate the material properties of the underfill affecting the flip-chip packaging stress. In addition, the failed samples are subjected to failure analysis to verify the failure mechanism. The results of this study indicate that, of the underfill materials investigated, those with a glass transition temperature (T_g) and a Young’s modulus of approximately 70–80 °C and 8–10 GPa, respectively, are optimum for low-K flip-chip packaging with eutectic solder bumps.     

EMC材料特性对MEMS加速度计封装可靠性的影响

采用有限元法分析了EMC(环氧模塑封材料)材料特性对MEMS(微电子机械系统)加速度计封装可靠性的影响.使用有限元软件ANSYS分别模拟了加速度计的输出电压、悬臂梁的挠度以及加速度计芯片的等效应力在温度循环载荷下的变化情况.结果发现,EMC的材料模式不同,MEMS加速度计的性能有明显差异.在使用EMC温度相关弹性模式和...     

Effects of solder reflow on the reliability of flip-chip on flex interconnections using anisotropic conductive adhesives

This work describes the work of an investigation of the effects of solder reflow process on the reliability of anisotropic conductive film (ACF) interconnection for flip-chip on flex (FCOF) applications. Experiments as well as computer modeling methods have been used. The results show that the contact resistance of ACF interconnections increases after the reflow and the magnitude of the increase is strongly correlated to the peak reflow temperature. In fact, nearly 40 percent of the joints are open when the peak reflow temperature is 260/spl deg/C, while there is no opening when the peak temperature is 210/spl deg/C. It is believed that the coefficient of thermal expansion (CTE) mismatch between the polymer particle and the adhesive matrix is the main cause of this contact degradation. To understand this phenomenon better, a three-dimensional (3-D) finite element (FE) model of an ACF joint has been analyzed in order to predict the stress distribution in the conductive particles, adhesive matrix and metal pads during the reflow process. The stress level at the interface between the particle and its surrounding materials is significant and it is the highest at the interface between the particle and the adhesive matrix.     

A reliability comparison of electroplated and stencil printed flip-chip solder bumps based on UBM related intermetallic compound growth properties

The effects of under bump metallurgy (UBM) microstructures on the intermetallic compound (IMC) growth of electroplated and stencil printed eutectic Sn-Pb solder bumps were investigated. The process parameters and their effects on UBM surface morphology and UBM shear strength were studied. For the electroplating process, the plating current density was the dominant factor to control the Cu UBM microstructure. For the stencil printing process, the zincation process has the most significant effect on the Ni UBM surface roughness and Ni grain sizes. In both processes, the good adhesion of UBM to aluminum can be obtained under suitable UBM processing conditions. Samples with different UBM microstructures were prepared using the two processes. The resulting samples were thermal aged at 85/spl deg/C, 120/spl deg/C, and 150/spl deg/C. It was observed that the Cu UBM surface roughness had larger effect on the IMC growth and solder ball shear strength than the Ni UBM surface roughness. The thickness of Cu/sub 3/Sn and Cu/sub 6/Sn/sub 5/ IMC depended strongly on the UBM microstructure. However, for Ni/Au UBM, no significant dependence was observed. More likely, the thickness of Au-Ni-Sn IMC near the IMC/solder interface was controlled by the amount of gold and the gold diffusion rate in the solder. Shear tests were performed after thermal aging tests and thermal/humidity tests. Different failure modes of different sample groups were analyzed. Electroless Ni UBM has been developed because it is a mask-less, low-cost process compared to electroplated Cu UBM. This study demonstrated that the process control was much easier for Ni UBM due to its lower reactivity with Sn material. These properties made Ni UBM a promising candidate for the lead-free solder applications.     

Waveguiding properties and applications of silica nanowires in various environments

Waveguiding properties of silica nanowires in various environments are studied by solving the eigenvalue equations of a circular cross-section waveguide numericany in cylindrical coordinates. The single-mode condition, propagation constants, poynting vector and power distribution inside and outside silica nanowire are calculated. The results show that silica nanowires in water, compared with silica nanowires in air, have higher fraction of the evanescent fields. Due to the sensitivity to surrounding environment, silica nanowires arc very suitable for sensing elements, which can be used to implemept a single-mode fiber optic evanescent wave sensing element of highly sensitive and accurate measurement.     

Effects of underfill material properties on the reliability ofsolder bumped flip chip on board with imperfect underfill encapsulants

Three different types of underfill imperfections were considered; i.e., (1) interfacial delamination between the underfill encapsulant and the solder mask on the PCB (crack initiated at the tip of underfill fillet), (2) interfacial delamination between the chip and the underfill encapsulant (crack initiated at the chip corner), and (3) the same as (2) but without the underfill fillet. Five different combinations of coefficient of thermal expansion (CTE) and Young's modulus with the aforementioned delaminations were investigated. A fracture mechanics approach was employed for computational analysis. The strain energy release rate at the crack tip and the maximum accumulated equivalent plastic strain in the solder bumps of all cases were evaluated as indices of reliability. Besides, mechanical shear tests were performed to characterize the shear strength at the underfill-solder mask interface and the underfill-chip passivation interface. The main objective of the present study is to achieve a better understanding in the thermo-mechanical behavior of flip chip on board (FCOB) assemblies with imperfect underfill encapsulants     

An investigation of the reliability of solderable ICA with low-melting-point alloy (LMPA) filler

Conductive adhesives play a major role in the electronic packaging industry as an alternative to solder due to their potential advantages that include mild processing conditions and superior thermo-mechanical performance. In a conductive adhesive interconnection, adequate mechanical and electrical performance and long-term reliability are critical.In this paper, the reliability of solderable isotropic conductive adhesive (ICA) interconnections was investigated. Reliability testing was performed via thermal shock (−55 to 125 °C, 1000 cycles) and high-temperature and high-humidity tests (85 °C, 85% RH, 1000 h). The interfacial microstructure of the solderable ICA was also investigated. Additionally, the fracture mode was investigated via mechanical pull strength testing before and after the reliability test. The electrical resistance of the solderable ICA interconnection showed improved stability compared to conventional ICAs, and similar stability to conventional solder paste (Sn–3Ag–0.5Cu and Sn–58Bi) due to the metallurgical interconnection formed by the molten LMPA fillers between the corresponding metallization layers. After the reliability tests, the grown IMC layer was composed of Cu₆Sn₅ (η-phase) and Cu₃Sn (ε-phase), and the scallop-type IMC transformed into a layer-type IMC. The fracture propagated along the Cu–Sn IMC/SnBi interface and the fracture surface showed a semi-brittle fracture mode mixed with cleavage and ductile tear bands.     

Effects of oxidation on reliability of screen-printed silver circuits for radio frequency applications

High reliability has become one of the crucial requirements for portable electronic devices, due to the high dependence of their radio frequency (RF) characteristics on the end-user's surroundings. The RF characteristics of screen-printed silver (Ag) circuits were investigated after a steady-state temperature and humidity storage test. A conductive paste containing Ag nanoparticles was screen-printed onto a silicon (Si) substrate and then sintered at 250 °C for 30 min in air. The printed Ag circuits were placed in a chamber at 85 °C/85% relative humidity (RH) for various durations: 100, 300, 500, 1000 h. The microstructural evolution and thickness profiles of the Ag circuits were observed with field emission scanning electron microscopy and α-step, respectively. The oxidation of the printed Ag circuit surface was analyzed with Auger electron spectroscopy. A network analyzer and Cascade's probe system in the frequency range of 40 MHz to 40 GHz were employed to measure the scattering parameters of the Ag circuits. The experimental results showed that the insertion losses at higher frequencies increased with increasing durations of exposure to the 85 °C/85% RH environment, due to the thicker specific layer for oxidation on the circuit surfaces. The oxide layer was the dominant factor affecting the RF characteristics of the screen-printed Ag thin circuits. Therefore, it is essential to control the oxidation of printed circuits for versatile RF applications.     

Optoelectronic and microwave transmission characteristics of indium solder bumps for low-temperature flip-chip applications

This paper describes low-temperature flip-chip bonding for both optical interconnect and microwave applications. Vertical-cavity surface-emitting laser (VCSEL) arrays were flip-chip bonded onto a fused silica substrate to investigate the optoelectronic characteristics. To achieve low-temperature flip-chip bonding, indium solder bumps were used, which had a low melting temperature of 156.7/spl deg/C. The current-voltage (I-V) and light-current (L-I) characteristics of the flip-chip bonded VCSEL arrays were improved by Ag coating on the indium bump. The I-V and L-I curves indicate that optical and electrical performances of Ag-coated indium bumps are superior to those of uncoated indium solder bumps. The microwave characteristics of the solder bumps were investigated by using a flip-chip-bonded coplanar waveguide (CPW) structure and by measuring the scattering parameter with an on-wafer probe station for the frequency range up to 40 GHz. The indium solder bumps, either with or without the Ag coating, provided good microwave characteristics and retained the original characteristic of the CPW signal lines without degradation of the insertion and return losses by the solder bumps.     

Material properties of anisotropic conductive films (ACFs) and their flip chip assembly reliability in NAND flash memory applications

In this paper, the material properties of anisotropic conductive films (ACFs) and ACF flip chip assembly reliability for a NAND flash memory application were investigated. Measurements were taken on the curing behaviors, the coefficient of thermal expansion (CTE), the modulus, the glass transition temperature (T_g), and the die adhesion strength of six types of ACF. Furthermore, the bonding processes of the ACFs were optimized. After the ACF flip chip assemblies were fabricated with optimized bonding processes, reliability tests were then carried out. In the pressure cooker test, the ACF with the highest adhesion strength showed the best reliability and the ACF flip chip assembly revealed no delamination at the chip-ACF interface, even after 96 h. In the high temperature storage test and the thermal cycling test, the reliability of the ACF flip chip assembly strongly depends on the T_g value of the ACF. In the thermal cycling test, in particular, which gives ACF flip chip assemblies repetitive shear stress, high value of CTE above T_g accelerates the failure rate of the ACF flip chip assembly. From the reliability test results, ACFs with a high T_g and a low CTE are preferable for enhancing the thermal and thermo-mechanical reliability. In addition, a new double-sided chip package with a thickness of 570 μm was demonstrated for NAND flash memory application. In conclusion, this study verifies the ACF feasibility, and recommends the optimum ACF material properties, for NAND flash memory application.     

Effects of Thermal Cycling on Material Properties of Nonconductive Pastes (NCPs) and the Relationship Between Material Properties and Warpage Behavior During Thermal Cycling

In this paper, the effects of thermal cycling on material properties such as coefficient of thermal expansion (CTE), modulus, and glass transition temperature $({rm T}_{rm g})$ of nonconductive pastes (NCPs) for flip chip applications were investigated. Using a thermomechanical analyzer, the dimensional changes of NCPs and an underfill material were measured. The dimensional changes of all materials during the first cycle rapidly increased near ${rm T}_{rm g}$. However, the rapid increase of dimensional change near ${rm T}_{rm g}$ was not observed during the second and third cycles. Furthermore, using a dynamic mechanical analyzer, the modulus and ${rm T}_{rm g}$ were measured. The modulus in the first cycle was smaller than that in the second cycle for all materials. After the first cycle, the modulus curves followed the second cycle curve. Next, the warpage behavior of the flip chip assemblies was observed using the Twyman–Green interferometry method to investigate how material property changes affect warpage behavior during thermal cycling (T/C) and it was found that the warpage of the flip chip assembly decreased after the first cycle. However, after the first cycle, the amount of warpage was constant for the following five cycles. As a result, it was verified that the material properties of NCPs and the underfill material change after the first thermal cycle, and the material property changes are closely related to the warpage hysteresis behavior during T/C. Finally, warpage hysteresis was understood as shear strain.      

Effects of thermoplastic resin content of anisotropic conductive films on the pressure cooker test reliability of anisotropic conductive film flip-chip assembly

The flip-chip technology using anisotropic conductive films (ACFs) is gaining growing interest due to its technical advantages such as environmentally friendly, simpler, and lower cost processes. Electrical performances and reliability of ACF flip-chip assembly depend on thermomechanical properties of ACF polymer resins. In this paper, the changes in ACF resin morphology due to the phase separation of thermoplastics, and subsequent changes of physical and mechanical properties were investigated as a function of thermoplastic contents of ACF formulation. Furthermore, the pressure cooker test (PCT) reliability of ACF flip-chip assemblies with various thermoplastic contents was also investigated. As thermoplastic contents increased, coefficient of thermal expansion (CTE) of ACFs increased, and elastic modulus (E′) of ACFs decreased. In contrast, water absorption rate decreased as thermoplastic content increased. As a result, PCT reliability of ACF flip-chip assembly was improved adding up to 50 wt.% content of thermoplastic. An erratum to this article is available at .     

Solder reflow process induced residual warpage measurement and its influence on reliability of flip-chip electronic packages

To meet the future needs of high pin count and high performance, package size of flip-chip devices is constrained to become larger. In addition, to fulfill the environment issues, lead free solders will be replacing lead contained eutectic (Sn/37Pb) in near future. Thus, in this work, the effect of residual warpage and consequent residual stress on the reliability of large flip-chip using lead free solder is examined. Several effective experimental approaches to accurately measure residual warpage, using Moiré interferometry, shadow Moiré, and image processing schemes, are introduced. Moreover, geometric, process, and material parameters affecting the residual warpage during reflow process are discussed and some modifications are suggested. Finally, it is verified that it is crucial to accurately quantify and control the residual warpage in order to guarantee the overall reliability of flip-chip packages regardless of presence of underfill.     

The microelectronics applications of differential scanning calorimetry for packaging and materials—Including solder pastes

DSC analyses provide key understandings of materials and can be integrated with processing requirements. The DSC should not be an integral part of the quality control program but it provides an “essential” means to assure the selection of materials to meet the complex requirements of today's high technology.     

Recent advances in plastic packaging of flip-chip and multichipmodules (MCM) of microelectronics

The success in consumer electronics in the 1990's will be focused on low-cost and high performance electronics. Recent advances in polymeric materials (plastics) and integrated circuit (IC) encapsulants have made high-reliability very-large-scale integration (VLSI) plastic packaging a reality. High-performance polymeric materials possess excellent electrical and physical properties for IC protection. With their intrinsic low modulus and soft gel-like nature, silicone gels have become very effective encapsulants for larger, high input/output (I/O) (in excess of 10 000), wire-bonded and flip-chip VLSI chips. Furthermore, the recently developed silica-filled epoxies underfills, with the well controlled thermal coefficient of expansion (TCE), have enhanced the flip-chip and chip-on-board, direct chip attach (DCA) encapsulations. Recent studies indicate that adequate IC chip surface protection with high-performance silicone gels and epoxies plastic packages could replace conventional ceramic hermetic packages. This paper will review the IC technological trends, and IC encapsulation materials and processes. Special focus will be placed on the high-performance silicone and epoxy underfills, their chemistries and use as VLSI device encapsulants for single and multichip module applications     

缓冲层对PMS-PNN-PZT压电厚膜材料性能的影响

采用丝网印刷的方法制备了PMS-PNN-PZT四元系压电厚膜陶瓷材料。研究了基板、下电极和PMS-PNN-PZT厚膜层三者之间的高温扩散作用,及SiO2缓冲层对PMS-PNN-PZT压电厚膜的压电性能以及显微结构的影响。用XRD和SEM分析材料的相组成、厚膜定位及压电层的显微结构。结果表明,缓冲层有效地阻止了三者之间的相互扩散,样品的d33、εr等都有所提高,所制得的压电厚膜d33为285pC/N,εr为1210,Qm为1330,kp为0.54。