One-pot surface modification of poly(ethylene-alt-maleic anhydride) gate insulators for low-voltage DNTT thin-film transistors

This study investigates the one-pot surface modification of poly(ethylene-alt-maleic anhydride) (PEMA) gate insulators crosslinked with 1,5-naphthalenediamine (1,5-NDA) for enhancing the device performance of low-voltage dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (DNTT) organic thin-film transistors (OTFTs). Surface properties of the PEMA gate insulator could be easily modified by adding poly(maleic anhydride-alt-1-octadecene) (PMAO) to the coating solution. The surface energy of the gate insulator is strongly correlated with the growth of organic semiconductors and the charge carrier transport at the interface between the semiconductor and gate insulator. The results indicate that the device performance of low-voltage DNTT OTFTs can be improved by one-pot surface modification of the PEMA gate insulator.     

Rapid UV-A photo detection using a BTBT organic thin-film transistor enhanced by a 1,5-dichloro-9,10-dintiro-anthracene acceptor

A UV-A sensitive phototransistor was demonstrated using an organic semiconductor 2,7-dipentyl[1]benzothieno[3,2- b ][1] benzothiophene (C5-BTBT) and a strong electron acceptor 1,5-dichloro-9,10-dintiro-anthracene (2Cl-2NO₂-Anth) which is not photo-isomerizable. At 0 gate bias the photoresponsivity of the device begins to saturate at an incident power P_inc = 1 mW/cm², where a photocurrent-to-dark current ratio (P) of P > 10⁵ is observed with a photoresponsivity of 9 A/W. The photoresponsivity was increased with the decrease of P_inc, reaching 40 A/W at a P_inc = 0.0427 mW/cm². A persistent photocurrent with a P > 10⁵ was observed for more than 2 h, demonstrating the potential use for rewritable photo memory. By applying a gate voltage program consisting of a reset pulse of −90 V every 2nd data point, the device can perform as a UV sensor or switch at the timescale of 600 ms.     

Fully solution-processed organic thin-film transistors by consecutive roll-to-roll gravure printing

A high-performance/flexible organic thin-film transistor (OTFT) is fabricated by using all-step solution processes, which are composed of roll-to-roll gravure, plate-to-roll gravure and inkjet printing with the least process number of 5. Roll-to-roll gravure printing is used to pattern source/drain electrodes on plastic substrate while semiconductor and dielectric layers are printed by consecutive plate-to-roll gravure printing. Finally, inkjet printing of Ag organometallic ink is used to pattern the gate electrode. The fabricated OTFT exhibits excellent electrical performance, field-effect mobility over 0.2 cm²/Vs, which is one of the best compared to the previous works. The deposition of a self-assembled monolayer on the source-drain electrodes results in a higher work function which is suitable for a p-type polymer semiconductor. Moreover, the formation of dense gate electrode line on hydrophobic dielectric is achieved by selecting suitable Ag ink.     

Performance enhancement of p-type organic thin-film transistors by surface modification of hybrid dielectrics

The quality of the dielectric/organic semiconductor interface is a critical issue, because it determines the charge transport properties in organic thin-film transistors (OTFTs). High-k organic-inorganic hybrid films have received considerable attention for their outstanding dielectric properties, including low leakage currents, high breakdown fields, and suitable band offsets against the organic semiconductor. However, Hf and Zr hybrid gate dielectrics on p-type OTFTs show poor charge transport properties in the organic semiconductor channel, due to the polaron disorder elicited by the high-k properties and the presence of the –N(CH₃)₂ polarity (hole trapper) on the dielectric/semiconductor interface. In this report, the surface of the Hf and Zr hybrid dielectrics was capped by an ultra-thin poly-1,3,5-trivinyl-1,3,5,-trimethyl-cyclosiloxane (pV3D3) layer formed via an initiated chemical vapor deposition (iCVD) process, to modify the hybrid dielectrics/semiconductor interface. The pV3D3-capped Hf and Zr hybrid OTFTs show an enhanced V_T stability while a large amount of V_T shift was observed from the Hf and Zr hybrid OTFTs. This large amount of V_T shift is attributed to the hole trap sites originated by –N(CH₃)₂ on the uncapped hybrid dielectrics. Furthermore, the p-type OTFTs with the pV3D3-capped hybrid dielectrics show a higher mobility than those with the uncapped hybrid dielectrics. The presence of the non-polar/low-k pV3D3 on the hybrids contribute to narrow the density of state (DOS) in the organic channel, improving the charge transport properties. This combined approach using the bulk layer of Hf and Zr hybrid films and the pV3D3 capping layer can overcome the limitations of single-layer hybrid dielectrics and improve the overall device performance of the OTFTs.     

Enhancing the performance of solution-processed organic thin-film transistors by blending binary compatible small molecule semiconductors

Physical blending is a facile and effective way to improve the performance of solution processed organic thin-film transistors (OTFTs). Blending small molecule semiconductors with soluble polymers has been extensively studied in recent years. However, blending between binary small molecule semiconductors is rare due to the difficulty to obtain ideal thin films. Herein, we systematically investigate the blending effects on the morphologies of thin films and their field-effect performance by using two small molecule semiconductors, 2-phenyl[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT) and 2-(4-dodecylphenyl) [1]benzothieno[3,2-b]benzothiophene, (C12-Ph-BTBT), which have the same aromatic skeleton. Molecular ordering and better crystallinity are observed in most of spin-coated blend thin films, thanks to the enhanced molecular interaction after blending. As a result, OTFTs based on blend thin films exhibit improved performance in most cases, with the highest average hole mobility about 1.5 cm² V⁻¹ s⁻¹ demonstrated. Further device performance improvements are demonstrated by blending polystyrene with Ph-BTBT and C12-Ph-BTBT blends. The results here indicate that blending between small molecule semiconductors with compatible fused ring structures may be a promising strategy to enhance the performance of organic transistors.     

Two-step surface modification for bottom-contact structured pentacene thin-film transistors

We investigated surface treatment effects of hexamethyldisilazane (HMDS), poly(3,4-ethylenedioxythiophene):polystyrene sulfonate (PEDOT:PSS) and l-cysteine on gold source/drain electrodes in bottom-contact structured pentacene thin-film transistors (TFTs). The treatment methods include spin coating and immersing. We have also researched on two-step treatment based on the combination of each treatment methods. The highest device performance was achieved by treating gold S/D electrodes with l-cysteine first and PEDOT:PSS afterwards, showing field effect mobility up to 0.35 cm²/V·s. l-cysteine can reduce the contact resistance between metal and semiconductor layer, and PEDOT:PSS acted as a hole transporting layer while HMDS decreased the surface energy, which enlarged the grain size of pentacene on it.     

Crosslinked polymer-mixture gate insulator for high-performance organic thin-film transistors

In this paper, we report on the fabrication of a crosslinked polymer-mixture gate insulator for high-performance organic thin-film transistors (TFTs). We used cyanoethylated pullulan (CEP) as a crosslinkable high-k polymer matrix and poly(ethylene-alt-maleic anhydride) (PEMA) as a polymeric crosslinking agent. Because PEMA has a high number of functional groups reactive to the hydroxyl groups of CEP, the use of PEMA is effective for minimizing the amount of remaining hydroxyl groups strongly related to the large current hysteresis and high off current of the organic TFTs. To investigate the potential of the CEP-PEMA mixture as a gate insulator, we fabricated 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C₈-BTBT) TFTs. The C₈-BTBT TFT with the 60 nm-thick CEP-PEMA gate insulator showed excellent TFT performance with a field-effect mobility of 1.4 cm²/V s and an on/off ratio of 2.4 × 10⁶.     

Inkjet-printed copper electrodes using photonic sintering and their application to organic thin-film transistors

We report on copper (Cu) electrodes fabricated with inkjet-printed nanoparticle inks that are photonic sintered on a polymer dielectric layer and their application to source and drain electrodes in organic thin-film transistor (TFT). By using photonic sintering with a radiant energy density of 9 J/cm², printed Cu nanoparticle layers on a glass substrate showed very low electrical resistivity levels of 7 μΩ cm. By optimizing the sintering conditions on polymer dielectric, the pentacene-based TFT using these printed Cu electrodes showed good mobility levels of 0.13 cm²/Vs and high on/off current ratios of about 10⁶. In addition, we revealed that the crystal grain growth of pentacene near the printed Cu electrodes was inhibited by the thermal damage of polymer underlayer due to the high radiant energy density of the intense light.     

High-mobility organic thin-film transistors based on a small-molecule semiconductor deposited in vacuum and by solution shearing

The small-molecule organic semiconductor 2,9-di-decyl-dinaphtho-[2,3-b:2′,3′-f]-thieno-[3,2-b]-thiophene (C₁₀-DNTT) was used to fabricate bottom-gate, top-contact thin-film transistors (TFTs) in which the semiconductor layer was prepared either by vacuum deposition or by solution shearing. The maximum effective charge-carrier mobility of TFTs with vacuum-deposited C₁₀-DNTT is 8.5 cm²/V s for a nominal semiconductor thickness of 10 nm and a substrate temperature during the semiconductor deposition of 80 °C. Scanning electron microscopy analysis reveals the growth of small, isolated islands that begin to coalesce into a flat conducting layer when the nominal thickness exceeds 4 nm. The morphology of the vacuum-deposited semiconductor layers is dominated by tall lamellae that are formed during the deposition, except at very high substrate temperatures. Atomic force microscopy and X-ray diffraction measurements indicate that the C₁₀-DNTT molecules stand approximately upright with respect to the substrate surface, both in the flat conducting layer near the surface and within the lamellae. Using the transmission line method on TFTs with channel lengths ranging from 10 to 100 μm, a relatively small contact resistance of 0.33 kΩ cm was determined. TFTs with the C₁₀-DNTT layer prepared by solution shearing exhibit a pronounced anisotropy of the electrical performance: TFTs with the channel oriented parallel to the shearing direction have an average carrier mobility of (2.8 ± 0.3) cm²/V s, while TFTs with the channel oriented perpendicular to the shearing direction have a somewhat smaller average mobility of (1.3 ± 0.1) cm²/V s.     

Physical model of Seebeck coefficient under surface dipole effect in organic thin-film transistors

The surface dipole effect can play an important role in the performance of charge carrier transport in organic thin-film transistors (OTFTs). In this work, we propose a physical model of Seebeck coefficient based on variable-range hopping theory in OTFTs to characterize carrier thermoelectric transport. The model effectively explains the influence of a dipole on the carrier density, energetic disorder and temperature dependence of the Seebeck effect. The gate-voltage and temperature dependence of the Seebeck effect are remarkably enhanced by a dipole, while the energetic disorder exhibits a weak dependent nature. The Seebeck coefficients calculated in this study and those obtained experimentally in a previous study were found to be in good agreement.     

Surface modification of printed silver electrodes for efficient carrier injection in organic thin-film transistors

The modification of printed silver electrode surfaces for use as the bottom-contact electrodes of organic thin-film transistors (OTFTs) is reported. Printed silver electrodes fabricated using the surface photoreactive nanometal printing (SuPR-NaP) technique are inevitably covered with an inert surface layer of alkylamines that is originally used for encapsulation of the silver nanoparticles (AgNPs). However, it may act as a built-in protective layer against carrier injections. We demonstrate that a simple vapor exposure method is sufficient for converting the protective layer into a layer that assists carrier injection. As modifiers, we used various types of fluorinated benzenethiols that exhibit a stronger coordination with the silver surfaces than the alkylamimes. We detected the chemical conversion from alkylamine encapsulation to thiol coordination by surface enhanced Raman spectroscopy (SERS) and evaluated the improvement in the carrier injection using a transfer length method (TLM) for the OTFTs. Among the modifiers, the pentafluorobenzenethiol (PFBT) treatment significantly improves the device performance and stability of the OTFTs.     

Interfacial modifying layer-driven high-performance organic thin-film transistors and their nitrogen dioxide gas sensors

Organic thin-film transistors (OTFTs) based on bottom-gate bottom-contact configuration were fabricated by inserting two kinds of modifying layers at the interface of source/drain electrode and organic semiconductor, while nitrogen dioxide (NO₂) sensing capability was also evaluated based on the obtained OTFTs. Compared to OTFT without interfacial layer, the field-effect mobility (μ) was enhanced from 0.018 cm²/Vs to 0.15 cm²/Vs by incorporating with MoO_x interfacial layer. Moreover, when exposed to 30 ppm NO₂, the saturation current and μ of OTFT with MoO_x interfacial layer increase 22.7% and 26.7%, respectively, while in original OTFT, the values are only 3.0% and 3.7%, respectively. The mechanism of performance improvement of OTFT sensor was systematically studied by focusing on the interface of source/drain electrode and organic semiconductor. The reduced contact resistance leads to higher μ, meanwhile, pentacene morphology modulation on MoO_x contributes to better diffusion of NO₂ molecules. As a result, higher μ and more diffused gas molecules enhance the gas sensing property of the transistor.     

Low-voltage operation of organic thin-film transistors based on ultrafine printed silver electrodes

We report the low-voltage operation of organic thin-film transistors (OTFTs) based on high-resolution printed source/drain electrodes that are produced by a surface photoreactive nanometal printing (SuPR-NaP) technique. We utilized an ultrathin layer of perfluoropolymer, Cytop, that functions not only as a gate dielectric layer in the OTFTs but also as a base layer for producing a patterned reactive surface for silver nanoparticle chemisorption in the SuPR-NaP technique. We successfully demonstrate 2 V operation with negligible hysteresis in the polycrystalline pentacene OTFT with a gate dielectric thickness of 22 nm, and we achieved current amplification by the printed electrodes modified with pentafluorobenzenethiol. The SuPR-NaP technique enables the production of high-resolution printed silver electrodes required for high-performance OTFTs, which have potential practical electronic device applications.     

Megahertz operation of flexible low-voltage organic thin-film transistors

Bottom-gate, top-contact (inverted staggered) organic thin-film transistors with a channel length of 1 μm have been fabricated on flexible plastic substrates using the vacuum-deposited small-molecule semiconductor 2,9-didecyl-dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (C₁₀-DNTT). The transistors have an effective field-effect mobility of 1.2 cm²/V s, an on/off ratio of 10⁷, a width-normalized transconductance of 1.2 S/m (with a standard deviation of 6%), and a signal propagation delay (measured in 11-stage ring oscillators) of 420 ns per stage at a supply voltage of 3 V. To our knowledge, this is the first time that megahertz operation has been achieved in flexible organic transistors at supply voltages of less than 10 V.     

Improved pentacene growth continuity for enhancing the performance of pentacene-based organic thin-film transistors

This study proposes an alternative planar bottom-contact (pBC) structure to enhance the electrical performance of pentacene-based organic thin-film transistors (OTFTs). This pBC structure uses a bilayer dielectric to control planarization with a precise etch depth and introduces a bilayer photoresist lift-off method to ensure that planarization produces an optimum flatness. Because of the improved growth continuity of pentacene near the edge of the source/drain electrodes, the contact resistance between the source/drain and the pentacene was reduced significantly, thereby enhancing the electrical performance of OTFTs. The mechanism for the enhanced performance was also verified by a physics-based numerical simulation.     

Teflon/SiO2 bilayer passivation for improving the electrical reliability of pentacene-based organic thin-film transistors

We demonstrate a bilayer passivation method using a Teflon and SiO₂ combination layer to improve the electrical reliability of pentacene-based organic thin-film transistors (OTFTs). The Teflon was deposited as a buffer layer using a thermal evaporator that exhibited good compatibility with the underlying pentacene channel layer, and can effectively protect the OTFTs from plasma damage during the SiO₂ deposition process, resulting in a negligible initial performance drop in OTFTs. Furthermore, because of the excellent moisture barrier ability of SiO₂, the OTFTs exhibited good time-dependent electrical performance, even after 168 h of aging in ambient air with 60–80% relative humidity.     

Polyimide/polyvinyl alcohol bilayer gate insulator for low-voltage organic thin-film transistors

In this paper, we report the fabrication of a polyimide/polyvinyl alcohol (PVA) bilayer gate insulator for low-voltage organic thin-film transistors (TFTs). The introduction of a PVA layer to form a bilayer structure improves the dielectric and insulating properties of the gate insulator. Organic TFTs with 150 nm-thick polyimide and PVA gate insulators were inactive at low operation voltages below 5 V. Conversely, organic TFTs with 150 nm-thick polyimide/PVA bilayer gate insulators exhibited excellent device performances. Our results suggest that the introduction of a PVA layer with a high dielectric constant could be a simple and efficient way to improve the device performance of low-voltage organic TFTs.     

Accounting for variability in the design of circuits with organic thin-film transistors

We experimentally verify that the methodology to account for local parameter variations and transistor mismatch known in Si CMOS technologies can be transposed to organic thin-film transistor technologies, and we present a design case that makes use of design for variability. Transistor parameter variation decreases with the square root of the transistor footprint. As a consequence, Monte Carlo simulations which take this effect into account can be executed to better predict the final circuit yield. The design case in this work is an 8-bit, organic RFID transponder chip. The yield prediction by simulations corresponds to the finally observed circuit yield.     

Inserting a Mn-doped TiO2 layer for improving performance of pentacene organic thin-film transistors

Device performance of pentacene organic thin-film transistors (OTFTs) was significantly improved via inserting a Mn-doped TiO₂ layer between pentacene semiconductor and the source–drain electrodes. In comparison with the OTFTs with only-Au electrodes, the introduction of a thin Mn-doped TiO₂ layer leads to saturation current increasing from 31.9 μA to 0.22 mA, effective field-effect mobility improving from 0.24 to 1.13 cm²/V s, and threshold voltage downshifting from −11 to −2 V. These performance enhancements are ascribed to the significant reduction of contact resistance and smoothed surface of pentacene layer. This work may provide an effective approach to improve the performance of the pentacene based OTFTs by inserting a Mn-doped TiO₂ layer.     

Intrinsic difference in Schottky barrier effect for device configuration of organic thin-film transistors

Schottky barrier effect for n-channel organic thin-film transistors (OTFTs) with bottom-gate, top-contact (TC) and bottom-gate, bottom-contact (BC) configuration was examined by using device simulation with a thin-film organic transistor advanced simulator (TOTAS). A thermionic field emission (TFE) model which addresses tunneling of thermally excited electrons was applied as a carrier injection model of OTFTs. Simulation results reveal that the BC configuration is affected by Schottky barrier more severely than the TC configuration under the same condition for device parameters, and that this discrepancy in device characteristics can be completely alleviated by contact-area-limited doping, where highly-doped semiconducting layers are prepared in the neighborhood of contact electrodes. Moreover, the existence of an intrinsic Schottky barrier is indicated even though an ohmic-contact condition is assumed, which becomes more prominent for lower bulk carrier concentration in organic semiconductor. This work suggests the availability of the TFE model for simulating realistic OTFT devices with Schottky contacts. From the simulation results, intrinsic differences in device performance for the TC and BC configurations are discussed.