Structural and interfacial properties of high-k HfOxNy gate dielectric films

The thermal stability and interfacial characteristics for hafnium oxynitride (HfO_xN_y) gate dielectrics formed on Si (1 0 0) by plasma oxidation of sputtered HfN films have been investigated. X-ray diffraction results show that the crystallization temperature of nitrogen-incorporated HfO₂ films increases compared to HfO₂ films. Analyses by X-ray photoelectron spectroscopy confirm the nitrogen incorporation in the as-deposited sample and nitrogen substitution by oxygen in the annealed species. Results of FTIR characterization indicate that the growth of the interfacial SiO₂ layer is suppressed in HfO_xN_y films compared to HfO₂ films annealed in N₂ ambient. The growth mechanism of the interfacial layer is discussed in detail.     

Atomic-layer-deposited Al2O3 and HfO2 on GaN: A comparative study on interfaces and electrical characteristics

Al₂O₃, HfO₂, and composite HfO₂/Al₂O₃ films were deposited on n-type GaN using atomic layer deposition (ALD). The interfacial layer of GaON and HfON was observed between HfO₂ and GaN, whereas the absence of an interfacial layer at Al₂O₃/GaN was confirmed using X-ray photoelectron spectroscopy and transmission electron microscopy. The dielectric constants of Al₂O₃, HfO₂, and composite HfO₂/Al₂O₃ calculated from the C-V measurement are 9, 16.5, and 13.8, respectively. The Al₂O₃ employed as a template in the composite structure has suppressed the interfacial layer formation during the subsequent ALD-HfO₂ and effectively reduced the gate leakage current. While the dielectric constant of the composite HfO₂/Al₂O₃ film is lower than that of HfO₂, the composite structure provides sharp oxide/GaN interface without interfacial layer, leading to better electrical properties.     

Effect of fluorinated silicate glass passivation layer on electrical characteristics and dielectric reliabilities for the HfO2/SiON gate stacked nMOSFET

The superior characteristics of the fluorinated hafnium oxide/oxynitride (HfO₂/SiON) gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass (FSG) passivation layer to form fluorinated HfO₂/SiON dielectric. Fluorine incorporation has been proven to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO₂/SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectrics applications.     

在metal/high-k 栅叠层中插入Ti/TiN金属层实现远距离吸氧技术

High permittivity materials have been required to replace traditional SiO₂ as the gate dielectric to extend Moore’s law.However,growth of a thin SiO₂-like interfacial layer（IL） is almost unavoidable during the deposition or subsequent high temperature annealing.This limits the scaling benefits of incorporating high-k dielectrics into transistors.In this work,a promising approach,in which an O-scavenging metal layer and a barrier layer preventing scavenged metal diffusing into the high-k gate dielectric are used to engineer the thickness of the IL,is reported. Using a Ti scavenging layer and TiN barrier layer on a HfO₂ dielectric,the effective removal of the IL and almost no Ti diffusing into the HfO₂ have been confirmed by high resolution transmission electron microscopy and X-ray photoelectron spectroscopy.     

Fabrication and electrical characteristics of ultrathin (HfO2)x(SiO2)1−x films by surface sol-gel method and reaction-anneal treatment

Hafnium oxide (HfO₂) films were deposited on Si substrates with a pre-grown oxide layer using hafnium chloride (HfCl₄) source by surface sol-gel process, then ultrathin (HfO₂)_x(SiO₂)_1−x films were fabricated due to the reaction of SiO₂ layer with HfO₂ under the appropriate reaction-anneal treatment. The observation of high-resolution transmission electron microscopy indicates that the ultrathin films show amorphous nature. X-ray photoelectron spectroscopy analyses reveal that surface sol-gel derived ultrathin films are Hf-Si-O alloy instead of HfO₂ and pre-grown SiO₂ layer, and the composition was Hf_0.52Si_0.48O₂ under 500 °C reaction-anneal. The lowest equivalent oxide thickness (EOT) value of 0.9 nm of film annealed at 500 °C has been obtained with small flatband voltage of −0.31 V. The experimental results indicate that a simple and feasible solution route to fabricate (HfO₂)_x(SiO₂)_1−x composite films has been developed by means of combination of surface sol-gel and reaction-anneal treatment.     

通过多次淀积多次退火与Ti吸氧技术相结合来改善后栅工艺中高k金属栅的性能

本文的原子层淀积（ALD） HfO2薄膜采用新颖的多次淀积多次退火（MDMA）技术进行制备,并在有Ti吸氧层和没有Ti吸氧层两种情况下分别进行性能研究。 与传统的一次淀积一次退火相比,采用多次淀积多次退火后的器件漏电明显减小,同时,等效氧化层厚度（EOT）也被Ti吸氧层有效控制。器件性能的提升与淀积和退火次数密切相关（在保持总介质层厚度相同的情况下）。透射电子显微镜（TEM）和能量色散X射线光谱（EDX）分析表明,氧同时注入高k（HK）薄膜和中间层（IL）很可能是导致器件性能提升的主要原因。因此在后栅工艺中MDMA技术是一种改善栅极特性的有效方法。     

Integration of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics for MOS device applications

Interaction of Hf_xTa_yN metal gate with SiO₂ and HfO_xN_y gate dielectrics has been extensively studied. Metal-oxide-semiconductor (MOS) device formed with SiO₂ gate dielectric and Hf_xTa_yN metal gate shows satisfactory thermal stability. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS) analysis results show that the diffusion depths of Hf and Ta are less significant in SiO₂ gate dielectric than that in HfO_xN_y. Compared to HfO_xN_y gate dielectric, SiO₂ shows better electrical properties, such as leakage current, hysteresis, interface trap density and stress-induced flat-band voltage shift. With an increase in post metallization annealing (PMA) temperature, the electrical characteristics of the MOS device with SiO₂ gate dielectric remain almost unchanged, indicating its superior thermal and electrical stability.     

Structural and electrical properties of Er-doped HfO2 and of its interface with Ge (0 0 1)

Er-doped HfO₂ thin films with Er content ranging from 0% to 15% are deposited by atomic layer deposition on native oxide free Ge(001). The crystallographic phase is investigated by X-ray diffraction and is found to depend on the Er%. The cubic fluorite structure develops on Ge for Er% as low as 4% and is stable after annealing at 400 °C in N₂. Microstrain increases with increasing the Er content within the fluorite structure. Time of flight secondary ion mass and electron energy loss spectroscopy evidence a Ge diffusion from the substrate that results in the formation of a Ge-rich interfacial region which does not present a structural discontinuity with the oxide. The diffusion of Ge is enhanced by the annealing and causes a reordering of the crystal lattice. In annealed films the interface defect density measured by low temperature conductance measurements is found to decrease with decreasing the Er content.     

The properties of high-k gate dielectric films deposited on HRSOI

In this paper, HfO₂ dielectric films with blocking layers (BL) of Al₂O₃ were deposited on high resistivity silicon-on-insulator (HRSOI), and the interfacial and electrical properties are reported. High-resolution transmission electron microscopy (HRTEM) indicated that BL could thin the interfacial layer, keep the interface smooth, and retain HfO₂ amorphous after annealing. Energy dispersive X-ray spectroscopy (EDS) and X-ray photoelectron spectroscopy (XPS) confirmed that BL weaken Si diffusion and suppressed the further growth of HfSiO. Electrical measurements indicated that there was no hysteresis was observed in capacitance–voltage curves, and Flatband shift and interface state density is 0.05 V and −1.3 × 10¹² cm⁻², respectively.     

Electrical characterization of high-k gate dielectrics fabricated using plasma oxidation and post-deposition annealing of a Hf/SiO2/Si structure

High permittivity (high-k) gate dielectrics were fabricated using the plasma oxidation of Hf metal/SiO₂/Si followed by the post-deposition annealing (PDA), which induced a solid-phase reaction between HfO_x and SiO₂. The oxidation time and PDA temperature affected the equivalent oxide thickness (EOT) and the leakage current density of the high-k dielectric films. The interfacial structure of the high-k dielectric film/Si was transformed from HfO_x/SiO₂/Si to HfSi_xO_y/Si after the PDA, which led to a reduction in EOT to 1.15 nm due to a decrease in the thickness of SiO₂. These high-k dielectric film structures were investigated by X-ray photoelectron spectroscopy. The leakage current density of high-k dielectric film was approximately four orders of magnitude lower than that of SiO₂.     

Physical and electrical characterization of polysilicon vs. TiN gate electrodes for HfO2 transistors

The effects of pre-deposition substrate treatments and gate electrode materials on the properties and performance of high-k gate dielectric transistors were investigated. The performance of O₃ vs. HF-last/NH₃ pre-deposition treatments followed by either polysilicon (poly-Si) or TiN gate electrodes was systematically studied in devices consisting of HfO₂ gate dielectric produced by atomic layer deposition (ALD). High-angle annular dark field scanning transmission electron microscopy (HAADF-STEM) using X-ray spectra and Electron Energy Loss Spectra (EELS) were used to produce elemental profiles of nitrogen, oxygen, silicon, titanium, and hafnium to provide interfacial chemical information and to convey their changes in concentration across these high-k transistor gate-stacks of 1.0–1.8 nm equivalent oxide thickness (EOT). For the TiN electrode case, EELS spectra illustrate interfacial elemental overlap on a scale comparable to the HfO₂ microroughness. For the poly-Si electrode, an amorphous reaction region exists at the HfO₂/poly-Si interface. Using fast transient single pulse (SP) electrical measurements, electron trapping was found to be greater with poly-Si electrode devices, as compared to TiN. This may be rationalized as a result of a higher density of trap centers induced by the high-k/poly-Si material interactions and may be related to increased physical thickness of the dielectric film, as illustrated by HAADF-STEM images, and may also derive from the approximately 0.5 nm larger EOT associated with polysilicon electrodes on otherwise identical gate stacks.     

Capacitance-voltage analysis of a high-k dielectric on silicon

Device characteristics of TiO₂ gate dielectrics deposited by a sol-gel method and DC sputtering method on a P-type silicon wafer are reported. Metal-oxide-semiconductor capacitors with Al as the top electrode were fabricated to study the electrical properties of TiO₂ films. The films were physically characterized by using X-ray diffraction, a capacitor voltage measurement, scanning electron microscopy, and by spectroscopy ellipsometry. The XRD and DST-TG indicate the presence of an anatase TiO₂ phase in the film. Films deposited at higher temperatures showed better crystallinity. The dielectric constant calculated using the capacitance voltage measurement was found to be 18 and 73 for sputtering and sol-gel samples respectively. The refractive indices of the films were found to be 2.16 for sputtering and 2.42 for sol-gel samples.     

A nanoanalytical investigation of elemental distributions in high-k dielectric gate stacks on silicon

Two high-k gate stacks with the structure Si/SiO₂/HfO₂/TiN/poly-Si are characterised using nanoanalytical electron microscopy. The effect of two key changes to the processing steps during the fabrication of the stacks is investigated. Electron energy-loss spectroscopy is used to show that the TiN layer has a very similar composition whether it is deposited by PVD or ALD. Spectrum imaging in the electron microscope was used to profile the distribution of elements across the layers in the stack. It was found that when the anneal after HfO₂ deposition is carried out in a NH₃ atmosphere instead of an O₂ atmosphere, there is diffusion of N into the SiO₂ and HfO₂ layers. There is also significant intermixing of the layers at the interfaces for both wafers.     

The effect of oxygen in Ru gate electrode on effective work function of Ru/HfO2 stack structure

Effective work function (φ_m,eff) values of Ru gate electrode on SiO₂ and HfO₂ MOS capacitors were carefully examined and discussed from the viewpoint of an effect of oxygen incorporation in Ru gate electrode on φ_m,eff. Annealing at 400 °C in the reduction (3%H₂) and the oxidation (1%O₂) ambient resulted in similar changes in the φ_m,eff of Ru/HfO₂/SiO₂ and Ru/SiO₂ MOS capacitors. Furthermore, the Ru gate MOS capacitor after annealing in the oxidation condition have shown almost the same φ_m,eff value to that of RuO₂ gate MOS capacitors. The oxygen concentration in the Ru/HfO₂ interface after annealing in oxidizing atmosphere is approximately one order of magnitude higher than that after annealing in reducing atmosphere as confirmed by secondary ion mass spectroscopy analysis. Furthermore, the higher oxygen concentration at the Ru/dielectric interface leads to the higher φ_m,eff value, regardless of SiO₂ or HfO₂ dielectrics. This indicates that φ_m,eff of Ru gate MOS capacitor is dominantly determined by the oxygen concentration at the Ru/dielectric layer interface rather than the dipoles originated from the oxygen vacancy in HfO₂.     

Electrical properties of Ru and RuO2 gate electrodes for Si-PMOSFET with ZrO2 and Zr-silicate dielectrics

In this work, we have studied the electrical and thermal stability of Ru and RuO₂ electrodes on ZrO₂ and Zr-silicate dielectrics. Very low resistivity Ru and rutile stoichiometric RuO₂ films, deposited by reactive sputtering, were evaluated as gate electrodes on ultrathin ZrO₂ and Zr-silicate (∼2.7 nm) films for Si-PMOS devices. Thermal and chemical stability of the electrodes were studied at annealing temperatures up to 800°C in N₂ followed by a forming gas anneal. X-ray diffraction (XRD), transmission electron microscopy (TEM), and x-ray photoelectron spectroscopy (XPS) methods were used to study grain structure and interface reactions. Electrical properties were evaluated using MOS capacitors. The role of oxygen in these dielectrics was studied by comparing equivalent oxide thickness (EOT) changes as a function of annealing temperature for capacitors with ZrO₂ and Zr-silicate dielectrics. For capacitors with Ru and RuO₂ gate electrodes on both ZrO₂ and Zr-silicate, excellent stability of EOT was detected. Flatband voltage and gate current as a function of annealing temperature were also studied. These studies indicate that Ru and RuO₂ are promising gate electrodes for P-MOSFETs.     

Low-voltage organic transistors and inverters using HfOx dielectrics

Based on the p-type pentacene and n-type N,N′-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (PTCDI-C13), low-voltage organic field-effect transistors (OFETs) and inverters using hafnium (Hf)-based dielectrics were produced and characterized. All the pristine and cyclic olefin copolymer (COC)-passivated HfO_x gate dielectrics were deposited by the solution-processed sol–gel chemistry, and organic thin films were deposited on the dielectrics by the neutral cluster beam deposition method. In comparison to the pristine HfO_x-based OFETs, the COC-passivated transistors showed better device performance: higher hole and electron mobilities, reduced hysteresis, decreased trap densities, and particularly improved operational stability of n-type transistors. The inverters composed of the optimized p- and n-type OFETs with the asymmetric Au and LiF/Al electrodes using COC-passivated HfO_x dielectrics exhibited high gains and good noise margins under ambient conditions.     

Enhancement in thermal stability of atomic layer deposited HfO2 films by using top Hf metal layer

A thin (∼ 0.5 nm) layer of Hf metal was deposited on an atomic layer deposited (ALD) HfO₂ film by the DC sputtering method. X-ray photoelectron spectroscopy and high-resolution transmission electron microscopy analyses showed that the Hf metal layer transformed into HfO₂ during the post-deposition annealing process. It appears that the HfO₂ layer formed by the oxidation of Hf metal provided the underlying ALD HfO₂ layer with the nucleation sites necessary to decrease the grain-boundary density of the crystallized HfO₂ film. The decrease in the grain-boundary density resulted in a reduction in the Hf-silicate formation and interfacial layer growth during post deposition annealing. This eventually resulted in a smaller increase in the capacitance equivalent thickness (CET) and high-k characteristics in the CET vs. leakage current density curve even after post deposition annealing at 1000 °C.     

Drain current enhancement and negligible current collapse in GaN MOSFETs with atomic-layer-deposited HfO2 as a gate dielectric

Accumulation-type GaN metal-oxide-semiconductor field-effect-transistors (MOSFET’s) with atomic-layer-deposited HfO₂ gate dielectrics have been fabricated; a 4 μm gate-length device with a gate dielectric of 14.8 nm in thickness (an equivalent SiO₂ thickness of 3.8 nm) gave a drain current of 230 mA/mm and a broad maximum transconductance of 31 mS/mm. Owing to a low interfacial density of states (D_it) at the HfO₂/GaN interface, more than two third of the drain currents come from accumulation, in contrast to those of Schottky-gate GaN devices. The device also showed negligible current collapse in a wide range of bias voltages, again due to the low D_it, which effectively passivate the surface states located in the gate-drain access region. Moreover, the device demonstrated a larger forward gate bias of +6 V with a much lower gate leakage current.     

Effect of RuO2 electrode on laser-MBE prepared HfO2 gate dielectrics

In this paper, we report our recent study of the effect of RuO₂ as an alternative top electrode for pMOS devices to overcome the serious problems of polysilicon (poly-Si) gate depletion, high gate resistance and dopant penetration in the trend of down to 50 nm devices and beyond. The conductive oxide RuO₂, prepared by RF sputtering, was investigated as the gate electrode on the Laser MBE (LMBE) fabricated HfO₂ for pMOS devices. Structural, dielectric and electric properties were investigated. RuO₂/HfO₂/n-Si capacitors showed negligible flatband voltage shift (<10 mV), very strong breakdown strength (>10 MV cm⁻¹). Compared to the SiO₂ dielectric with the same EOT value, RuO₂/HfO₂/n-Si capacitors exhibited at least 4 orders of leakage current density reduction. The work function value of the RuO₂ top electrode was calculated to be about 5.0 eV by two methods, and the effective fixed oxide charge density was determined to be 3.3 × 10¹² cm⁻². All the results above indicate that RuO₂ is a promising alternative gate electrode for LMBE grown HfO₂ gate dielectrics.     

Dual layer SrTiO3/HfO2 gate dielectric for aggressively scaled band-edge nMOS devices

We have fabricated TiN/Poly-Si gated MOS devices with SrTiO₃/HfO₂ dual layer gate dielectric. These gate dielectrics show EOT (Equivalent Oxide Thickness) scaling of less than 0.7 nm as well as large V_fb shift in the nMOS direction after conventional gate first process. A sweet spot is observed for 0.5 nm SrTiO₃ where a band-edge effective work-function is obtained with improved EOT, reduced gate leakage and minimal hysteresis increase. But Sr diffuse into the interfacial layer leads to interface degradation. It is shown that proper PDA (post-deposition anneal) can improve interface quality while maintaining thinner EOT.