Synthesis of graphene on SiC substrate via Ni-silicidation reactions

In this work, the features of graphene layers are studied with the aim of preparing the thinnest layers possible. The graphene layers were prepared by the annealing of Ni/SiC structures. The main advantage of this process is a relatively low temperature compared with the method of graphene epitaxial growth on SiC and short annealing times compared with the chemical vapor deposition method. We prepared graphene layers from several Ni/SiC structures in which the Ni layer thickness ranged from 1 to 200 nm. The parameters of the annealing process (temperature, rate of temperature increase, annealing time) were modified during the experiments. The formed graphene layers were analyzed by means of Raman spectroscopy. From the spectra, the basic parameters of graphene, such as the number of carbon layers and crystallinity, were determined. The annealing of the Ni(200 nm)/SiC structure at 1080 °C for 10 s, produced graphene in the form of 3-4 carbon monolayers. The value was verified by X-ray Photoelectron Spectroscopy (XPS). Good agreement was achieved in the results obtained using Raman spectroscopy and XPS.     

Layer-by-layer growth of graphene layers on graphene substrates by chemical vapor deposition

We demonstrate a synthesis of graphene layers on graphene templates prepared by the mechanical exfoliation of graphite crystals using a developed chemical vapor deposition (CVD) apparatus that has a furnace with three temperature zones and can regulate the temperatures separately in each zone. This results in individual control over the decomposition reaction of the carbon feedstock and the growth of graphene layers by activated carbon species. CVD growth using multi-temperature zones provides wider temperature windows appropriate to grow graphene layers. We observed that graphene layers proceed by a layer-by-layer growth mode using an optical microscopy, an atomic force microscopy, and Raman spectroscopy. This result suggests that a graphene growth technique using the CVD apparatus is a potential approach for making graphene sheets with precise control of the layer numbers.     

化学气相沉积法制备大面积石墨烯及其光谱学表征

化学气相沉积（CVD）法是近年来发展起来的制备石墨烯的新方法。该方法产物具有生长面积大、质量高等优点,逐渐成为制备石墨烯的主要方法。用CVD法在常压下通过全面优化实验参量,以镍箔为基底制备了大面积少数层和单层石墨烯,用拉曼光谱,场发射扫描电子显微镜（SEM）和原子力显微镜（AFM）手段表征,通过分析常压下不同温度、不同载气成分比等实验参数,最终获得制备高质量、大面积、少数层石墨烯的最佳参量,用双共振理论解释少数层和单层石墨烯的拉曼光谱中2D峰强度随石墨烯层数变化而变化的原理。CVD法制备的石墨烯具有面积大、低成本、可测量性强、可用于大批量生产的优点,为工业用途石墨烯的制备提供了有效途径。     

Effects of Pb Intercalation on the Structural and Electronic Properties of Epitaxial Graphene on SiC

The effects of Pb intercalation on the structural and electronic properties of epitaxial single‐layer graphene grown on SiC(0001) substrate are investigated using scanning tunneling microscopy (STM), noncontact atomic force microscopy, Kelvin probe force microscopy (KPFM), X‐ray photoelectron spectroscopy, and angle‐resolved photoemission spectroscopy (ARPES) methods. The STM results show the formation of an ordered moiré superstructure pattern induced by Pb atom intercalation underneath the graphene layer. ARPES measurements reveal the presence of two additional linearly dispersing π‐bands, providing evidence for the decoupling of the buffer layer from the underlying SiC substrate. Upon Pb intercalation, the Si 2p core level spectra show a signature for the existence of Pb? Si chemical bonds at the interface region, as manifested in a shift of 1.2 eV of the bulk SiC component toward lower binding energies. The Pb intercalation gives rise to hole‐doping of graphene and results in a shift of the Dirac point energy by about 0.1 eV above the Fermi level, as revealed by the ARPES measurements. The KPFM experiments have shown that decoupling of the graphene layer by Pb intercalation is accompanied by a work function increase. The observed increase in the work function is attributed to the suppression of the electron transfer from the SiC substrate to the graphene layer. The Pb intercalated structure is found to be stable in ambient conditions and at high temperatures up to 1250 °C. These results demonstrate that the construction of a graphene‐capped Pb/SiC system offers a possibility of tuning the graphene electronic properties and exploring intriguing physical properties such as superconductivity and spintronics.     

Vapour-phase graphene epitaxy at low temperatures

We report an epitaxial growth of graphene, including homo- and hetero-epitaxy on graphite and SiC substrates, at a temperature as low as ∼540 °C. This vapour-phase epitaxial growth, carried out in a remote plasma-enhanced chemical vapor deposition (RPECVD) system using methane as the carbon source, can yield large-area high-quality graphene with the desired number of layers over the entire substrate surfaces following an AB-stacking layer-by-layer growth model. We also developed a facile transfer method to transfer a typical continuous one layer epitaxial graphene with second layer graphene islands on top of the first layer with the coverage of the second layer graphene islands being 20% (1.2 layer epitaxial graphene) from a SiC substrate onto SiO₂ and measured the resistivity, carrier density and mobility. Our work provides a new strategy toward the growth of graphene and broadens its prospects of application in future electronics.      

The structure of GaN layers grown on SiC and sapphire by molecular beam epitaxy

A comparative study of the defects at the interfaces and inside the layers was carried out in GaN/AlN epitaxial layers on SiC and sapphire. Whereas surface cleaning of the sapphire substrates is rather standardised now, the SiC substrates cleaning is still to optimise conditions, as the high densities of defects inside the epitaxial layers cannot be explained solely by the 3.54% lattice mismatch. The investigated specimens were grown by molecular beam epitaxy (MBE), either assisted by electron cyclotron resonance or an NH₃ gas source system to provide atomic nitrogen. Assuming that MBE is a growth technique more or less close to equilibrium, the observed defects are interpreted and a growth mechanism, for GaN layers on the stepped (0001) SiC and sapphire surfaces, is proposed.     

Control of thickness uniformity and grain size in graphene films for transparent conductive electrodes

Large-scale and transferable graphene films grown on metal substrates by chemical vapor deposition (CVD) still hold great promise for future nanotechnology. To realize the promise, one of the key issues is to further improve the quality of graphene, e.g., uniform thickness, large grain size, and low defects. Here we grow graphene films on Cu foils by CVD at ambient pressure, and study the graphene nucleation and growth processes under different concentrations of carbon precursor. On the basis of the results, we develop a two-step ambient pressure CVD process to synthesize continuous single-layer graphene films with large grain size (up to hundreds of square micrometers). Scanning electron microscopy and Raman spectroscopy characterizations confirm the film thickness and uniformity. The transferred graphene films on cover glass slips show high electrical conductivity and high optical transmittance that make them suitable as transparent conductive electrodes. The growth mechanism of CVD graphene on Cu is also discussed, and a growth model has been proposed. Our results provide important guidance toward the synthesis of high quality uniform graphene films, and could offer a great driving force for graphene based applications.     

Chlorinated precursor study in low temperature chemical vapor deposition of 4H-SiC

Low temperature (1300 °C) chemical vapor deposition (CVD) of SiC has gained interest in the last years for being less demanding in terms of reaction chamber lifetime, but also for allowing higher p-type dopant incorporation. Chloride-based CVD at low temperatures has been studied using chloromethane with tetrachlorosilane or silane, respectively and with or without controlled HCl addition. In this study we explore the use of methyltrichlorosilane (MTS) at growth temperatures (1300 °C) significantly lower than what is commonly used for homoepitaxial growth of SiC (1600 °C). MTS is a molecule containing all the needed precursor atoms; its effects are compared to the standard CVD chemistry, consisting of silane, ethylene, and HCl.Very different chemistries between the two precursor systems are proposed; in the case of MTS, C/Si ratios higher than 1 were required, however using the standard chemistry ratios lower than 1 were needed to obtain a defect-free epitaxial layer. We also demonstrate the need of using Cl/Si ratios as high as 15 to achieve a growth rate of 13 μm/h for 8° off-axis 4H-SiC epitaxial layers at 1300 °C. Limitations due to the low growth temperature are discussed in light of the experimental evidence on the growth mechanism as determined by the morphology degradation and the limited growth rate. Finally a comparison between the epilayers morphology obtained on 4H-SiC substrates with different off-cuts are presented, confirming the importance of lower C/Si ratios for 4° off-axis material and the inevitable growth of the cubic SiC polytype on on-axis substrates.     

Bottom-gated epitaxial graphene

High-quality epitaxial graphene on silicon carbide (SiC) is today available in wafer size. Similar to exfoliated graphene, its charge carriers are governed by the Dirac-Weyl Hamiltonian and it shows excellent mobilities. For many experiments with graphene, in particular for surface science, a bottom gate is desirable. Commonly, exfoliated graphene flakes are placed on an oxidized silicon wafer that readily provides a bottom gate. However, this cannot be applied to epitaxial graphene as the SiC provides the source material out of which graphene grows. Here, we present a reliable scheme for the fabrication of bottom-gated epitaxial graphene devices, which is based on nitrogen (N) implantation into a SiC wafer and subsequent graphene growth. We demonstrate working devices in a broad temperature range from 6 to 300 K. Two gating regimes can be addressed, which opens a wide engineering space for tailored devices by controlling the doping of the gate structure.     

Raman spectroscopy and imaging of graphene

Graphene has many unique properties that make it an ideal material for fundamental studies as well as for potential applications. Here we review recent results on the Raman spectroscopy and imaging of graphene. We show that Raman spectroscopy and imaging can be used as a quick and unambiguous method to determine the number of graphene layers. The strong Raman signal of single layer graphene compared to graphite is explained by an interference enhancement model. We have also studied the effect of substrates, the top layer deposition, the annealing process, as well as folding (stacking order) on the physical and electronic properties of graphene. Finally, Raman spectroscopy of epitaxial graphene grown on a SiC substrate is presented and strong compressive strain on epitaxial graphene is observed. The results presented here are highly relevant to the application of graphene in nano-electronic devices and help in developing a better understanding of the physical and electronic properties of graphene. This article is published with open access at Springerlink.com     

Microwave conductivity of very thin graphene and metal films

The surface resistance of Ag, Au and A1 thin conducting films deposited on low loss dielectric substrates at microwave frequencies using TE011 mode single post-dielectric resonator (10-13.22 GHz) was measured to calculate their conductivity in relation to layers thickness. This method enabling measurements near metal-insulator percolation transition was also applied for epitaxial graphene deposited on semi-insulating SiC. Moreover, effective microwave conductivity has been determined for intentionally made aluminum island structure where the DC conductivity is equal to zero. Special attention was paid to films thickness measurements which is critical for accuracy of sheet resistance calculation. Conductivity of thin metal layers and very thin graphene was compared.     

Material quality improvements for high voltage 4H-SiC diodes

The influence of thin 4H-SiC buffer layers grown by liquid phase epitaxy (LPE) on structural quality of 4H-SiC low-doped epitaxial layers, grown by chemical vapor deposition (CVD) was investigated in detail. A dramatic defect density reduction in CVD epitaxial layers grown on commercial wafers with buffer LPE layer was detected. P⁺n junctions were formed on these CVD layers by high dose Al ion implantation followed by rapid thermal anneal. It was shown that both the increase of diffusion lengths of minority carriers (Lp) in CVD layers and the forming of p⁺-layers after Al ion implantation and high temperature anneal lead to superior device characteristics.     

Si(111)衬底上多层石墨烯薄膜的外延生长

利用固源分子束外延(SSMBE)技术, 在Si(111)衬底上沉积碳原子外延生长石墨烯薄膜, 通过反射式高能电子衍射(RHEED)、红外吸收谱(FTIR)、拉曼光谱(RAMAN)和X射线吸收精细结构谱(NEXAFS)等手段对不同衬底温度(400、600、700、800℃)生长的薄膜进行结构表征. RAMAN和NEXAFS结果表明: 在800℃下制备的薄膜具有石墨烯的特征, 而 400、600和700℃生长的样品为非晶或多晶碳薄膜. RHEED和FTIR结果表明, 沉积温度在600℃以下时C原子和衬底Si原子没有成键, 而衬底温度提升到700℃以上, 沉积的C原子会先和衬底Si原子反应形成SiC缓冲层, 且在800℃沉积时缓冲层质量较好. 因此在Si衬底上制备石墨烯薄膜需要较高的衬底温度和高质量的SiC缓冲层.     

Thermal Oxidation of Silicon Carbide Substrates

Thermal oxidation was used to remove the subsurface damage of silicon carbide (SiC) surfaces. The anisotrow of oxidation and the composition of oxide layers on Si and C faces were analyzed. Regular pits were observed on the surface after the removal of the oxide layers, which were detrimental to the growth of high quality epitaxial layers. The thickness and composition of the oxide layers were characterized by Rutherford backscat-tering spectrometry (RBS) and X-ray photoelectron spectroscopy (XPS), respectively. Epitaxial growth was performed in a metal organic chemical vapor deposition (MOCVD) system. The substrate surface morphol-ogy after removing the oxide layer and gallium nitride (GaN) epilayer surface were observed by atomic force microscopy (AFM). The results showed that the GaN epilayer grown on the oxidized substrates was superior to that on the unoxidized substrates.     

Toward Mass Production of CVD Graphene Films

Chemical vapor deposition (CVD) is considered to be an efficient method for fabricating large‐area and high‐quality graphene films due to its excellent controllability and scalability. Great efforts have been made to control the growth of graphene to achieve large domain sizes, uniform layers, fast growth, and low synthesis temperatures. Some attempts have been made by both the scientific community and startup companies to mass produce graphene films; however, there is a large difference in the quality of graphene synthesized on a laboratory scale and an industrial scale. Here, recent progress toward the mass production of CVD graphene films is summarized, including the manufacturing process, equipment, and critical process parameters. Moreover, the large‐scale homogeneity of graphene films and fast characterization methods are also discussed, which are crucial for quality control in mass production.     

X-ray diffraction reciprocal space and pole figure characterization of cubic GaN epitaxial layers grown on (0 0 1) GaAs by molecular beam epitaxy

X-ray diffraction reciprocal space maps and pole figures were used to analyse the cubic GaN epitaxial layers grown on (0 0 1) GaAs by r.f. plasma source MBE; the presence of hexagonal phase in cubic GaN layers was detected by high resolution x-ray analysis and the relationships among various crystal axes of cubic and hexagonal phase GaN were analysed with respect to V/III source-supply ratio. As for the growth conditions of the epitaxial layers, the V/III ratio was found to drastically affect the quality of the layers. High-temperature growth under near-stoichiometric conditions was necessary to obtain high quality epitaxial layers. It was found that inclusion of the hexagonal phase in the cubic GaN layers could be less than 0.4%, though previously reported typical c-GaN epitaxial layers included as much as 10–20% hexagonal phase GaN. On the basis of the measurements and analyses of reciprocal space maps and pole figures, it was revealed that the orientation of crystal axes of the hexagonal phase was unique in the present GaN epitaxial layers and they were different from those of previously reported c-GaN epitaxial layers.     

Remote catalyzation for direct formation of graphene layers on oxides

Direct deposition of high-quality graphene layers on insulating substrates such as SiO(2) paves the way toward the development of graphene-based high-speed electronics. Here, we describe a novel growth technique that enables the direct deposition of graphene layers on SiO(2) with crystalline quality potentially comparable to graphene grown on Cu foils using chemical vapor deposition (CVD). Rather than using Cu foils as substrates, our approach uses them to provide subliming Cu atoms in the CVD process. The prime feature of the proposed technique is remote catalyzation using floating Cu and H atoms for the decomposition of hydrocarbons. This allows for the direct graphitization of carbon radicals on oxide surfaces, forming isolated low-defect graphene layers without the need for postgrowth etching or evaporation of the metal catalyst. The defect density of the resulting graphene layers can be significantly reduced by tuning growth parameters such as the gas ratios, Cu surface areas, and substrate-to-Cu distance. Under optimized conditions, graphene layers with nondiscernible Raman D peaks can be obtained when predeposited graphite flakes are used as seeds for extended growth.     

Graphoepitaxy of High‐Quality GaN Layers on Graphene/6H–SiC

The implementation of graphene layers in gallium nitride (GaN) heterostructure growth can solve self‐heating problems in nitride‐based high‐power electronic and light‐emitting optoelectronic devices. In the present study, high‐quality GaN layers are grown on patterned graphene layers and 6H–SiC by metalorganic chemical vapor deposition. A periodic pattern of graphene layers is fabricated on 6H–SiC by using polymethyl methacrylate deposition and electron beam lithography, followed by etching using an Ar/O₂ gas atmosphere. Prior to GaN growth, an AlN buffer layer and an Al_0.2Ga_0.8N transition layer are deposited. The atomic structures of the interfaces between the 6H–SiC and graphene, as well as between the graphene and AlN, are studied using scanning transmission electron microscopy. Phase separation of the Al_0.2Ga_0.8N transition layer into an AlN and GaN superlattice is observed. Above the continuous graphene layers, polycrystalline defective GaN is rapidly overgrown by better quality single‐crystalline GaN from the etched regions. The lateral overgrowth of GaN results in the presence of a low density of dislocations (≈10⁹ cm⁻²) and inversion domains and the formation of a smooth GaN surface.     

Homoepitaxial 6H-SiC thin films by vapor-liquid-solid mechanism

Silicon carbide (SiC) is a IV-IV compound semiconductor with a wide energy band gap. Because of its outstanding properties, SiC can be used in high-power, high-temperature devices with high radiation resistance. In this study, a two-step vapor-liquid-solid (VLS) method was proposed for homoepitaxial growth of high quality 6H-SiC thin films, combining VLS growth and conventional chemical vapor deposition (CVD) processes. VLS growth was used to eliminate the micro-pipes (MPs) in the first step, and the subsequent step based on the CVD process was employed to improve the surface roughness. The morphology and structure of the as-grown thin films were investigated by scanning electron microscopy, X-ray energy dispersive spectroscopy, atomic force microscopy and high-resolution X-ray diffraction, showing that thin films grown by two-step method have good crystalline quality and small surface roughness.     

SiCOI structure fabricated by catalytic chemical vapor deposition

Epitaxial growth of SiC on SOI substrates using a hot-mesh chemical vapor deposition (CVD) technique was investigated. This technique utilizes a catalytic reaction involving hot tungsten wires arranged in a mesh structure. Using this hot-mesh CVD method, SiC epitaxial growth on SOI substrates with a thin top Si layer was realized without formation of voids, which form readily in the thin Si top layer at temperatures above 800 °C. The SiC film grown on an SOI structure exhibited a large gage factor (GF) of − 27, which is approximately the same as that (GF = − 31.8) of a SiC epitaxial film on Si(100) grown at 1360 °C using atmospheric pressure CVD.