An improved GaAs device model for the simulation of analog integrated circuit

This paper describes an improved device model of GaAs MESFETs and heterojunction FETs for the design and analysis of analog integrated circuits. The proposed device model provides a new expression for the current and the capacitance of the device,which gives excellent agreements with experimental data for all regions of device operation. For the expression of the low frequency anomalies of GaAs devices, an improved technique with an equivalent circuit are presented to model the frequency dispersion of the transconductance and the drain conductance of the device, which give a good agreement with the experimental data of both the frequency dispersion and the lag effect of the device. The new device model proposed here clearly provides a superior prediction of the performance of GaAs analog integrated circuit.     

High speed normally-off GaAs MESFET integrated circuit

Normally-off GaAs MESFET integrated circuits with a maximum toggle frequency of 2.4 GHz were fabricated by conventional photolithography. The unfavourable effect of the surface depletion layer due to the large state density at the GaAs surface has been reduced by adopting the recessed gate FET structure.     

Low-temperature buffer GaAs MESFET technology for high-speedintegrated circuit applications

The fabrication of high-performance digital integrated circuits with low-temperature buffer (LTB) GaAs MESFET technology is presented. Individual 0.2-μm-gate-length transistors show a g_m of 600 mS/mm and an extrapolated f_T of 80 GHz. Backgating and light sensitivity are eliminated with the LTB technology. Static source-coupled FET logic frequency dividers exhibit a maximum clock rate of 22 GHz     

An improved analytical AC large-signal model for the GaAs MESFET

An improved analytical AC large-signal model for a MESFET is presented. The model is an upgrading of a previously presented model. The improvement is basically in the expressions for the conduction current. Simulation results are presented and compared to measured data. The calculated gain and power are slightly greater than the measured values. This is expected, since the matching networks have some loss, which is not included in the calculation. The loss in the input matching network can be appreciable due to the large transformation ratio     

Nonlinear lumped circuit model of GaAs MESFET

A nonlinear lumped Circuit model for GaAs MESFET which includes the effect of Gunn-domain formation under the gate, mobility modulation, and diffusion process in the channel boundary is presented. The important design parameters such as Cin,g_{m}, I_{dsat}, and Ft, etc. can be derived from the model. The model not only predicts realistically the nonlinearI-Vcharacteristics, but it also provides a closed form design criterion for avoiding instability due to Gunn oscillation. Moreover, a small-signal Circuit model having the same basic circuit structure as the existing empirical small-signal model in [2], [10], [14] can be derived from this nonlinear model. In addition, a two-segment piecewise-linear dc model is derived. This piecewise-linear model contains only four model parameters which can be determined very easily by measurement. Because of its simplicity, this model can be implemented into any CAD system to simulate complex circuits with significantly less CPU time. The simulation results are in excellent agreement with experimental data, and with results obtained by a much more time-consuming two-dimensional calculation.     

GaAs HBT's for high-speed digital integrated circuit applications

GaAs HBT technology has emerged as one of the most important developments for digital circuits operating at clock frequencies of 100 MHz and higher. High-speed frequency dividers operating as high as 34.8 GHz and VLSI circuits as complex as 32-b CPU's operating at 200-MHz clock rate have been demonstrated. This paper reviews the role of GaAs HBT technologies for high-speed digital IC applications. The requirements for high-speed IC's and the characteristics of various HBT device structures and logic families are discussed. A summary of published results of the ultrahigh-speed circuits and the status of several high-speed VLSI circuits are presented to provide a guide for future developments     

一种改进的频率选择表面等效电路模型

等效电路模型可以快速分析具有平行直线单元的频率选择表面,然而,现有的等效电路模型由于没有考虑介质厚度与相对介电常数的影响,在分析介质加载的频率选择表面时出现偏差。提出了一种方法,即将等效介电常数的概念引入到模型中,等效介电常数为介质厚度和相对介电常数的函数,采用曲线拟合确定该函数。通过仿真验证该模型在分析介质加载频率选择表面时精度较好。     

GaAs MESFET circuit simulation model including negative differential mobility

A simple one-dimensional GaAs MESFET model for circuit simulation is presented which takes into account negative differential mobility. In this model, the drain current is derived from the electric field strength at the source side edge under the gate using a gradual depletion layer approximation. The calculated I/V characteristics agree well with the experimental data for GaAs power MESFETs, which show negative differential resistances. The proposed model can be used in computer aided design of GaAs integrated circuits and amplifiers with the great advantage of a small calculation time compared with that of 2-dimensional analysis.     

GaInP/GaAs HBTs for high-speed integrated circuit applications

The use of GaInP/GaAs heterojunction bipolar transistors (HBTs) for integrated circuit applications is demonstrated. The discrete devices fabricated showed excellent DC characteristics with low V_ce offset voltage and very low temperature sensitivity of the current gain. For a non-self-aligned device with a 3-μm×1.4-μm emitter area, f_T was extrapolated to 45 GHz and f_max was extrapolated to 70 GHz. The measured 1/f noise level was 20 dB better than that of AlGaAs HBTs and comparable to that of low-noise silicon bipolar junction transistors, and the noise bump (Lorentzian component) was not observed. The fabricated gain block circuits showed 8.5 dB gain with a 3-dB bandwidth of 12 GHz, and static frequency dividers (divide by 4) were operable up to 8 GHz     

符号化仿真技术用于提高模拟集成电路设计良率

模拟电路对于工艺偏移的敏感性以及设计良率是模拟电路设计师关心的重要问题.由于数值仿真工具的局限性,至今设计界仍缺乏能有效提高电路可靠性与良率的通用设计辅助工具.提出利用符号化仿真器GRASS(Graph Reduction Analog Symbolic Simulator)快速导出频域设计指标关于电路参数的解析表示,并由此用三维立体图示的方式展示设计指标关于电路参数的依赖敏感度,设计者能够直观的判断如何选择合适的参数组合,以降低工艺偏移可能导致的电路性能恶化,从而提高设计良率.实验表明本文提出的方法可以有效地辅助设计者对于电路参数进行准确判断与选择,是一种值得在实际模拟电路设计中使用的辅助方法.     

GaAs/AlGaAs heterojunction bipolar transistors for integrated circuit applications

Molecular-beam epitaxy (MBE) and ion implantation were used to fabricate GaAs/AlGaAs heterojunction bipolar transistors with buried wide bandgap emitters. Inverted-mode current gains of ∼ 100 were obtained, demonstrating the feasibility of this technology for I²L types of digital integrated circuits.     

An accurate JFET/MESFET model for circuit analysis

An accurate model for junction field-effect transistors (JFETs) and for Schottky barrier field-effect transistors (MESFETs) with micron and submicron dimensions is presented. The following effects are modeled: distributed channel charge, electrostatic drain feedback, drift velocity saturation, channel length modulation, substrate bias effect, subthreshold region effect, short-length and narrow-width effects, drain-source punch-through, variable capacitance effects, and temperature effects. It is primarily physical rather than empirical and only one set of parameters is needed to simulate devices of a particular technology. The model is intended for silicon devices, but the extension to devices in semiconducting III–V compounds and with insulating substrates is straightforward. The model is compared to experimental data.     

GaAs MESFET ICs for gigabit logic applications

This paper gives an overview of the basic concepts used in the design and fabrication of gallium arsenide MESFET integrated circuits intended for gigabit logic applications. The present status of speed-power performances, packing densities, and integration levels is presented on the basis of some MSI and LSI MESFET IC realizations made possible by the principal GaAs logic approaches to date. Finally, the potential field of application and future trends of GaAs IC technology are assessed.     

An equivalent circuit model for uni-traveling-carrier photodiode

In this paper, an equivalent circuit model of uni-traveling-carrier photodiode (UTC-PD) is developed. According to the feature of UTC-PD, hole continuity equation is ignored and only electron continuity equation is introduced, which decreases the complexity of the model. The model is based on a simplified structure and can well express the feature of UTC-PD. Several direct current (DC) and alternating current (AC) analyses are performed to test the model, and the results from the model agree well with that of numerical simulation.     

An MOS transistor model for analog circuit design

This paper presents a physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits. Static and dynamic characteristics of the MOS field-effect transistor are accurately described by single-piece functions of two saturation currents in all regions of operation. Simple expressions for the transconductance-to-current ratio, the drain-to-source saturation voltage, and the cutoff frequency in terms of the inversion level are given. The design of a common-source amplifier illustrates the application of the proposed model     

Heavy doping for improved short-channel operation of GaAs MESFET

A theoretical calculation is performed to investigate the I/V characteristics of GaAs MESFETs. The calculation is based on a simple model that takes into account the dependence of electron mobility on electric field and doping. It is shown that velocity overshoot may be treated by an effective velocity higher than the bulk value.<>     

红外GaAs液晶光阀一维等效电路模型分析

叙述了红外GaAs液晶光阀的工作原理和主要构成,并由此建立了红外GaAs液晶光阀一维等效电路模型,根据此模型着重分析光电导层GaAs的厚度对红外液晶光阀的红外调制动态范围、驱动频率和分辨率的影响,给出了部分相关曲线,得到最佳GaAs厚度范围。根据此模型计算出液晶光阀的结构参数,重新设计了液晶光阀并给出了部分实验结果。     

用于光通信的GaAs集成电路

介绍了用于 1 0 Gb/s光传输系统前端模块的超细栅 Ga As FET器件的制作技术以及制作的数 /模 IC芯片组     

A temperature model for the GaAs MESFET

This paper describes a new two-dimensional method for study of GaAs Schottky-barrier MESFET's. A modified form of the conduction current is used in which transport properties are described in terms of electron temperature rather than electric field. Nonequilibrium velocity effects such as velocity overshoot are included. Results for the one-dimensional GaAs diode and the two-dimensional GaAs MESFET are presented and compared to other studies that utilize the Monte Carlo procedure. Larger values of current cut-off frequency are predicted for submicrometer gate length MESFET's than in previous two-dimensional simulations which utilize the steady-state transport properties.