Reliability studies of barrier layers for Cu/PAE low-k interconnects

Electromigration and electrical breakdown are two of the most important concerns in the reliability of modern electronic devices. The electromigration lifetimes and electrical breakdown field (E_BD) in single damascene copper lines/porous polyarylene ether (PAE) dielectric with different diffusion barrier materials (i.e., amorphous-SiC:H and TaN/Ta) were studied. The results showed a “wafer edge effect” in both groups of samples. The electromigration lifetime of samples taken from the center of the wafer is five to nine times longer of those taken from the wafer edge in the accelerated test. The samples from wafer edge showed a bi-modal failure characteristic. It was also found that electromigration resistance of the structure with new diffusion barrier a-SiC:H/Ta was comparable to that with the conventional TaN/Ta. On the other hand, the electrical testing showed that E_BD of the a-SiC:H/Ta structure is about twice of that with TaN/Ta barrier, indicating a significant improvement of the electrical performance.     

A direct measurement of electromigration induced drift velocity in Cu dual damascene interconnects

A dual damascene structure with an additional 25 nm Ta diffusion barrier embedded into the upper Cu layer was fabricated to measure the drift velocity of electromigration. The embedded diffusion barrier layer successfully confined void growth into a long and regular shape between the SiN layer and embedded Ta layer. Edge depletion was observed to initiate from the cathode end and elongate into a long and regular shape due to the confinement of the intermediate Ta diffusion barrier layer. With this test structure, electromigration induced drift displacement can be accurately measured with a linear dependence on time. Measurement was conducted at a series of temperatures to obtain the Cu/capping interface diffusion controlled activation energy.     

Robust Low Oxygen Content Cu Alloy for Scaled-Down ULSI Interconnects Based on Metallurgical Thermodynamic Principles

A low oxygen content (LOC) CuAl alloy with no barrier metal (Ta) oxidation was obtained using an oxygen absorption process based on metallurgical thermodynamic principles. LOC CuAl dual damascene interconnects (DDIs) were successfully implemented into 45-nm-node LSIs with 140-nm-pitched lines and 70-nm-diameter $(phi)$ vias. An oxygen absorber of very thin Al film, which was deposited on an electrochemically deposited (ECD) Cu film, captured the oxygen atoms in the ECD Cu due to its larger negative change in the standard Gibbs-free energy of oxidation than in the Cu and the barrier (Ta), preventing the Ta barrier from oxidizing during high-temperature annealing. The high-quality Cu/barrier interface in the LOC CuAl DDIs remarkably improved the via reliability against stress-induced voiding and electromigration. No reliability degradation of the 70-nm-$phi$ vias was observed in the 45-nm-node LOC CuAl DDIs, while keeping the scalability from the 65-nm-node generation.      

Polarity Effect in a Sn3Ag0.5Cu/Bismuth Telluride Thermoelectric System

This study investigates electromigration in Bi₂Te₃ thermoelectric (TE) material systems and the effectiveness of the diffusion barrier under current. The Peltier effect on the interfacial reaction was decoupled from the effect of electromigration. After connecting p- and n-type Bi₂Te₃ to Sn3Ag0.5Cu (SAC305) solders, different current densities were applied at varying temperatures. The Bi₂Te₃ samples were fabricated by the spark plasma sintering technique, and an electroless nickel-phosphorous (Ni-P) layer was deposited at the solder/TE interfaces. The experimental results confirm the importance of the Ni diffusion barrier in joint reliability. Intermetallic compound layers (Cu,Ni)₆Sn₅ and NiTe formed at the solder/Ni-P and Ni-P/substrate interfaces, respectively. The experimental results indicate that the mechanism of NiTe and (Cu,Ni)₆Sn₅ compound growth was dominated by the Peltier effect at high current density. When the current density was low, the growth of NiTe was affected by electromigration but the changes of thickness for (Cu,Ni)₆Sn₅ were not obvious.     

Investigation of the influence of thermal treatment on interconnect-barrier interfaces in copper metallization systems

In this paper, we present recent results dealing with the influence of a high temperature anneal on the Cu–Ta interface in copper metallization systems. The electromigration lifetime data show a strong dependency of the electromigration robustness on the temperature budget. A bimodal behavior was observed after annealing the metallization at temperatures of 470 °C and above for more than 10 h. Surprisingly the high temperature anneal produces a late failure mode in electromigration lifetime tests resulting in a 10 times higher MTTF. To understand the influence of temperature pretreatment on electromigration behavior, TEM and SIMS have been performed on untreated samples (as fabricated) and on samples stored at 500 °C for 10 h. The TEM investigation shows no significant change in Cu grain size due to the high temperature. The Tof-SIMS investigations show that Ta diffuses into the Cu interconnect at the high temperature. A diffusion length for Ta of about 150 nm was observed for samples stored at 500 °C for 10 h. This effect has a strong impact on the results of the electromigration tests, done on lines after high temperature anneal.     

Electromigration of Cu/low dielectric constant interconnects

Electromigration in damascene Cu/low dielectric constant interconnects with overlayers of CoWP, Ta/TaN, SiN_x or SiC_xN_yH_z and Cu(Ti) interconnects capped with SiN_x was studied. The results showed that the migration fast path in the bamboo-like lines primarily occurred at the interface. Cu lines fabricated with various forms of TaN/Ta liner including PVD TaN, ALD TaN, and PVD body centered cubic α- or tetragonal β-Ta liners were also investigated. Both thin surface layers of CoWP or Ta/TaN and the addition of Ti in the Cu lines significantly reduced the Cu/cap interface diffusivity and remarkably improved the electromigration lifetime when compared with Cu lines capped with SiN_x or SiC_xN_yH_z. Activation energies for electromigration were found to be 1.9–2.4 eV, 1.4 eV, 0.85–1.1 eV, and 1.3 eV for the bamboo-like Cu lines capped with CoWP, Ta/TaN, and SiN_x or SiC_xN_yH_z, and Cu(Ti) bamboo lines capped with SiN_x, respectively. The structural phase of the Ta was found to have an insignificant effect on the Cu mass flow rate. A large via size, thicker liner and/or stable connected exposed liner can provide a longer lifetime and tighter lifetime distribution, at the expense of chip density or effective Cu line conductivity.     

磷酸和酒石酸在GSI阻挡层CMP抛光液中的应用

在阻挡层的化学机械平坦化(CMP)过程中,Cu与阻挡层去除速率的一致性是保证平坦化的关键问题之一。低k介质材料的引入要求阻挡层在低压力下用弱碱性抛光液进行CMP,这给抛光液对不同材料的选择性提出了新的挑战。研究了低压2 psi,(1 psi=6.89 kPa)CMP条件下,磷酸和酒石酸作为阻挡层抛光液pH调节剂对Cu和Ta的络合作用。实验结果表明,酒石酸对Cu和Ta有一定的络合作用,能够提高它们的去除速率;磷酸能提高Ta的去除速率,而对Cu的去除有抑制作用。最终在加入磷酸浓度为2×10-2mol/L,酒石酸浓度为1×10-2mol/L,H2O2体积分数为0.3%,pH=8.5时,Cu/Ta/SiO2介质的去除速率选择比达到了1∶1∶1,去除速率约为58 nm/min;同时,磷酸和酒石酸的加入能够有效改善Cu的表面状态。     

A DRAM compatible Cu contact using self-aligned Ta-silicide and Ta-barrier

As an alternative to W contacts currently used in MOSFETs for DRAM, Cu contacts using self-aligned Ta-silicide and Ta-based barrier were studied experimentally. The silicidation of PVD Ta layers was studied first on 300 mm blanket Si wafers. The developed method was applied to patterned wafers in the contacts, that land on poly gate and active areas of NMOS, with a sequence including the PVD of Ta, a silicidation annealing, a Ta-based Cu diffusion barrier and a Cu seed for plating the Cu plug. X-ray diffraction (XRD), X-ray reflection (XRR) and sheet resistance tests of the blanket wafers show that a Ta layer of about 10 nm reacts with Si substrate and forms TaSi₂ at 650 °C in a reducing ambient. Cross-sectional SEM observation reveals that the selected processing flow fills the 90 nm contacts. Top-view SEM observation on the samples after 420 °C sintering demonstrates that the Cu diffusion barrier is effective. I_on-I_off curves of the devices show a performance for NMOS comparable to the reference samples which use Ni(Pt)Si and the same barrier and Cu contacts, indicating that the stack of the barrier/TaSi₂/p-type Si has a contact resistance comparable to the barrier/Ni(Pt)Si/p-type Si.     

Curing of polyimide and the effect of the TEOS SiO2 barrier layer on the electromigration of sputtered Cu with polyimide passivation

The curing process of polyimide and the electromigration of copper films with polyimide (PI) passivation are studied. Thermal analysis of polyimide suggests that imidization completes at ∼200°C with an endothermic reaction associated with the breaking of the C-OH and N-H bonds as revealed by Fourier transformation infrared spectroscopy (FTIR). Although there is 89.8% weight loss when PI is heated from 20°C to 200°C, outgassing of PI passivation is still observed at higher temperatures. Carbon, nitrogen, and oxygen atoms diffuse into Cu during thermal processing of PI/Cu films. The tetraethyl orthosilicate (TEOS) SiO₂ films are used as the barrier layer between PI and Cu to retard the poisoning of Cu. The effect of TEOS SiO₂ film on electromigration of Cu is investigated.     

Effects of barrier layer and processing conditions on thin film Cu microstructure

The crystallographic texture and grain size of sputtered Cu films were characterized as a function of deposition temperature, barrier layer material, and vacuum conditions. For Cu deposited in a HV chamber, (111) Cu texture was found to weaken with increasing deposition temperatures on W, amorphous C and Ta barrier layers, each deposited at 30°C. Conversely, under identical Cu deposition conditions, texture was found to strengthen with increasing deposition temperature on Ta deposited at 100°C. Median Cu grain size varied parabolically with deposition temperature on all barrier layers and was slightly higher on the 100°C Ta at a given Cu deposition temperature, relative to the other underlayers. For depositions in an UHV chamber, Cu texture was found to strengthen with increasing Cu deposition temperature, independent of Ta deposition temperature. Median Cu grain size, however, was still higher on 100°C Ta than on 30°C Ta. The observed differences between the two different chambers suggest that the trend of weak texture at elevated deposition temperatures may be related to contamination. Characterization of the Ta underlayers revealed that the strengthened texture of Cu films deposited on 100°C Ta is likely related to textural inheritance.     

Reliability of multistacked tantalum-based structure as the barrier film in ultralarge-scale integrated metallization

Diffusion barrier properties of Ta films with and without plasma treatments have been investigated in the study. The nitrogen-incorporated Ta films were prepared by NH₃ plasma treatment or reactive sputtering. Barrier properties were evaluated by sheet resistance, X-ray diffraction, transmission electron microscopy, X-ray photoelectron spectroscopy and reverse-biased junction leakage current. An amorphous-like TaN_x layer was formed on Ta barrier film after plasma treatments. The thickness of the amorphous TaN_x layer is about 3 nm and NH₃ plasma-treated Ta films (TaN_x/Ta) possess lower resistivity and smaller grain sizes. The Cu/TaN_x/Ta(10 nm)/Si remained stable after annealing at 750 °C for 1 h. NH₃ plasma-treated Ta films (TaN_x/Ta) possess better thermal stability than Ta and TaN films. It is attributed to the formation of a new amorphous layer on the surface of Ta film after the plasma treatments. For thermal stability of Cu/Ta(-N)/n⁺-p diodes, Cu/Ta/n⁺-p and Cu/TaN/n⁺-p junction diodes resulted in large reverse-bias junction leakage current after annealing at 500 and 525 °C, respectively. On the other hand, TaN_x/Ta diffusion barriers will improve the integrity of Cu/Ta(-N)/n⁺-p junction diodes to 650 °C.     

Barrier and seed repair performance of thin RuTa films for Cu interconnects

Thin (<4 nm) Physical Vapor Deposited (PVD) Ru-10 at.% Ta films were evaluated as diffusion barriers and seed enhancement layers for Cu metallization in sub 25 nm trenches. The ratio of Ru/Ta on blanket wafers could be influenced by changing the process conditions. However, a difference in Ru/Ta ratio did not influence the thermal stability of the layers during High Temperature X-ray Diffraction (HT-XRD) measurements as all RuTa films exhibited good thermal properties since no Cu-silicide formation was observed for temperatures below 500 °C. The RuTa films also passed an 85 °C/85% relative humidity (RH) test of one week of storage in order to test the H₂O barrier integrity of the films. Furthermore no difference was found when testing the O₂ barrier integrity during 300 s anneals at various temperatures between 250 °C and 500 °C. Good Cu fill of 20 nm trenches (AR 4:1) patterned in oxide was achieved when combining the RuTa films with PVD Cu seed layers with thicknesses ranging from 7 to 20 nm and Cu plating. When compared to a Ta(N)/Ta barrier, relatively high electrical yields (60-80%) were obtained for structures with CDs <30 nm when combining RuTa films with PVD Cu seed layers as thin as 7 nm (on field), hence evidencing the seed enhancement ability of these layers.     

Cu互连及其关键工艺技术研究现状

低介电常数材料和低电阻率金属的使用可以有效地降低互连线引起的延时.Cu因其具有比Al及Al合金更低的电阻率和更高的抗电迁移能力而成为新一代互连材料.论述了Cu互连技术的工艺过程及其研究发展现状.对Cu互连技术中的阻挡层材料、电化学镀Cu技术以及化学机械抛光技术等一系列关键工艺技术进行系统的分析和讨论.     

Enhancing the reliability of n-p junction diodes using plasma treated tantalum barrier film

The properties of Ta barrier films treated with various plasma nitridations have been investigated by Cu/barrier/Si. An amorphous layer is formed on Ta barrier film after plasma treatments. The thickness of the amorphous layer is about 3 nm. Plasma treated Ta films possess better barrier performance than sputtered Ta and TaN films. It is attributed to the formation of a new amorphous layer on Ta surface after the plasma treatment. Cu/Ta(N,H)/Ta (10 nm)/Si remained stable after annealing at 750 °C. Ta(N,H)/Ta possesses the best thermal stability and excellent electrical properties. Cu/Ta/n⁺-p and Cu/Ta(N,O)/Ta/n⁺-p diodes resulted in large reverse-bias junction leakage current after annealing at 500 °C and 600 °C, respectively. On the other hand, Ta(N,H)/Ta and Ta(N)/Ta diffusion barriers improve the thermal stability of junction diodes to 650 °C. Ta(N,H)/Ta barrier film possesses lowest resistivity among Ta, Ta(N,O)/Ta, and Ta(N)/Ta films. Hydrogen plays an important role in enhancement of barrier properties. It is believed that hydrogen not only induces amorphization on Ta, but also eliminates the oxygen in the film. It is believed that the enhancement of ability against the copper diffusion is due to the combined effects of the hydrogen reaction and nitridation.     

Influence of diffusion barriers on the nucleation and growth of CVD Cu for interconnect applications

Nucleation and growth behavior of Cu influence strongly the macroscopic properties of the resultant films. In this work the nucleation of CVD Cu on different underlayer materials is studied. It is found that nucleation on bare diffusion barrier surfaces leads to island growth and, therefore, bad wetting and adhesion. An enrichment of F, O and carbon was found at the interface between the CVD Cu film and the diffusion barrier. However CVD Cu deposited on top of Ta with a 200-Å PVD Cu layer on top results in good wetting. CVD Cu films grown on a PVD Cu layer expose a highly preferred 111 orientation. In this case SIMS analysis reveals a comparably low concentration of oxygen, carbon and flourine at the interface region between the CVD Cu and the barrier. These observations shed light on relevance of surface conditions for the CVD Cu deposition process. They significantly affect both film adhesion and crystal orientation, which are crucial for the use of CVD Cu as interconnect material.     

Impact of barrier deposition process on electrical and reliability performance of Cu/CVD low k SiOCH metallization

Integration of Cu with low k dielectrics provided solution to reduce both resistance-capacitance time delay and parasitic capacitance of BEOL interconnections for 130 nm and beyond technology node. The motivation of this work is to study and improve electrical and reliability performance of two-level Cu/CVD low k SiOCH metallization from the results of diffusion barrier deposition schemes. Barrier deposition schemes are (a) high-density-plasma 250 Å Ta; (b) surface treatment of forming gas followed by high-density-plasma 250 Å Ta and (c) bi-layer of 100 Å Ta(N)/150 Å Ta. In this work, we demonstrated the superior and competency of high-density-plasma Ta deposition for Cu/CVD low k metallization and achieved excellent electrical and reliability results. Wafers fabricated with high-density-plasma Ta barrier scheme resulted in the best electrical yields, >90% for testing vehicles of dense via chains (via size=200 nm) and interspersed comb structures (width/space=200 nm/200 nm). Dielectric breakdown strength of the interspersed comb structures obtained at electric field of 0.3 MV/cm was ∼4 MV/cm.     

TaCN growth with PDMAT and H2/Ar plasma by plasma enhanced atomic layer deposition

TaCN films were deposited using atomic layer deposition (ALD) using PDMAT and H₂/Ar plasma. Calculations based on density functional theory (DFT) indicate a high energy barrier and a low reaction energy for reducing the +5 Ta oxidation state in the PDMAT precursor by using pure H radicals. Through the assistance of Ar radicals, low resistivity of TaCN films of 230 μΩ cm could be deposited by using H₂/Ar plasma. By employing in situ X-ray diffraction during annealing, the activation energy for Cu diffusion through the TaCN barrier was evaluated at 1.6 eV.     

Effect of Intermetallic on Electromigration and Atomic Diffusion in Cu/SnAg3.0Cu0.5/Cu Joints: Experimental and First-Principles Study

Electromigration phenomena in a one-dimensional Cu/SnAg_3.0Cu_0.5/Cu joint were investigated with current stressing. The special effect of intermetallic compound (IMC) layers on the formation of serious electromigration damage induced by nonuniform current density distribution was discussed based on experimental results. Meanwhile, hillocks were observed both at the anode and near the cathode of the joint, and they were described as the result of diffusion of atoms and compressive stress released along grain boundaries to the relatively free surface. Moreover, the diffusion behavior of Cu at the cathode was analyzed with the electromigration equation, and the stability of Ag atoms in the solder during electromigration was evaluated with a first-principles method.     

Effects of Ti addition on via reliability in Cu dual damascene interconnects

We investigated the effects of a Ti addition on the reliability and the electrical performance of Cu interconnects, comparing three different ways of Ti addition such as A) Ti layer insertion under Ta-TaN stacked barrier metal, B) Ti layer insertion between a Ta-TaN barrier and Cu, and C) the Ti doping from the surface of the electrochemical-plated (ECP) Cu film. The structure-A drastically suppresses the stress-induced voiding (SIV) under the via connected to a wide lower line due to adhesion improvement by Ti at the via-bottom, while the electromigration (EM) is not improved. In the structure-B, by contrast, the EM is improved but the SIV resistance is degraded. The Ti doping from the bottom surface of Cu film restricts the grain growth and increases the tensile stress, enhancing the SIV. The structure-C improves not only the SIV but also the EM resistance. The oxygen gettering effect of Ti during the ECP-Cu annealing is a reason for the reliability improvements of the SIV and the EM. The improvement of adhesiveness at the interface between the via and the lower Cu line, and the oxygen gettering from Cu by Ti play an important role in suppressing the SIV and the EM.     

Cu contact on NiSi substrate with a Ta/TaN barrier stack

The thermal and electrical stabilities of Cu contact on NiSi substrate with and without a Ta/TaN barrier stack in between were investigated. Four-point probe (FPP), X-ray diffraction (XRD), scanning electron microscopy (SEM), depth-profiling X-ray photoelectron spectroscopy (XPS), and Schottky barrier height (SBH) measurement were carried out to characterize the diffusion barrier properties. The SBH measurement provides a very sensitive method to characterize the diffusion barrier properties for the copper contact on NiSi/Si. The results show that the Ta/TaN stack can be both thermally and electrically stable after annealing at 450 °C for 30 min and it will have a potential application as a diffusion barrier for Cu contact on NiSi.