Device characteristics of the GaAs/InGaAsN/GaAs p-n-p doubleheterojunction bipolar transistor

We have demonstrated the dc and rf characteristics of a novel p-n-p GaAs/InGaAsN/GaAs double heterojunction bipolar transistor. This device has near ideal current-voltage (I-V) characteristics with a current gain greater than 45. The smaller bandgap energy of the InGaAsN base has led to a device turn-on voltage that is 0.27 V lower than in a comparable p-n-p AlGaAs/GaAs heterojunction bipolar transistor. This device has shown f_T and f_MAX values of 12 GHz. In addition, the aluminum-free emitter structure eliminates issues typically associated with AlGaAs     

Comparison of GaN p-i-n and Schottky rectifier performance

The performance of GaN p-i-n and Schottky rectifiers fabricated on the same wafer was investigated as a function of device size and operating temperature. There was a significant difference in reverse breakdown voltage (490 V for p-i-n diodes; 347 V for the Schottky diodes) and forward turn-on voltage (~5 V for the p-i-n diodes; ~3.5 V for the Schottky diodes). Both types of device showed a negative temperature coefficient for reverse breakdown, with value -0.34±0.05 V·K^-1     

A CMOS compatible lateral emitter switched thyristor with enhancedturn-on capability

A new Lateral Emitter Switched Thyristor structure (LEST) is proposed and experimentally verified. The structure differs from the conventional LEST in that it embeds a floating ohmic contact between the n^- drift region and the n⁺ floating emitter. Both simulation and experimental results show that the device has an enhanced turn-on capability compared with the conventional LEST without deteriorating its other characteristics. The device is fabricated using a 3 μm CMOS process to have a 320 V breakdown voltage and a 0.7 V threshold voltage. Thyristor turn-on is observed at an anode voltage below 2 V. The maximum MOS controllable current density is in excess of 200 A/cm² with 5 V gate voltage     

A 30 V Self-Aligned Metal/Poly-Si Replacement Gate Planar DMOS for DC/DC Converters

In this letter, a novel self-aligned metal/poly-Si gate planar double-diffused MOS (DMOS) is proposed and demonstrated for high-switching-speed and high-efficiency dc/dc converter applications. The self-aligned metal/poly-Si gate is realized by a replacement gate technology. The fabricated metal/poly-Si gate planar DMOS has a breakdown voltage of 36 V and a threshold voltage of 2.1 V. The gate sheet resistance of the metal/poly-Si gate is around 0.2 Omega/square, which is 50 times lower than that of the polysilicon gate. The low sheet resistance reduces the switching time as well as the power loss of the device during switching. For a device with a drain current of 69 A/cm², the turn-on and turn-off times are reduced from 29 to 25 ns and from 36 to 31 ns, respectively. The turn-on and turn-off switching energy losses are reduced by 22% and 15%, respectively     

Influences of /spl delta/-doping position on the characteristics of SiGe-Si DCFETs

SiGe-Si doped channel field-effect-transistors with different positions of /spl delta/ layers in SiGe wells have been proposed and fabricated. High forward gate to drain turn-on voltage (>0.87 V) and reverse breakdown voltage up to 25 V was obtained for center and bottom /spl delta/-doped channel devices. For device structures with the same 1/spl times/100 /spl mu/m/sup 2/ gate, center /spl delta/-doped channel device display the best dc maximum extrinsic transconductance of 22.1 mS/mm. Compared with conventional Si-SiGe MODFETs, center /spl delta/-doped channel device exhibits improved gate voltage swings as wide as 3 V due to the better carrier confinement and the absence of parallel conduction, which is promising to provide an additional degree of freedom for Si-based device applications.     

Enhancement-mode power heterojunction FET utilizingAl0.5Ga0.5As barrier layer with negligibleoperation gate current for digital cellular phones

We have developed a novel enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET (HJFET) with a 5 nm thick Al_0.5Ga_0.5As barrier layer inserted between an In _0.2Ga_0.8As channel layer and an upper Al_0.2 Ga_0.8As electron supply layer. The Al_0.5Ga _0.5As barrier layer reduces gate current under high forward gate bias voltage, resulting in a high forward gate turn-on voltage (V _F) of 0.87 V, which is 170 mV higher than that of an HJFET without the barrier layer. Suppression of gate current assisted by a parallel conduction path in the upper electron supply layer was found to be also important for achieving the high V_F. The developed device exhibited a high maximum drain current of 300 mA/mm with a threshold voltage of 0.17 V. A 950 MHz PDC power performance was evaluated under single 3.5 V operation. An HJFET with a 0.5 μm long gate exhibited 0.92 W output power and 63.6% power-added efficiency with 0.08 mA gate current (I_g) at -48 dBc adjacent channel leakage power at 50 kHz off-center frequency. This I_g is one-thirteenth to that of the HJFET without the barrier layer. These results indicate that the developed enhancement-mode HJFET is suitable for single low voltage operation power applications     

High breakdown voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode pHEMT with field-plate technology

A high breakdown voltage and a high turn-on voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode (E-mode) pseudomorphic HEMT (pHEMTs) with field-plate (FP) process is reported for the first time. Between gate and drain terminal, the transistor has a FP metal of 1 /spl mu/m, which is connected to a source terminal. The fabricated 0.5/spl times/150 /spl mu/m/sup 2/ device can be operated with gate voltage up to 1.6 V owing to its high Schottky turn-on voltage (V/sub ON/=0.85 V), which corresponds to a high drain-to-source current (I/sub ds/) of 420 mA/mm when drain-to-source voltage (V/sub ds/) is 3.5 V. By adopting the FP technology and large barrier height (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P layer design, the device achieved a high breakdown voltage of -47 V. The measured maximum transconductance, current gain cutoff frequency and maximum oscillation frequency are 370 mS/mm, 22 GHz , and 85 GHz, respectively. Under 5.2-GHz operation, a 15.2 dBm (220 mW/mm) and a 17.8 dBm (405 mW/mm) saturated output power can be achieved when drain voltage are 3.5 and 20 V. These characteristics demonstrate that the field-plated (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P E-mode pHEMTs have great potential for microwave power device applications.     

A self-aligned enhancement-mode AlGaAs/InP MISFET

An enhancement-mode insulated-gate field-effect transistor (FET) has been fabricated by a self-aligned technique on semi-insulating InP substrate with an AlGaAs gate barrier grown by molecular beam epitaxy (MBE). A device with a gate length of 1 µm exhibited a transconductance of 134 mS/mm and a threshold voltage of 0.9 V. The characteristics are insensitive to light down to 77 K and hysteresis is completely absent. The performance of this device shows that the fabrication of enhancement-mode devices on severely lattice-mismatched heterostructures is feasible.     

Design of enhanced Schottky-barrier AlGaAs/GaAs MODFET's using highly doped p+surface layers

The design and performance of enhanced Schottky-barrier height modulation-doped AlGaAs/GaAs field-effect transistors (ESMODFET's) is discussed. Results are presented showing that the addition of a thin highly doped p⁺layer under the gate can increase the forward biased gate turn-on voltage from 0.8 V (conventional MODFET) to as high as 1.6 V. A mathematical model is presented that predicts the thickness and doping of the heterostructure layers required to obtain a given threshold voltage and effective Schottky-barrier height. It is predicted that this enhanced Schottky barrier will allow increased gate-voltage swings and thus significantly improve the noise margin of enhancement-mode MODFET circuits.     

Gate capacitance—Voltage characteristic of MODFET's: Its effect on transconductance

Gate capacitance Cgin modulation-doped field-effect transistors (MODFET's) is one of the most important parameters for small- and large-signal applications as well as for understanding device operation at dc and high frequencies. We have modeled the gate capacitance-voltage characteristics of AlGaAs/GaAs MODFET's and obtained good agreement with experiments at 300 and 77 K. Rigorous numerical simulations relating the Fermi level at the GaAs/AlGaAs heterointerface to the two-dimensional electron gas (2DEG) concentrations were fitted with analytical functions to simplify the model. The fit is quite reasonable with an accuracy of 1 percent in a wide range of sheet carrier concentrations. By incorporating AlGaAs charge response to gate voltage near full turn-on, discrepancies between the experiments and earlier models (predicting a nearly constant capacitance-voltage characteristic) were minimized. The model also shows that theC_{g}(V)characteristic below threshold is governed by the doping level in the buffer layer, in the intermediate region by the 2DEG and near complete turn-on by the 2DEG and the AlGaAs layer. Considering the contribution of the AlGaAs layer, a detailed RC network was developed. The model also explains the rise in capacitance and fall in the transconductance for large forward gate voltages (low frequency) due basically to the contribution of AlGaAs to the gate capacitance but almost no contribution to the current conduction. In contrast, the transconductance and capacitance both increase in MESFET's.     

Organic–Inorganic Hybrid Optical Upconverter

We report a hybrid organic-inorganic optical upconverter that converts input 1.5-mum infrared light to output visible light. The device was made by direct tandem integration of an inorganic InGaAs/InP photodetector with an organic light-emitting diode (OLED). Incoming 1.5-mum light optical radiation is absorbed by the semiconductor p-i-n detector. The resultant photocurrent drives the OLED to emit visible light at ~520 nm in wavelength. The ratio of the photocurrent-induced versus dark-current-induced visible light emission was measured to be over 100 at a device bias of 14 V at room temperature. Devices with different configurations of the hole transport layer (HTL) were fabricated and tested. It was found that the devices with an HTL of C60/CuPc/NPB exhibited a lowest turn-on voltage (~3.8 V). The results show that the interfacial structure at the inorganic-organic interface plays a vital role in enabling the integration of the hybrid organic-inorganic devices.     

GaAs/AlGaAs directional coupler switch with submillimetre device length

A GaAs/AlGaAs directional coupler switch, for the first time with a device length shorter than 1 mm, has been fabricated by utilising the good controllability of molecular beam epitaxy and reactive ion beam etching. The switching voltage is as low as 5V. The extinction ratio is 17dB for a crossover state and 14dB for a straight-through state.     

衬底剥离的量子阱红外探测器研究

对用MBE生长的GaAs/A lGaAs量子阱材料进行了衬底剥离,在此基础上制备了单元器件并测量了器件的黑体响应率以及光电流响应.实验解决了衬底剥离及器件制备中的工艺问题,研究了衬底剥离对材料及器件性能的影响以及用这种方法制备器件的可行性.结果表明选择腐蚀法是一种有效的衬底剥离方法,用这种方法得到的多量子阱薄膜材料仍具有较好的红外探测性能,为进一步实验提供了依据.     

Investigation of AlGaAs/GaAs superlattice-emitter resonanttunneling bipolar transistor (SE-RTBT)

A bipolar transistor with an i-Al_0.5Ga_0.5As/n⁺-GaAs superlattice emitter as both hole reflection barriers and electron tunneling barriers has been fabricated successfully. The AlGaAs/GaAs potential spike is eliminated by moving the heterointerface away from the emitter-base junction. Both the turn-on voltage of emitter-base and base-collector junctions are almost identical for the same current level. The room-temperature common-emitter current gain is over 60, and a collector-emitter offset voltage of 55 mV has been obtained with a base-to-emitter doping ratio of 10. Multiple differential negative resistance phenomena and different transistor operating regimes have been observed due to the tunneling effects in the AlGaAs/GaAs superlattice at 77 K. Calculated results are in agreement with experimental ones. Because of the existence of high peak-to-valley current ratios as well as current gain over 65, the SE-RTBT is suitable for multivalued logic circuit applications with relatively reduced complexity     

双发光层白光有机电致发光器件的研究

将DCJTB掺杂入Alq3中,作为黄光发光层,制作了一种基于新型蓝光材料PAA的白光有机电致发光器件(OLED).器件的结构为ITO/NPB/PAA/Alq3:DCJTB/Alq3/Mg:Ag,通过PAA层的蓝光与Alq3:DCJTB层的黄光混合实现了很好的白光发射.结果表明,器件在4.6V时启亮,在5.2V时达到最大...     

Metamorphic In0.4Al0.6As/In0.4Ga0.6As HEMTs on GaAs substrate

New In_0.4Al_0.6As/In_0.4Ga_0.6 As metamorphic (MM) high electron mobility transistors (HEMTs) have been successfully fabricated on GaAs substrate with T-shaped gate lengths varying from 0.1 to 0.25 μm. The Schottky characteristics are a forward turn-on voltage of 0.7 V and a gate breakdown voltage of -10.5 V. These new MM-HEMTs exhibit typical drain currents of 600 mA/mm and extrinsic transconductance superior to 720 mS/mm. An extrinsic current cutoff frequency f_T of 195 GHz is achieved with the 0.1-μm gate length device. These results are the first reported for In_0.4 Al_0.6As/In_0.4Ga_0.6As MM-HEMTs on GaAs substrate     

Bias stress reliability of Be-, Zn- and C-doped base microwave HBTs

In this paper the effect of C-, Be- and Zn-doped GaAs base on the bias stress reliability of n-p-n AlGaAs/GaAs microwave HBTs, fabricated under an identical processing technology and layout design, have been investigated. It was found that, following 24 hours of identical bias stress at room temperature, both Be- and Zn-doped devices exhibited current gain degradation of 68 and 57%, respectively, compared with only 7% for the C-doped device. The increase in the emitter/base turn-on voltage in the degraded devices is attributed to the p-n junction displacement.     

High-efficiency enhancement-mode power heterojunction FET with buried p/sup +/-GaAs gate structure for low-voltage-operated mobile applications

This letter describes a successfully developed enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET with a buried p/sup +/-n junction gate structure for low-voltage-operated mobile applications. The buried p/sup +/-GaAs gate structure effectively reduced on-resistance (R/sub on/) and suppressed drain-current frequency dispersion for the device with high positive threshold voltage, resulting in high-efficiency characteristics under low-voltage operation. The fabricated p/sup +/-gate HJFET exhibited a low R/sub on/ of 1.4 /spl Omega//spl middot/mm with a threshold voltage of +0.4 V. Negligible frequency dispersion characteristics were obtained through pulsed current-voltage measurements for the device. Under a single 2.7-V operation, a 19.8-mm gate width device exhibited a power added efficiency of 51.9% with 26.8-dBm output power and a -40.1-dBc adjacent channel power ratio using a 1.95-GHz wideband code-division multiple-access signal.     

Influences of sulfur passivation on temperature-dependent characteristics of an AlGaAs/InGaAs/GaAs PHEMT

The influences of (NH/sub 4/)/sub 2/S/sub x/ treatment on an AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) are studied and demonstrated. Upon the sulfur passivation, the studied device exhibits better temperature-dependent dc and microwave characteristics. Experimentally, for a 1/spl times/100 /spl mu/m/sup 2/ gate/dimension PHEMT with sulfur passivation, the higher gate/drain breakdown voltage of 36.4 (21.5) V, higher turn-on voltage of 0.994 (0.69) V, lower gate leakage current of 0.6 (571) /spl mu/A/mm at V/sub GD/=-22 V, improved threshold voltage of -1.62 (-1.71) V, higher maximum transconductance of 240 (211) mS/mm with 348 (242) mA/mm broad operating regime (>0.9g/sub m,max/), and lower output conductance of 0.51 (0.53) mS/mm are obtained, respectively, at 300 (510) K. The corresponding unity current gain cutoff frequency f/sub T/ (maximum oscillation frequency f/sub max/) are 22.2 (87.9) and 19.5 (59.3) GHz at 250 and 400 K, respectively, with considerably broad operating regimes (>0.8f/sub T/,f/sub max/) larger than 455 mA/mm. Moreover, the relatively lower variations of device performances over wide temperature range (300/spl sim/510 K) are observed.     

Improved voltage gain of transimpedance amplifier by AlGaAs/InGaAsdoped-channel FET's

AlGaAs/InGaAs doped-channel FET's were investigated, and were utilized for transimpedance (TZ) amplifier circuits. Due to a high current density, a high gain linearity, and high gate breakdown and turn-on voltages of device characteristics, the AlGaAs/InGaAs doped-channel FET is shown to increase the noise margins and voltage gain in a buffered FET logic (BFL) inverter circuit, as compared with the circuit performance built by GaAs MESFET's. This amplifier also improves transimpedance gain, dynamic signal level, and the 3-dB frequency bandwidth. The transimpedance gain-bandwidth product (Z_T ·BW) is 17 GHz·kΩ, which is much higher than in previous published reports