Analysis and equalization of data-dependent jitter

Data-dependent jitter limits the bit-error rate (BER) performance of broadband communication systems and aggravates synchronization in phase- and delay-locked loops used for data recovery. A method for calculating the data-dependent jitter in broadband systems from the pulse response is discussed. The impact of jitter on conventional clock and data recovery circuits is studied in the time and frequency domain. The deterministic nature of data-dependent jitter suggests equalization techniques suitable for high-speed circuits. Two equalizer circuit implementations are presented. The first is a SiGe clock and data recovery circuit modified to incorporate a deterministic jitter equalizer. This circuit demonstrates the reduction of jitter in the recovered clock. The second circuit is a MOS implementation of a jitter equalizer with independent control of the rising and falling edge timing. This equalizer demonstrates improvement of the timing margins that achieve 10/sup -12/ BER from 30 to 52 ps at 10 Gb/s.     

Structural risk minimization over data-dependent hierarchies

The paper introduces some generalizations of Vapnik's (1982) method of structural risk minimization (SRM). As well as making explicit some of the details on SRM, it provides a result that allows one to trade off errors on the training sample against improved generalization performance. It then considers the more general case when the hierarchy of classes is chosen in response to the data. A result is presented on the generalization performance of classifiers with a “large margin”. This theoretically explains the impressive generalization performance of the maximal margin hyperplane algorithm of Vapnik and co-workers (which is the basis for their support vector machines). The paper concludes with a more general result in terms of “luckiness” functions, which provides a quite general way for exploiting serendipitous simplicity in observed data to obtain better prediction accuracy from small training sets. Four examples are given of such functions, including the Vapnik-Chervonenkis (1971) dimension measured on the sample     

A cipher based on data-dependent permutations

Data-dependent permutations (DDP) are introduced as basic cryptographic primitives to construct fast hardware-oriented ciphers. Some variants of the DDP operations and their application in the cipher CIKS-1 are considered. A feature of CIKS-1 is the use of both the data-dependent transformation of round subkeys and the key-dependent DDP operations. Received March 2000 and revised May 2001 Online publication 29 August 2001     

Binary division using a data-dependent iterative array

An iterative array is proposed which can be used to carry out binary division based on the principle of successive subtraction. The function of each cell of the array is dependent on the result of subtraction in the array.     

有关振荡器抖动的问答

人们在使用振荡器的经常会遇到问题,这里回答了有关振荡器波形抖动的一些问题,有助于工程师们把由抖动而引起的数据误差减至最小。     

抖动测量三种方法

只要测试数据通信IC或测试电信网络,就需要测试抖动。抖动是应该呈现的数字信号沿与实际存在沿之间的差。时钟抖动可导致电和光数据流中的偏差位,引起误码。测量时钟抖动和数据信号就可揭示误码源。测量和分析抖动可借助三种仪器:误码率(BER)测试仪,抖动分析仪和示波器(数字示波器和取样示波器)。图1示出每种仪器能处理的位率。选用哪种仪器取决于应用,即电或光、数据通信以及位率。因为抖动是误码的主要原因,所以,首先需要测量的是BER。若网络、网络元件、子系统或IC的BER超过可接受的限制,则必须找到误差源。大多数工程技术人员希望…     

Waiting time jitter reduction

When a pulse-stuffing multiplexer interfaces to asynchronous traffic, the pulse-stuffing mechanism introduces the low-frequency stuffing jitter called waiting-time jitter. Depending on the stuffing ratio, which relates a nominal asynchronous traffic rate to a multiplexer output rate, up to one unit interval peak-to-peak waiting-time jitter is generated. A large amount of waiting-time jitter can have harmful effects on a network and needs to be reduced. The author introduces three waiting-time jitter reduction methods, which are based on the forced stuffing concept. The concept and its implementations are discussed in detail     

采用频率抖动技术减小EMI

通过在芯片PWM控制电路中使用频率调整环节来减小开关电源的电磁干扰,为抑制开关电源电磁干扰提供新思路。     

Cancellation of crosstalk-induced jitter

A novel jitter equalization circuit is presented that addresses crosstalk-induced jitter in high-speed serial links. A simple model of electromagnetic coupling demonstrates the generation of crosstalk-induced jitter. The analysis highlights unique aspects of crosstalk-induced jitter that differ from far-end crosstalk. The model is used to predict the crosstalk-induced jitter in 2-PAM and 4-PAM, which is compared to measurement. Furthermore, the model suggests an equalizer that compensates for the data-induced electromagnetic coupling between adjacent links and is suitable for pre- or post-emphasis schemes. The circuits are implemented using 130-nm MOSFETs and operate at 5-10 Gb/s. The results demonstrate reduced deterministic jitter and lower bit-error rate (BER). At 10 Gb/s, the crosstalk-induced jitter equalizer opens the eye at 10/sup -12/ BER from 17 to 45 ps and lowers the rms jitter from 8.7 to 6.3 ps.     

Element-wise uniqueness,prior knowledge,and data-dependent resolution

Techniques for finding regularized solutions to underdetermined linear systems can be viewed as imposing prior knowledge on the unknown vector. The success of modern techniques, which can impose priors such as sparsity and non-negativity, is the result of advances in optimization algorithms to solve problems which lack closed-form solutions. Techniques for characterization and analysis of the system to determine when information is recoverable, however, still typically rely on closed-form solution techniques such as singular value decomposition or a filter cutoff estimate. In this letter we propose optimization approaches to broaden the approach to system characterization. We start by deriving conditions for when each unknown element of a system admits a unique solution, subject to a broad class of types of prior knowledge. With this approach we can pose a convex optimization problem to find “how unique” each element of the solution is, which may be viewed as a generalization of resolution to incorporate prior knowledge. We find that the result varies with the unknown vector itself, i.e., it is data-dependent, such as when the sparsity of the solution improves the chance it can be uniquely reconstructed. The approach can be used to analyze systems on a case-by-case basis, estimate the amount of important information present in the data, and quantitatively understand the degree to which the regularized solution may be trusted.     

Getting to grips with jitter

The word 'jitter' in the communications context has come to mean any random or periodic variation in timing of a regular event from its intended or nominal timing. On the one hand, jitter can refer to arrival time variations for IP packets, or, on the other, to variations on clock signals in digital systems, as well as many other things. A big problem with jitter is just measuring it     

Data-dependent jitter in serial communications

We present a method for predicting data-dependent jitter (DDJ) introduced by a general linear time-invariant LTI system based on the system's unit step response. We express the exact DDJ of a first-order system and verify the validity of the solution experimentally. We then propose a perturbation technique to generalize the analytical expression for DDJ. We highlight the significance of the unit step response in characterizing DDJ and emphasize that bandwidth is not a complete measure for predicting DDJ. We separate the individual jitter contributions of prior bits and use the result to predict the DDJ of a general LTI system. In particular, we identify a dominant prior bit that signifies the well-known distribution of deterministic jitter, the two impulse functions. We also show a jitter minimization property of high-order LTI systems. We verify our generalized analytical expression of DDJ for several real systems including an integrated CMOS 10-Gb/s trans-impedance amplifier by comparing the theory and measurement results. The theory predicts the jitter with as low as only 7.5% error.     

Universality of mode-locked jitter performance

It is shown experimentally that the jitter of actively mode-locked laser pulses is determined by two factors: first, by spontaneous noise associated with cavity loss, and second, by round-trip propagation time. As the round-trip time is increased, a characteristic frequency which defines the high-frequency limit of phase noise decreases. For a comparable round-trip time and cavity loss, the jitter of mode-locked lasers based on diverse gain media, whether semiconductor or erbium ion is universal and independent of the upper-state transition lifetime.     

Predicting random jitter - Exploring the current simulation techniques for predicting the noise in oscillator, clock, and timing circuits

The random jitter performance of clock, oscillator, and timing circuits can be predicted by using steady-state circuit simulation techniques that determine phase noise by analyzing the impact on phase due to thermal, flicker, channel, and shot noise present in the electronic devices. Given the phase noise response, and the steady-state operating conditions of the circuit, a wide variety of jitter measurements can be computed. Each involves a transformation of the phase noise results, with accuracy hinging on the quality of the phase noise response over a suitable range of offset frequencies     

Joint I/Q imbalances estimation using data-dependent superimposed training

In this paper, we address the joint estimation of the channel impulse response and frequency-dependent in-phase and quadrature-phase (I/Q) imbalances using data-dependent superimposed training (DDST). The analysis developed shows that it is possible to use the first-order statistics of the received process to achieve synchronization and identify the resulting widely linear system that encompasses the radio frequency impairments considered. Furthermore, it is also verified that for the joint estimation of the transmitter and the receiver I/Q imbalances, additional constraints than those required for strictly linear systems should be imposed on the training sequences employed. The results of numerical simulations show that DDST has comparable performance with methods reported in the literature.     

Phase jitter≡timing jitter?

In digital communication systems, the periodicity of timing signals is often disturbed. While timing jitter has been adopted by the International Telecommunication Union (ITU) as the standardized measurement for such disturbances, phase jitter is often used instead in much of the current relevant literature. The fundamental concepts of timing jitter and phase jitter are examined and definitions are presented. A nonlinear relationship between timing jitter and phase jitter is developed, and a general rendition under which one can be approximated by the other is obtained. This condition is tested against the timing jitter and wander tolerance for digital equipment operating at 2048 kb/s, as specified in ITU-T Recommendation G.823     

电路设计中对时钟晶体振荡器的考虑

当在一个抖动敏感电路中使用时钟振荡器时,有一些因素系统设计者必须考虑     

一种基于序列调制的自适应抖动抑制方案

针对指针调整将会在SDH网络与PDH网络交界处引起大幅度的低频抖动的问题,文章在现有研究成果的基础上,提出了一种基于序列调制的自适应抖动抑制方案,该方案采用新的基于统计预测和缓存监测相结合的比特泄漏周期自适应调制方法,可以有效地避免相同极性的网络工作模式转换所造成的缓存器溢出损伤;给出了实现序列调制的设计原理,计算了网络在非劣化模式和劣化模式下的比特泄漏周期指标和序列调制时间指标.仿真与实际应用表明,该方案可以简单而有效地解决指针调整抖动的抑制问题.     

Turn-on jitter of external-cavity semiconductor lasers

Analytical expressions, validated by numerical simulations, are obtained for the turn-on delay jitter of semiconductor lasers subjected to weak optical feedback in short external cavities. The results show explicitly that displacement of the external reflector on optical wavelength scales causes significant changes in the switch-on dynamics of the laser. It is found that more than a 400% increase of jitter can occur under certain circumstances. The demonstrated sensitivity of laser switch-on dynamics to reflector location is considered to be particularly relevant to the performance of packaged laser diodes