C_(4)F_(6)/SF_(6)混合气体对硅基材料的ICP刻蚀工艺研究北大核心CSCD

为避免深硅刻蚀工艺所引起的扇贝纹效应,同时减少其工艺气体所带来的温室效应,本文将新一代环保电子刻蚀气C4F6引入硅刻蚀工艺,采用刻蚀与钝化同步进行的伪Bosch工艺刻蚀硅槽孔。研究了ICP功率、RIE功率、腔体压强和C_(4)F_(6)/SF_(6)气体流量比对刻蚀速率、光刻胶/硅刻蚀选择比及刻蚀形貌的影响。结果表明,一定程度增加ICP功率和RIE功率可分别提高等离子体密度和物理轰击刻蚀作用;腔体压强对粒子平均自由径有较大影响;而C4F6流量的增加可加强刻蚀侧壁保护机制。通过综合优化工艺参数,获得了2.8μm/min硅刻蚀速率,3.1的光刻胶/硅刻蚀选择比和侧壁平坦,表面光滑,垂直度高的刻蚀形貌。     

CF4流量及射频功率等对反应离子刻蚀硅基材料的影响

通过一系列的刻蚀实验,研究了在反应离子刻蚀(RIE)过程中,CF4流量及射频功率等工艺参数对刻蚀硅基材料的影响,采用不同工艺条件,得出了对应的刻蚀速率、均匀性、选择比等刻蚀参数,并对结果进行了比较与分析,得到了相对最佳的工艺条件,能较好地实现硅的各向异性刻蚀,为硅基材料刻蚀技术在半导体工艺中的应用做了一定的实验探索.     

Focused electron beam induced etching of titanium with XeF2

Titanium is a relevant technological material due to its extraordinary mechanical and biocompatible properties, its nanopatterning being an increasingly important requirement in many applications. We report the successful nanopatterning of titanium by means of focused electron beam induced etching using XeF(2) as a precursor gas. Etch rates up to 1.25 × 10(-3) μm(3) s(-1) and minimum pattern sizes of 80 nm were obtained. Different etching parameters such as beam current, beam energy, dwell time and pixel spacing are systematically investigated, the etching process being optimized by decreasing both the beam current and the beam energy. The etching mechanism is investigated by transmission electron microscopy. Potential applications in nanotechnology are discussed.     

XeF(2) gas-assisted focused-electron-beam-induced etching of GaAs with 30 nm resolution

We demonstrate the gas-assisted focused-electron-beam (FEB)-induced etching of GaAs with a resolution of 30 nm at room temperature. We use a scanning electron microscope (SEM) in a dual beam focused ion beam together with xenon difluoride (XeF(2)) that can be injected by a needle directly onto the sample surface. We show that the FEB-induced etching with XeF(2) as a precursor gas results in isotropic and smooth etching of GaAs, while the etch rate depends strongly on the beam current and the electron energy. The natural oxide of GaAs at the sample surface inhibits the etching process; hence, oxide removal in combination with chemical surface passivation is necessary as a strategy to enable this high-resolution etching alternative for GaAs.     

Catalyst-referred etching of silicon

A Si wafer and polysilicon deposited on a Si wafer were planarized using catalyst-referred etching (CARE). Two apparatuses were produced for local etching and for planarization. The local etching apparatus was used to planarize polysilicon and the planarization apparatus was used to planarize Si wafers. Platinum and hydrofluoric acid were used as the catalytic plate and the source of reactive species, respectively. The processed surfaces were observed by optical interferometry, atomic force microscopy (AFM) and scanning electron microscopy (SEM). The results indicate that the CARE-processed surface is flat and undamaged.     

Metal-assisted electrochemical etching of silicon

In this paper the metal-assisted electrochemical etching of silicon is introduced. By electrochemical measurement and sequent simulation, it is revealed that the potential of the valence band maximum at the silicon/metal interface is more negative than that of the silicon/electrolyte interface. Accordingly, holes injected from the back contact are driven preferentially to the silicon/metal interface. Consequently, silicon below metal is electrochemically etched much faster than a naked silicon surface without metal coverage. Metals such as Ag and Cu have been utilized to catalyze the electrochemical etching. Feature sizes as small as 30 nm can be achieved by metal-assisted electrochemical etching. Meanwhile, the metal-assisted electrochemical etching method enables convenient control over the etching direction of non-(100) substrates, and facilitates the fabrication of orientation-modulated silicon nanostructures.     

Step voltage with periodic hold-up etching: A novel porous silicon formation

A novel etching method for preparing light-emitting porous silicon (PS) is developed. A gradient steps (staircase) voltage is applied and hold-up for different periods of time between p-type silicon wafers and a graphite electrode in HF based solutions periodically. The single applied staircase voltage (0–30 V) is ramped in equal steps of 0.5 V for 6 s, and hold at 30 V for 30 s at a current of 6 mA. The current during hold-up time (0 V) was less than 10 μA. The room temperature photoluminescence (PL) behavior of the PS samples as a function of etching parameters has been investigated. The intensity of PL peak is initially increased and blue shifted on increasing etching time, but decreased after prolonged time. These are correlated with the study of changes in surface morphology using atomic force microscope (AFM), porosity and electrical conductance measurements. The time of holding-up the applied voltage during the formation process is found to highly affect the PS properties. On increasing the holding-up time, the intensity of PL peak is increased and blue shifted. The contribution of holding-up the applied steps during the formation process of PS is seen to be more or less similar to the post chemical etching process. It is demonstrated that this method can yield a porous silicon layer with stronger photoluminescence intensity and blue shifted than the porous silicon layer prepared by DC etching.     

Block copolymer templated etching on silicon

The use of self-assembled polymer structures to direct the formation of mesoscopic (1-100 nm) features on silicon could provide a fabrication-compatible means to produce nanoscale patterns, supplementing conventional lithographic techniques. Here we demonstrate nanoscale etching of silicon, applying standard aqueous-based fluoride etchants, to produce three-dimensional nanoscale features with controllable shapes, sizes, average spacing, and chemical functionalization. The block copolymers serve to direct the silicon surface chemistry by controlling the spatial location of the reaction as well as concentration of reagents. The interiors of the resulting etched nanoscale features may be selectively functionalized with organic monolayers, metal nanoparticles, and other materials, leading to a range of ordered arrays on silicon.     

Monitoring explosive crystallization phenomenon of amorphous silicon thin films during short pulse duration XeF excimer laser annealing using real-time optical diagnostic measurements

Melting and crystallization scenario of amorphous silicon (a-Si) thin films have been investigated using in situ time-resolved optical reflection and transmission measurements. The explosive crystallization phenomenon is observed using a single-mode continuous wave He-Ne probe laser for thickness of 50 nm and 90 nm a-Si thin films upon 25 ns pulse duration of XeF excimer laser irradiation, respectively. The explosive crystallization phenomenon is easier to observe in the large thickness of a-Si thin films, a sample with pure a-Si microstructure and under longer pulse duration of excimer laser irradiation by time-resolved optical reflection and transmission measurements.     

Anodic etching of p-type cubic silicon carbide

p-Type cubic silicon carbide was anodically etched using an electrolyte of HF:HCl:H₂O. The etching depth was determined versus time with a fixed current density of 96.4 mA cm^–2. It was found that the etching was very smooth and very uniform. An etch rate of 22.7 nm s^–1 was obtained in a 1:1:50 HF:HCl:H₂O electrolyte.